SLVA343A TI | Alldatasheet

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SLVA343A –June 2009–RevisedMay 2010 Medium IntegratedPower SolutionUsing a Dual DC/DC Converterand an LDO ABSTRACT This referencedesign is intended for users designingwith the TMS320C6742, TMS320C6746, TMS320C6748, or OMAP-L138 processor.Using sequenced power supplies,thisreferencedesign describesa system havinga 3.3-Vinputvoltageand a high-efficiencydc/dcconverterwithintegrated FETs fora small,simpledesign. Sequenced power supplyarchitecturesare becoming commonplace inhigh-performancemicroprocessor and digitalsignalprocessor(DSP) systems.To save power and increaseprocessingspeeds,processor coreshave smallergeometrycellsand requirelowersupplyvoltagesthanthesystem bus voltages.Power management inthesesystems requiresspecialattention.Thisapplicationreportaddressesthesetopics and suggestssolutionsforoutputvoltagesequencing.

Contents

EasyScaleisa trademarkofTexas Instruments. 1SLVA343A –June 2009–RevisedMay 2010 Medium IntegratedPower SolutionUsinga DualDC/DC Converterand an LDO Copyright© 2009–2010,Texas InstrumentsIncorporated

Introduction www.ti.com

1 Introduction

Indualvoltagearchitectures,coordinatedmanagement ofpower suppliesisnecessarytoavoidpotential problemsand ensurereliableperformance.Power supplydesignersmust considerthetimingand voltage differencesbetween coreand input/output(I/O)voltagesuppliesduringpower-upand power-down operations. Sequencingreferstotheorder,timing,and differentialinwhichthetwo voltagerailsarepowered up and down. A systemdesignedwithoutpropersequencingmay be atriskfortwo typesoffailures.The firstof theserepresentsa threattothelong-termreliabilityofthedualvoltagedevice,whereas thesecond is more immediate,withthepossibilityofdamaging interfacecircuitsintheprocessororsystemdevices such as memory, logicordataconverterintegratedcircuits(IC). Anotherpotentialproblemwithimpropersupplysequencingisbus contention.Bus contentionisa conditionwhen theprocessorand anotherdevicebothattempttocontrola bidirectionalbus duringpower up.Bus contentionmay alsoaffectI/Oreliability.Power supplydesignersmust checktherequirements regardingbus contentionforindividualdevices. The power-onsequencingfortheOMAP-L138, TMS320C6742, TMS320C6746, and TMS320C6748 are shown inTable1.No specificvoltageramp rateisrequiredforany ofthesuppliesas longas the3.3-Vrail neverexceedsthe1.8-Vrailby more than2 V.

2 Power Requirements

The power requirementsareas specifiedinTable1. Table1.Power Requirements VOLTAGE (1)(2) Imax SEQUENCING TIMINGPIN NAME TOLERANCE(V) (mA) ORDER DELAY I/O RTC_CVDD 1.2 1 –25%, +10% 1(3) I/O RVDD, PLL0_VDDA, 1.2 200 –5%, +10% 3 PLL1_VDDA, SATA_VDD, USB_CVDD, USB0_VDDA12 I/O USB0_VDDA18, USB1_VDDA18, 1.8 180 ±5% 4 DDR_DVDD18, SATA_VDDR, DVDD18 I/O USB0_VDDA33, USB1_VDDA33 3.3 24 ±5% 5 DVDD3318_C (1) If1.8-VLVCMOS isused,power railsup withthe1.8-Vrails.If3.3-VLVCMOS isused,power itup withtheANALOG33 rails (VDDA33_USB0/1). (2) No specificvoltageramp rateisrequiredforany ofthesuppliesLVCMOS33 (USB0_VDDA33, USB1_VDDA33) ifSTATIC18 (USB0_VDDA18, USB1_VDDA18, DDR_DVDD18, SATA_VDDR, DVDD18) neverexceedsmore than2 volts. (3) IfRTC isnotused/maintainedon a separatesupply,itcan be includedintheSTATIC12 (fixed1.2V) group. (4) IfusingCVDD atfixed1.2V,all1.2-Vrailsmay be combined. (5) IfDVDD3318_A, B,and C arepowered independently,maximum power foreach railis1/3theabove maximum power. 2 Medium IntegratedPower SolutionUsinga DualDC/DC Converterand an LDO SLVA343A –June 2009–RevisedMay 2010 Copyright© 2009–2010,Texas InstrumentsIncorporated

www.ti.com Features

3 Features

The designuses thefollowinghigh-efficiencydc/dcconverterwithintegratedFETs. INPUT VOLTAGE ~3.3V INTEGRATION AND HIGH EFFICIENCY (WithoutDVFS) COMBINE RTC AND STATIC 1.2 Core 1.2V at600 mA TPS62420 (DCDC1) Static1.2V + VRTC at251 mA Static1.8V at230 mA TPS62420 (DCDC2) Static3.3V at115 mA TPS71733 (DRV) Intheprecedingtable,VRTC isincludedintheSTATIC12 (fixed1.2V) group. TPS62420

  • Highefficiency– up to95%
  • VIN rangeFrom 2.5V to6 V
  • Outputcurrent600 mA and 1000 mA
  • EasyScale™ optional1-pinserialinterfacefordynamicoutputvoltageadjustment
  • Power-Save mode atlight-loadcurrents
  • Availableina 10-pinQFN (3×3mm) TPS71733
  • 150-mA low-dropout(LDO) regulatorwithenable
  • Low noise:30 mV typical(100Hz to100 kHz)
  • Excellentload/linetransientresponse
  • SmallSC70-5,2 mm × 2 mm SON-6, and 1,5mm × 1,5mm SON-6 packages More informationon thedevicescan be foundinthedatasheets.
  • TPS62420, SLVS676
  • TPS71733, SBVS068 3SLVA343A –June 2009–RevisedMay 2010 Medium IntegratedPower SolutionUsinga DualDC/DC Converterand an LDO Copyright© 2009–2010,Texas InstrumentsIncorporated

Features www.ti.com Figure1.PMP4978 ReferenceDesign Schematic 4 Medium IntegratedPower SolutionUsinga DualDC/DC Converterand an LDO SLVA343A –June 2009–RevisedMay 2010 Copyright© 2009–2010,Texas InstrumentsIncorporated

www.ti.com Features Propersequencingisensuredinthedesignwiththeuse ofa NPN transistorand a N-channelMOSFET. As required,Core 1.2V at600 mA comes first,whichinturnpullsup thegateofa N-channelMOSFET to enablestheDCDC1 and sequentially1.8V comes up,whichagainenablesan LDO togive3.3V at115 mA. (1) Use threesuch LDOs topower up DVDDA, DVDDB, and DVDDC. (Itcan be either1.8V or3.3V.) (2) Rx = 0.499M Ω,Ry = 1 M Ω forVout= 1.8V (3) Rx = 1.8M Ω,Ry = 1 M Ω forVout= 3.3V (4) Forpropersequencingofoutput,enableoftheLDOs arefedeitherfroma 1.2-VoutputfromTPS62420 DCDC2 ifDVDDX is1.8V orfroma 1.8-VoutputfromTPS62420 DCDC1 ifDVDDX is3.3V. Figure2.OptionalCircuitforDVDD_A, DVDD_B and DVDD_C 5SLVA343A –June 2009–RevisedMay 2010 Medium IntegratedPower SolutionUsinga DualDC/DC Converterand an LDO Copyright© 2009–2010,Texas InstrumentsIncorporated

BillofMaterials www.ti.com

4 BillofMaterials

Table2.PMP4978 BillofMaterials Count RefDes Value Description Size PartNumber MFR Area 1 C1 0.1mF Capacitor,Ceramic,50V,C0G, 5% 0603 Std Std 5650

1 C2 33pF Capacitor,Ceramic,50V,C0G, 5% 0603 Std Std 5650

6 C3 10 mF Capacitor,Ceramic,6.3V,X5R, 20% 0805 C2012X5R0J106M TDK 10560 C4 10 mF Capacitor,Ceramic,6.3V,X5R, 20% 0805 C2012X5R0J106M TDK 10560 C5 10 mF Capacitor,Ceramic,6.3V,X5R, 20% 0805 C2012X5R0J106M TDK 10560 C6 10 mF Capacitor,Ceramic,6.3V,X5R, 20% 0805 C2012X5R0J106M TDK 10560 C7 10 mF Capacitor,Ceramic,6.3V,X5R, 20% 0805 C2012X5R0J106M TDK 10560 C8 10 mF Capacitor,Ceramic,6.3V,X5R, 20% 0805 C2012X5R0J106M TDK 10560 1 C9 2.2mF Capacitor,Ceramic,16V,X5R, 10% 0603 C1608X5R1C225K TDK 5650 1 C10 1.0mF Capacitor,Ceramic,25V,X5R, 10% 0603 C1608X5R1E105K TDK 5650 1 C11 0.01mF Capacitor,Ceramic,50V,X7R, 10% 0603 C1608X7R1H103K TDK 5650 1 J1 PEC36SAAN Header,Male 5-pin,100milspacing,(36-pin 0.100inch× 5 PEC36SAAN Sullins 60000 strip) 2 L1 2.2mH Inductor,SMT, 1.2A,100m Ω 0.102× 0.110inch VLF3014AT-2R2M1R2 TDK 24,7 L2 2.2mH Inductor,SMT, 1.2A,100m Ω 0.102× 0.110inch VLF3014AT-2R2M1R2 TDK 24,7

2 Q1 2N3904 Transistor,NPN, 40V,200mA, 625mW TO-92 2N3904 Fairchild37800

Q2 2N3904 Transistor,NPN, 40V,200mA, 625mW TO-92 2N3904 Fairchild37800 1 Q3 Si1012R/X MOSFET, N-ch,20V,600mA, 0.7ohms SC89-3 Si1012R/X Vishay 12125

2 R1 10k Resistor,Chip,1/16W,1% 0603 CRCW0603-xxxx-F Vishay 9100

R2 10k Resistor,Chip,1/16W,1% 0603 CRCW0603-xxxx-F Vishay 9100

1 R3 100k Resistor,Chip,1/16W,1% 0603 CRCW0603-xxxx-F Vishay 9100

1 R4 20k Resistor,Chip,1/16W,1% 0603 CRCW0603-xxxx-F Vishay 9100

3 R5 365K Resistor,Chip,1/16W,1% 0603 Std Std 5650

R6 365K Resistor,Chip,1/16W,1% 0603 Std Std 5650

1 R7 10K Resistor,Chip,1/16W,1% 0603 Std Std 5650

1 R8 12.5K Resistor,Chip,1/16W,1% 0603 Std Std 5650 R9 365K Resistor,Chip,1/16W,1% 0603 Std Std 5650

1 R10 182K Resistor,Chip,1/16W,1% 0603 Std Std 5650

1 U1 TPS62420DRC IC,2.25MHz DualStepDown Converter QFN10 TPS62420DRC TI 40500 1 U2 TPS71733DCK IC,150mA, Low Iq,Wide Bandwidth,LDO SC70 TPS71728DCK TI 18.6 LinearRegulators Notes:1. These assembliesareESD sensitive,ESD precautionsshallbe observed. 2. These assembliesmust be cleanand freefromfluxand allcontaminants.Failuretouse cleanfluxisunacceptable. 3. These assembliesmust complywithworkmanshipstandardsIPC-A-610Class2. 4. Referencedesignatorsmarked withan asterisk('**')cannotbe substituted.Allothercomponents can be substitutedwithequivalentMFG 's components. 6 Medium IntegratedPower SolutionUsinga DualDC/DC Converterand an LDO SLVA343A –June 2009–RevisedMay 2010 Copyright© 2009–2010,Texas InstrumentsIncorporated

0.01 0.1 1 10 100 1000 Efficiency I -□mAOUT Power□Save□Mode MODE/DATA =□0 Forced□PWM□Mode MODE/DATA =□1 V =□1.8□VOUT2 V =□2.7□VIN V =□3.6□VIN V =□5□VIN V =□2.7□VIN V =□3.6□VIN V =□5□VIN 100 0.01 0.1 1 10 100 1000 Efficiency Power□Save□Mode MODE/DATA =□0 Forced□PWM□Mode MODE/DATA =□1 V =□2.7□VIN V =□3.6□VIN V =□2.7□VIN V =□3.6□VIN V =□5□VIN V =□5□VIN V =□1.1□VOUT1 I -□mAOUT www.ti.com BillofMaterials

4.1 TestResult

The start-upwaveform (Figure3)specifiesthesequencingorderthatisrequired. Figure3.Sequencing inStart-upWaveform Figure4.EfficiencyVOUT2 = 1.8V Figure5.EfficiencyVOUT1 = 1.1V 7SLVA343A –June 2009–RevisedMay 2010 Medium IntegratedPower SolutionUsinga DualDC/DC Converterand an LDO Copyright© 2009–2010,Texas InstrumentsIncorporated

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