PDRV10975RHFR

DRV10975_18 TI1 | Alldatasheet

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Technical content

1 µF 1 µF M VCP CPP CPN SW SWGND VREG V1P8 GND V3P3 SCL SDA FG VCC VCC W W V V U U PGND PGND DIR SPEED 0.1 µF 0.1 µF

3.3 V or 5 V10 µF

10 µF VCC Copyright © 2016, Texas Instruments Incorporated 39 /c87 Product Folder Order Now T echnical Documents Tools & Software Support & Community Reference Design An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA. DRV10975, DRV10975Z SLVSCP2D –JANUARY 2015–REVISED MARCH 2018 DRV1097512-V,Three-Phase,SensorlessBLDCMotorDriver

1 Features

1• Input Voltage Range: 6.5 to 18 V

• Total Driver H + L rDS(on): 250 mΩ
• Drive Current: 1.5-A Continuous Winding Current (2-A Peak)
• Sensorless Proprietary Back Electromotive Force (BEMF) Control Scheme
• Continuous Sinusoidal 180° Commutation
• No External Sense Resistor Required
• For Flexibility User May Include External Sense Resistor to Monitor Power Delivered to Motor
• Flexible User Interface Options: – I2C Interface: Access Registers for Command and Feedback – Dedicated SPEED Pin: Accepts Either Analog or PWM Input – Dedicated FG Pin: Provides TACH Feedback – Spin-Up Profile Customizable With EEPROM – Forward-Reverse Control With DIR Pin
• Integrated Step-Down Regulator to Efficiently Provide Voltage (5 V or 3.3 V) for Internal and External Circuits
• Supply Current 4.5 mA With Standby Version (DRV10975)
• Supply Current 80 μA With Sleep Version (DRV10975Z)
• Overcurrent Protection
• Lock Detection
• Voltage Surge Protection
• UVLO Protection
• Thermal Shutdown Protection
• Thermally-Enhanced 24-Pin HTSSOP

2 Applications

• Appliance Fan
• HVAC

3 Description

The DRV10975 device is a three-phase sensorless motor driver with integrated power MOSFETs, which can provide continuous drive current up to 1.5 A. The device is specifically designed for cost-sensitive, low- noise, low-external-component-count applications. The DRV10975 device uses a proprietary sensorless control scheme to provide continuous sinusoidal drive, which significantly reduces the pure tone acoustics that typically occur as a result of commutation. The interface to the device is designed to be simple and flexible. The motor can be controlled directly through PWM, analog, or I2C inputs. Motor speed feedback is available through either the FG pin or I2C. The DRV10975 device features an integrated step- down regulator to efficiently step down the supply voltage to either 5 or 3.3 V for powering both internal and external circuits. The device is available in either a sleep mode or a standby mode version to conserve power when the motor is not running. The standby mode (4.5-mA) version leaves the regulator running and the sleep mode (80-µA) version shuts it off. Use the standby mode version in applications where the regulator is used to power an external microcontroller. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) DRV10975 HTSSOP (24) 7.80 mm × 6.40 mm VQFN (24) Adv. Info. 5.00 mm × 4.00 mm DRV10975Z HTSSOP (24) 7.80 mm × 6.40 mm VQFN (24) Adv. Info. 5.00 mm × 4.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Application Schematic

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12.5 Receiving Notification of Documentation Updates 52

13 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (February 2018) to Revision D Page Changes from Revision B (December 2017) to Revision C Page Changes from Revision A (March 2017) to Revision B Page

DRV10975, DRV10975Z www.ti.com SLVSCP2D –JANUARY 2015–REVISED MARCH 2018 Product Folder Links: DRV10975 Submit Documentation FeedbackCopyright © 2015–2018, Texas Instruments Incorporated Changes from Original (January 2015) to Revision A Page

Thermal pad (GND) DRV10975, DRV10975Z SLVSCP2D –JANUARY 2015–REVISED MARCH 2018 www.ti.com Product Folder Links: DRV10975 Submit Documentation Feedback Copyright © 2015–2018, Texas Instruments Incorporated

5 Description (continued)

An I2C interface allows the user to reprogram specific motor parameters in registers and program the EEPROM to help optimize the performance for a given application. The DRV10975 device is available in a thermally efficient HTSSOP, 24-pin package with an exposed thermal pad. The operating temperature is specified from –40°C to 125°C.

6 Pin Configuration and Functions

PWP PowerPAD™ Package 24-Pin HTSSOP With Exposed Thermal Pad Top View

13 PGND

20 VCC

21 VCC

22 VCP

23 CPP

24 CPN

DRV10975, DRV10975Z www.ti.com SLVSCP2D –JANUARY 2015–REVISED MARCH 2018 Product Folder Links: DRV10975 Submit Documentation FeedbackCopyright © 2015–2018, Texas Instruments Incorporated (1) I = Input, O = Output, I/O = Input/output, P = Power (2) ADVANCE INFORMATION 24-Pin VQFN With Exposed Thermal Pad Top View ADVANCE INFORMATION Pin Functions PIN TYPE(1) DESCRIPTION NAME NO. HTSSOP VQFN(2) CPN 3 24 P Charge pump pin 1, use a ceramic capacitor between CPN and CPP. CPP 2 23 P Charge pump pin 2, use a ceramic capacitor between CPN and CPP. DIR 14 11 I Direction FG 12 9 O FG signal output GND 8 5 — Digital and analog ground PGND 15, 16 12, 13 P Power ground SCL 10 7 I I2C clock signal SDA 11 8 I/O I2C data signal SPEED 13 10 I Speed control signal for PWM or analog input speed command SW 4 1 O Step-down regulator switching node output SWGND 5 2 P Step-down regulator ground U 17, 18 14, 15 O Motor U phase V 19, 20 16, 17 O Motor V phase V1P8 7 4 P Internal 1.8-V digital core voltage. V1P8 capacitor must connect to GND. This is an output, but not specified to drive external loads. V3P3 9 6 P Internal 3.3-V supply voltage. V3P3 capacitor must connect to GND. This is an output and may drive external loads not to exceed IV3P3_MAX. VCC 23, 24 20, 21 P Device power supply VCP 1 22 P Charge pump output VREG 6 3 P Step-down regulator output and feedback point

DRV10975, DRV10975Z SLVSCP2D –JANUARY 2015–REVISED MARCH 2018 www.ti.com Product Folder Links: DRV10975 Submit Documentation Feedback Copyright © 2015–2018, Texas Instruments Incorporated Pin Functions (continued) PIN TYPE(1) DESCRIPTION NAME NO. HTSSOP VQFN(2) W 21, 22 18, 19 O Motor W phase Thermal pad (GND) — — — The exposed thermal pad must be electrically connected to ground plane through soldering to PCB for proper operation and connected to bottom side of PCB through vias for better thermal spreading. (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to the network ground terminal unless otherwise noted.

7 Specifications

7.1 Absolute Maximum Ratings

over operating ambient temperature (unless otherwise noted)(1) MIN MAX UNIT Input voltage(2) VCC –0.3 23 V SPEED –0.3 4 GND –0.3 0.3 SCL, SDA –0.3 4 DIR –0.3 4 Output voltage(2) U, V, W –1 23 V SW –1 23 VREG –0.3 7 FG –0.3 4 VCP –0.3 V(VCC) + 6 CPN –0.3 23 CPP –0.3 V(VCC) + 6 V3P3 –0.3 4 V1P8 –0.3 2.5 Maximum junction temperature, TJ_MAX –40 150 °C Storage temperature, Tstg –55 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.2 ESD Ratings

V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2500 V Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±1500 RHF PACKAGE V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2500 V Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±1000

DRV10975, DRV10975Z www.ti.com SLVSCP2D –JANUARY 2015–REVISED MARCH 2018 Product Folder Links: DRV10975 Submit Documentation FeedbackCopyright © 2015–2018, Texas Instruments Incorporated

7.3 Recommended Operating Conditions

over operating ambient temperature range (unless otherwise noted) MIN NOM MAX UNIT Supply voltage VCC 6.5 12 18 V Voltage U, V, W –0.7 19 VSCL, SDA, FG, SPEED, DIR –0.1 3.3 3.6 PGND, GND –0.1 0.1 Current Step-down regulator output current (buck mode) 100 mAStep-down regulator output current (linear mode) 0 V3P3 LDO output current 5 Operating junction temperature, TJ –40 125 °C

7.4 Thermal Information

DRV10975, DRV10975Z UNITRHF (VQFN) Advance Info. PWP (HTSSOP)

24 PINS 24 PINS

RθJA Junction-to-ambient thermal resistance 30.9 36.1 °C/W RθJC(top) Junction-to-case (top) thermal resistance 22.6 17.4 °C/W RθJB Junction-to-board thermal resistance 10.4 14.8 °C/W ψJT Junction-to-top characterization parameter 0.2 0.4 °C/W ψJB Junction-to-board characterization parameter 10.4 14.5 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 1.8 1.1 °C/W

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7.5 Electrical Characteristics

over operating ambient temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY CURRENT (DRV10975) IVcc Supply current TA = 25°C; sleepDis = 1; SPEED = 0 V; V(VCC) = 12 V; buck regulator 5 7 mA TA = 25°C; sleepDis = 1; SPEED = 0 V; V(VCC) = 12 V; linear regulator 11 IVccSTBY Standby current TA = 25°C; SPEED = 0 V; V(VCC) = 12 V; standby mode device; buck regulator 4.5 6 mA TA = 25°C; SPEED = 0 V; V(VCC) = 12 V; standby mode device; linear regulator 9 SUPPLY CURRENT (DRV10975Z) IVcc Supply current TA = 25°C; sleepDis = 1; SPEED = 0 V; Vcc = 12 V; buck regulator 5 7 mA TA = 25°C; sleepDis = 1; SPEED = 0 V; Vcc = 12 V; linear regulator 11 IVccSLEEP Sleep current TA = 25°C; SPEED = 0 V; V(VCC) = 12 V; sleep mode device 80 150 µA UVLO VUVLO_R UVLO threshold voltage Rise threshold, TA = 25°C 5.2 5.6 6.5 V VUVLO_F UVLO threshold voltage Fall threshold, TA = 25°C 5 5.5 5.8 V VUVLO_HYS UVLO threshold voltage hysteresis TA = 25°C 100 200 400 mV LDO OUTPUT V3P3 V(VCC) = 12 V, TA = 25°C, VregSel = 0, 5-mA load 3 3.3 3.6 VV(VCC) = 12 V, TA = 25°C, VregSel = 1, V(VREG) < 3.3 V, 5-mA load V(VREG) – 0.3 V(VREG) – 0.1 V(VREG) V(VCC) = 12 V, TA = 25°C, VregSel = 1, V(VREG) ≥ 3.3 V, 5-mA load 3 3.3 3.6 IV3P3_MAX Maximum load from V3P3 V(VCC) = 12 V, TA = 25°C 5 mA V1P8 V(VCC) = 12 V, TA = 25°C, VregSel = 0 1.6 1.78 2 V V(VCC) = 12 V, TA = 25°C, VregSel = 1 1.6 1.78 2 STEP-DOWN REGULATOR VREG Regulator output voltage TA = 25˚C; VregSel = 0, LSW = 47 µH, CSW = 10 µF, Iload = 50 mA 4.5 5 5.5 V TA = 25˚C; VregSel = 1, LSW = 47 µH, CSW = 10 µF, Iload = 50 mA 3.06 3.4 3.6 VREG_L Regulator output voltage (linear mode) TA = 25°C, VregSel = 0, RSW = 39 Ω, CSW = 10 µF 5 V TA = 25°C, VregSel = 1, RSW = 39 Ω, CSW = 10 µF 3.4 IREG_MAX Maximum load from VREG TA = 25°C, LSW = 47 µH, CSW = 10 µF 100 mA INTEGRATED MOSFET rDS(on) Series resistance (H + L) TA = 25˚C; V(VCC) = 12 V; V(VCP) = 17 V; Iout = 1 A 0.25 0.4 Ω SPEED – ANALOG MODE VAN/A_FS Analog full-speed voltage V(V3P3) × 0.9 V VAN/A_ZS Analog zero-speed voltage 100 mV tSAM Analog speed sample period 320 µs VAN/A_RES Analog voltage resolution 5.8 mV SPEED – PWM DIGITAL MODE VDIG_IH PWM input high voltage 2.2 V

DRV10975, DRV10975Z www.ti.com SLVSCP2D –JANUARY 2015–REVISED MARCH 2018 Product Folder Links: DRV10975 Submit Documentation FeedbackCopyright © 2015–2018, Texas Instruments Incorporated Electrical Characteristics (continued) over operating ambient temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VDIG_IL PWM input low voltage 0.6 V ƒPWM PWM input frequency 1 100 kHz STANDBY MODE (DRV10975) VEN_SB Analog voltage-to-enter standby mode SpdCtrlMd = 0 (analog mode) 30 mV VEX_SB Analog voltage-to-exit standby SpdCtrlMd = 0 (analog mode) 120 mV tEX_SB_ANA Time-to-exit from standby mode SpdCtrlMd = 0 (analog mode) SPEED > VEX_SB 700 ms tEX_SB_DR_ANA Time taken to drive motor after exiting from standby mode SpdCtrlMd = 0 (analog mode) SPEED > VEX_SB; ISDen = 0; BrkDoneThr[2:0] = 0 1 µs tEX_SB_PWM Time-to-exit from standby mode SpdCtrlMd = 1 (PWM mode) SPEED > VDIG_IH 1 µs tEX_SB_DR_PWM Time taken to drive motor after exiting from standby mode SpdCtrlMd = 1 (PWM mode) SPEED > VDIG_IH; ISDen = 0; BrkDoneThr[2:0] = 0 55 ms tEN_SB_ANA Time-to-enter standby mode SpdCtrlMd = 0 (analog mode) SPEED < VEN_SB; AvSIndEn = 0 5 ms tEN_SB_PWM Time-to-enter standby mode SpdCtrlMd = 1 (PMW mode) SPEED < VDIG_IL; AvSIndEn = 0 60 ms SLEEP MODE (DRV10975Z) VEN_SL Analog voltage-to-enter sleep SpdCtrlMd = 0 (analog mode) 30 mV VEX_SL Analog voltage-to-exit sleep SpdCtrlMd = 0 (analog mode) 2.2 3.3 V tEX_SL_ANA Time-to-exit from sleep mode SpdCtrlMd = 0 (analog mode) SPEED > VEX_SL 1 µs tEX_SL_DR_ANA Time taken to drive motor after exiting from sleep mode SpdCtrlMd = 0 (analog mode) SPEED > VEX_SL; ISDen = 0; BrkDoneThr[2:0] = 0 350 µs tEX_SL_PWM Time-to-exit from sleep mode SpdCtrlMd = 1 (PWM mode) SPEED > VDIG_IH 1 µs tEX_SL_DR_PWM Time taken to drive motor after exiting from sleep mode SpdCtrlMd = 1 (PWM mode) SPEED > VDIG_IH; ISDen = 0; BrkDoneThr[2:0] = 0 350 ms tEN_SL_ANA Time-to-enter sleep mode SpdCtrlMd = 0 (analog mode) SPEED < VEN_SL; AvSIndEn = 0 5.2 ms tEN_SL_PWM Time-to-enter sleep mode SpdCtrlMd = 1 (PMW mode) SPEED < VDIG_IL; AvSIndEn = 0 58 ms RPD_SPEED_SL Internal SPEED pin pulldown resistance to ground VSPEED = 0 (sleep mode) 55 kΩ DIGITAL I/O (DIR INPUT AND FG OUTPUT) VDIR_H Input high 2.2 V VDIR_L Input low 0.6 V IFG_SINK Output sink current Vout = 0.3 V 5 mA I2C SERIAL INTERFACE VI2C_H Input high 2.2 V VI2C_L Input low 0.6 V LOCK DETECTION RELEASE TIME tLOCK_OFF Lock release time 5 s tLCK_ETR Lock enter time 0.3 s OVERCURRENT PROTECTION

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7.6 Typical Characteristics

Figure 1. Supply Current vs Power Supply Figure 2. Step-down Regulator Output vs Power Supply

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8 Detailed Description

8.1 Overview

The DRV10975 is a three-phase sensorless motor driver with integrated power MOSFETs, which provide drive current capability up to 1.5 A continuous. The device is specifically designed for low-noise, low external component count, 12-V motor drive applications. The device is configurable through a simple I2C interface to accommodate different motor parameters and spin-up profiles for different customer applications. A 180° sensorless control scheme provides continuous sinusoidal output voltages to the motor phases to enable ultra-quiet motor operation by keeping the electrically induced torque ripple small. The DRV10975 features extensive protection and fault detect mechanisms to ensure reliable operation. Voltage surge protection prevents the input Vcc capacitor from overcharging, which is typical during motor deceleration. The devices provides overcurrent protection without the need for an external current sense resistor. Rotor lock detect is available through several methods. These methods can be configured with register settings to ensure reliable operation. The device provides additional protection for undervoltage lockout (UVLO) and for thermal shutdown. The commutation control algorithm continuously measures the motor phase current and periodically measures the VCC supply voltage. The device uses this information for BEMF estimation, and the information is also provided through the I2C register interface for debug and diagnostic use in the system, if desired. A buck step-down regulator efficiently steps down the supply voltage. The output of this regulator provides power for the internal circuits and can also be used to provide power for an external circuit such as a microcontroller. If providing power for an external circuit is not necessary (and to reduce system cost), configure the buck step- down regulator as a linear regulator by replacing the inductor with resistor. TI designed the interfacing to the DRV10975 to be flexible. In addition to the I2C interface, the system can use the discrete FG pin, DIR pin, and SPEED pin. SPEED is the speed command input pin. It controls the output voltage amplitude. DIR is the direction control input pin. FG is the speed indicator output, which shows the frequency of the motor commutation. EEPROM is integrated in the DRV10975 as memory for the motor parameter and operation settings. EEPROM data transfers to the register after power on and exit from sleep mode. The DRV10975 device can also operate in register mode. If the system includes a microcontroller communicating through the I2C interface, the device can dynamically update the motor parameter and operation settings by writing to the registers. In this configuration, the EEPROM data is bypassed by the register settings.

U V W UVLO Over Current Lock Charge Pump Thermal WPre- Driver VCP VCC VPre- Driver PGND VCP VCC UPre- Driver PGND VCP VCC PWM and Analog Speed Control FG SDA SCL Oscillator Bandgap 3.3-/5-V Step- Down Regulator SW VREG 3.3-V LDO 1.8-V LDO V3P3 V1P8 SPEED ADC CPP CPN VCP GND I2C Communication Register EEPROM GND SWGND DIR DRV10975, DRV10975Z www.ti.com SLVSCP2D –JANUARY 2015–REVISED MARCH 2018 Product Folder Links: DRV10975 Submit Documentation FeedbackCopyright © 2015–2018, Texas Instruments Incorporated

8.2 Functional Block Diagram

3.3 V/5 V Load

3.3 V/5 V

8.3 Feature Description

8.3.1 Regulators

8.3.1.1 Step-Down Regulator

VregSel = 0, the regulator output voltage is 5 V, and when VregSel = 1, the regulator output voltage is 3.3 V. used for the device internal circuit only. Figure 3. Step-Down Regulator Configurations Characteristics. For example, it can work as a pullup voltage for the FG, DIR, SDA, and SCL interface. Both V1P8 and V3P3 capacitor must be connected to GND.

8.3.2 Protection Circuits

8.3.2.1 Thermal Shutdown

The OverTemp status bit (address 0x10 bit 7) is set during thermal shutdown.

8.3.2.2 Undervoltage Lockout (UVLO)

locked out when VCC is down to VUVLO_F and woke up at VUVLO_R.

8.3.2.3 Overcurrent Protection (OCP)

condition until the overcurrent is no longer present. The OverCurr status bit (address 0x10 bit 5) is set. device and motor (see Current Limit and Lock Detect and Fault Handling).

8.3.2.4 Lock

being locked (see Lock Detect and Fault Handling).

8.3.3 Motor Speed Control

functions can limit the PWM_DCO, which affects the output amplitude. Figure 4. Multiplexing the Speed Command to the Output Amplitude Applied to the Motor phase-to-phase voltage is sinusoidal.

pulse-width modulated. Figure 5 and Figure 6 show the sinusoidal encoding technique used in the DRV10975. Figure 5. PWM Output and the Average Value Figure 6. Representing Sinusoidal Voltages With Third-Order Harmonic Output peak amplitude is VCC / 2 (see Figure 7). Figure 7. Output Voltage Amplitude Adjustment

8.3.4 Sleep or Standby Condition

mode version. The register data is maintained, and the I2C interface remains active. condition. During a sleep or standby condition, the Slp_Stdby status bit (address 0x10, bit 6) will be set.

Table 1. Conditions to Enter or Exit Sleep or Standby Condition communication is disabled during the sleep condition.

8.3.5 Non-Volatile Memory

verify the programming is successful.

1. Write the desired motor parameters into the corresponding registers (address 0x20:0x2B) (see I2C Serial
2. Write 1011 0110 (0xB6) to enProgKey in the DevCtrl register.
3. Ensure that VCC is at or above 22 V.
4. Write eeWrite = 1 in EECtrl register to start the EEPROM programming.

The programming time is about 24 ms, and eeWrite bit is reset to 0 when programming is done.

8.4 Device Functional Modes

8.4.1 Motor Parameters

For the motor parameter measurement, see the DRV10983 and DRV10975 Tuning Guide. programmed by writing the values for Kt[6:0] in the MotorParam2 register.

8.4.1.1 Motor Phase Resistance

center tap, RPH_CT (see Figure 8).

For convenience, the encoded value for Rm[6:0] can also be obtained from Table 2. Table 2. Motor Phase Resistance Look-Up Table

8.4.1.2 BEMF Constant

1. Convert the measured Kt to a weighted digital value: Ktph_dig = 1442 × Kt
2. Encode the digital value such that Ktph_dig = Kt[3:0] << Kt[4:6].

digital value of 1 and an encoded Kt[6:0] value of 0x01h.

For convenience, the encoded value of Kt[6:0] may also be obtained from Table 3. Table 3. BEMF Constant Look-Up Table

8.4.2 Starting the Motor Under Different Initial Conditions

the three initial motor states.

8.4.2.1 Case 1 – Motor Is Stationary

If the motor is stationary, the commutation logic must be initialized to be in phase with the position of the motor. explain how to configure these techniques for use in the designer's system.

8.4.2.2 Case 2 – Motor Is Spinning in the Forward Direction

8.4.2.3 Case 3 – Motor Is Spinning in the Reverse Direction

achieves the shortest possible spin-up time in systems where the motor is spinning in the reverse direction. level and that the supply voltage does not surge as a result of energy being returned to the power supply. Figure 10. Start the Motor Under Different Initial Conditions

8.4.3 Motor Start Sequence

Figure 11 shows the motor start sequence implemented in the DRV10975. Figure 11. Motor Starting-Up Flow state on initial power-up or whenever the DRV10975 comes out of either standby or sleep modes. ISD State The MSS determines the initial condition of the motor (see ISD). than the threshold defined by ISDThr[1:0], the start sequence proceeds to the Forward judgment. Forward Judgment The MSS determines whether the motor is spinning in the forward or the reverse direction. spinning in the reverse direction, the MSS proceeds to the Speed>RvsDrThr. RvsDrThr[2:0], then the MSS advances to the RvsDrEn judgment.

advances to the BrkEn judgment. Reverse Drive). When it reaches zero velocity, the MSS transitions to the Accelerate state. BrkEn Judgment The MSS checks to determine whether the brake function is enabled (BrkDoneThr[2:0] ≠ 000). If the brake function is enabled, the MSS advances to the Brake state. Brake State The device performs the brake function (see Motor Brake). state, the MSS advances to the IPDEn judgment. enabled, the MSS transitions to the IPD state. Otherwise, it transitions to the align state. (IPD) . After the IPD completes, the MSS transitions to the Accelerate state. applying the accelerate settings, the MSS advances to the Speed > Op2ClsThr judgment. motor and restarts from the beginning.

8.4.3.1 ISD

does not perform the initial speed detect function and treats the motor as if it is stationary. Figure 12. Initial Speed Detect Function comparator output is leading the UV comparator by 60°, the motor is spinning in reverse. The motor speed is determined by measuring the time between two rising edges of either of the comparators.

amount of time can be programmed by setting the register bits ISDThr[1:0].

8.4.3.2 Motor Resynchronization

8.4.3.3 Reverse Drive

Figure 13. Reverse Drive Function spinning before a normal start-up sequence.

8.4.3.4 Motor Brake

is applied by turning on all three of the low-side driver FETs. the same as it would be for a motor starting in the stationary condition.

8.4.3.5 Motor Initialization

8.4.3.5.1 Align

is determined by OpenLCurr[1:0]. The motor should be aligned at the known position.

8.4.3.5.2 Initial Position Detect (IPD)

enabled by selecting IPDCurrThr[3:0] to any value other than 0000. minimum inductance is because of the alignment of the north pole of the motor with this particular driving state. Figure 14. IPD Function current flies back across the body diodes into the power supply (see Figure 16).

voltage surge cannot be contained and if it is unacceptable for the application, then select the recirculate mode. Figure 15. IPD Release Mode 0 Figure 16. IPD Release Mode 1 results in maximum initial torque. Applying maximum initial torque could result in uneven acceleration to the rotor. Select the IPDAdvcAgl[1:0] to allow for smooth acceleration in the application (see Figure 17). Figure 17. IPD Advance Angle

8.4.3.5.3 Motor Start

sufficient BEMF to allow the commutation control logic to accurately drive the motor. Table 4. Configuration Options for Controlling Open Loop Motor Start

8.4.3.6 Start-Up Timing

coefficient. Figure 18 shows the motor start-up process. Figure 18. Motor Start-Up Process initialize the motor with either align or IPD.

8.4.4 Start-Up Current Setting

optimizing the rate of acceleration. The limit takes effect during reverse drive, align, and acceleration.

should be noted that the rate of acceleration will be limited by the acceleration rate (StAccel[2:0], StAccel2[2:0]). as well as the drive state of the motor.

• ILimit is configured by OpenLCurr[1:0]
• Rm is configured by Rm[6:0]
• Speed is variable based open-loop acceleration profile of the motor
• Kt is configured by Kt[6:0] (3)

Figure 19. Motor Start-Up Current

8.4.4.1 Start-Up Current Ramp-Up

current applied to the motor. Figure 20. Motor Startup Current Ramp

8.4.5 Closed Loop

8.4.5.1 Half Cycle Control and Full Cycle Control

applied. The control logic is triggered only at the rising edge (see Figure 21). Figure 21. Closed Loop Control Commutation Adjustment Mode

8.4.5.2 Analog Mode Speed Control

The SPEED input pin can be configured to operate as an analog input (SpdCtrlMd = 0). speed command is to stop the motor. Figure 22 shows the speed command when operating in analog mode. Figure 22. Analog Mode Speed Command

8.4.5.3 Digital PWM Input Mode Speed Control

set to 0 or to 50 kHz when DoubleFreq bit is set to 1.

Figure 23. PWM Mode Speed Command

8.4.5.4 I2C Mode Speed Control

maximum speed command is set when SpdCtrl [8:0] is set to 0x1FF (511). SpdCtrl [7:0] is written to the SpeedCtrl1 register, the speed command is updated (see Figure 24). Figure 24. I2C Mode Speed Control

8.4.5.5 Closed Loop Accelerate

DRV10975 provides the option of limiting the maximum rate at which the speed command changes.

Figure 25. Closed-Loop Accelerate

8.4.5.6 Control Coefficient

loop will be less reactive to the noise on the feedback and provide for a smoother output.

8.4.5.7 Commutation Control Advance Angle

current of the motor is aligned with the BEMF voltage of the motor. Figure 26. Advance Time (tadv) Definition is selected. When CtrlAdvMd = 1, mode 1 is selected. tadv = tSETTING × (U-BEMF)/U.

• U is the phase voltage amplitude
• BEMF is phase BEMF amplitude (5)

Equation 6. For convenience, the available tSETTING values are provided in Table 5. Table 5. Configuring Commutation Advance Timing by Adjusting tSETTING

8.4.6 Current Limit

are described in the following sections. Table 6. DRV10975 Current Limit Modes

8.4.6.1 Acceleration Current Limit

the motor, U, as shown in Figure 27 and Equation 7. When the acceleration current limit is active, it does not stop the motor from spinning nor does it trigger a fault. The acceleration current limit function is only available in closed loop control. Figure 27. Acceleration Current Limit

8.4.7 Lock Detect and Fault Handling

damage to the system or the motor. is no motor connected to the system. motor restarts. The bits in the FaultCode register are set even if the lock detect scheme is disabled. fault condition, the system tries to restart after tLOCK_OFF.

Figure 28. Lock Detect and Fault Diagnose

8.4.7.1 Lock0: Lock Detection Current Limit Triggered

Set the lock detection current limit to a higher value than the acceleration current limit. Figure 29. Lock Detection Current Limit

8.4.7.2 Lock1: Abnormal Speed

the estimated speed is wrong, and the motor has gotten out of phase.

Figure 30. Lock Detection 1

8.4.7.3 Lock2: Abnormal Kt

condition. It is referred to as Ktc. Figure 31. BEMF Integration Figure 32. Abnormal Kt Lock Detect

8.4.7.4 Lock3 (Fault3): No Motor Fault

Figure 33. No Motor Error

8.4.7.5 Lock4: Open Loop Motor Stuck Lock

Lock4 is used to detect locked motor conditions while the motor start sequence is in open loop. then the open loop was unsuccessful as a result of a locked rotor condition.

8.4.7.6 Lock5: Closed Loop Motor Stuck Lock

the current commutation period is 2× longer than the previous period.

8.4.8 AVS Function

8.4.8.1 Mechanical AVS Function

Figure 34. Mechanical AVS

deceleration of the motor in applications where returning energy to the power supply is allowed.

8.4.9 PWM Output

shooting through. The recommend minimum dead time is 400 ns for 24-V VCC and 360 ns for 12-V VCC.

8.4.10 FG Customized Configuration

provides information about the driving state of the DRV10975.

8.4.10.1 FG Output Frequency

and 12-pole motors, as shown in Figure 35. electrical cycles (12 pole). speed is able to be measured by monitoring the rising edge of the FG output. Figure 35. FG Frequency Divider

8.4.10.2 FG Open-Loop and Lock Behavior

reflect the actual motor speed. During a locked motor condition, the FG output is driven high. selection of these options is determined by the FGOLsel[1:0] setting.

• Option0: Open loop output FG based on driving frequency
• Option1: Open loop no FG output (keep high)
• Option2: FG output based on driving frequency at the first power-on start-up, and no FG output (keep high) for any subsequent restarts

Figure 36. FG Behavior During Open Loop

8.4.11 Diagnostics and Visibility

The DRV10975 offers extensive visibility into the motor system operation conditions stored in internal registers. status, motor speed, supply voltage, speed command, motor phase voltage amplitude, fault status, and others. The data is updated on the fly.

8.4.11.1 Motor Status Readback

(Slp_Stdby), over current (OverCurr), and locked rotor (MtrLck).

8.4.11.2 Motor Speed Readback

of the motor is denoted as Velocity (Hz) and is calculated as shown in Equation 8.

8.4.11.2.1 Two-Byte Register Readback

Several of the registers such as MotorSpeed report data that is contained in two registers. is read when reading a two register value, use the following sequence. is read, the value of MotorSpeedBuffer[7:0] is sent. Figure 37. Two-Byte Register Readback

8.4.11.3 Motor Electrical Period Readback

as d as tELE_PERIOD (µs) and is calculated as shown in Equation 9. The motor electrical period and motor speed satisfies the condition of Equation 10.

8.4.11.4 BEMF Constant Readback

spinning. The result is stored in register MotorKt1 and MotorKt2. The relationship is shown in Equation 11.

8.4.11.5 Motor Estimated Position by IPD

position is stored in register IPDPosition. shown in Table 7. For more about information about IPD, see Initial Position Detect (IPD). Table 7. IPD Position Readback

8.4.11.6 Supply Voltage Readback

SupplyVoltage. The power supply voltage is recorded as shown in Equation 12.

8.4.11.7 Speed Command Readback

voltage (analog mode), or I2C data (I2C mode). This value is calculated as shown in Equation 13. Equation 13 shows how the speed command as a percentage can be calculated and set in SpeedCmd.

• DutySPEED = Speed command as a percentage
• SpeedCmd = Register value (13)

8.4.11.8 Speed Command Buffer Readback

Equation 14 shows how the buffered speed is calculated.

• DutyOUTPUT = The maximum duty cycle of the output PWM, which represents the output amplitude in percentage.
• spdCmdBuffer = Register value (14)

Figure 38. SpeedCmd and spdCmdBuffer Register

8.4.11.9 Fault Diagnostics

See Lock Detect and Fault Handling.

DRV10975, DRV10975Z SLVSCP2D –JANUARY 2015–REVISED MARCH 2018 www.ti.com Product Folder Links: DRV10975 Submit Documentation Feedback Copyright © 2015–2018, Texas Instruments Incorporated (1) R/W (2) Read only (3) EEPROM

8.5 Register Maps

8.5.1 I2C Serial Interface

The DRV10975 provides an I2C slave interface with slave address 101 0010. TI recommends a pullup resistor 4.7 kΩ to 3.3 V for I2C interface port SCL and SDA. Four read/write registers (0x00:0x03) are used to set motor speed and control device registers and EEPROM. Device operation status can be read back through 12 read-only registers (0x10:0x1E). Another 12 EEPROM registers (0x20:0x2B) can be accessed to program motor parameters and optimize the spin-up profile for the application.

8.5.2 Register Map

Register Name Address D7 D6 D5 D4 D3 D2 D1 D0 SpeedCtrl1(1) 0x00 SpdCtrl[7:0] SpeedCtrl2(1) 0x01 OverRide SpdCtrl[8] DevCtrl(1) 0x02 enProgKey[7:0] EECtrl(1) 0x03 sleepDis SIdata eeRefresh eeWrite Status(2) 0x10 OverTemp Slp_Stdby OverCurr MtrLck MotorSpeed1(2) 0x11 MotorSpeed[15:8] MotorSpeed2(2) 0x12 MotorSpeed[7:0] MotorPeriod1(2) 0x13 MotorPeriod[15:8] MotorPeriod2(2) 0x14 MotorPeriod[7:0] MotorKt1(2) 0x15 MotorKt[15:8] MotorKt2(2) 0x16 MotorKt[7:0] IPDPosition(2) 0x19 IPDPosition[7:0] SupplyVoltage(2) 0x1A SupplyVoltage [7:0] SpeedCmd(2) 0x1B SpeedCmd [7:0] spdCmdBuffer(2) 0x1C spdCmdBuffer[7:0] FaultCode(2) 0x1E Lock5 Lock4 Fault3 Lock2 Lock1 Lock0 MotorParam1(3) 0x20 DoubleFreq Rm[6:0] MotorParam2(3) 0x21 AdjMode Kt[6:0] MotorParam3(3) 0x22 CtrlAdvMd TCtrlAdv[6:0] SysOpt1(3) 0x23 ISDThr[1:0] IPDAdvcAgl[1:0] ISDen RvsDrEn RvsDrThr[1:0] SysOpt2(3) 0x24 OpenLCurr[1:0] OpLCurrRt[2:0] BrkDoneThr[2:0] SysOpt3(3) 0x25 CtrlCoef[1:0] StAccel2[2:0] StAccel[2:0] SysOpt4(3) 0x26 Op2ClsThr[4:0] AlignTime[2:0] SysOpt5(3) 0x27 LockEn[3:0] AVSIndEn AVSMEn AVSMMd IPDRlsMd SysOpt6(3) 0x28 SWiLimitThr[3:0] HWiLimitThr[2:0] SysOpt7(3) 0x29 LockEn5 ClsLpAccel[2:0] Deadtime[3:0] SysOpt8(3) 0x2A IPDCurrThr[3:0] LockEn4 VregSel IPDClk[1:0] SysOpt9(3) 0x2B FGOLsel[1:0] FGcycle[1:0] KtLckThr[1:0] SpdCtrlMd CLoopDis

Table 8. Default EEPROM

8.5.3 Register Definition

Table 9. Register Description 8 LSB of a 9-bit value used for the motor speed.

0 SpdCtrl [8]

MSB of a 9-bit value used for the motor speed. 8-bit byte use to enable programming in the EEPROM. by eeWrite = 1. Otherwise, enProgKey value is reset. 7 sleepDis Set to 1 to disable entering into sleep or standby mode. 6 SIdata Set to 1 to enable the writing to the configuration registers. 5 eeRefresh Copy EEPROM data to register. 4 eeWrite Bit used to program (write) to the EEPROM. 7 OverTemp Bit to indicate device temperature is over its limits. 6 Slp_Stdby Bit to indicate that device went into sleep or standby mode.

5 OverCurr

4 MtrLck Bit to indicate that the motor is locked.

3 N/A N/A

2 N/A N/A

1 N/A N/A

0 N/A N/A

Table 9. Register Description (continued) Motor Speed1(2) 0x11 7:0 MotorSpeed [15:8] 16-bit value indicating the motor speed. Always read the MotorSpeed1 first. Motor Period1(2) 0x13 7:0 MotorPeriod [15:8] 16-bit value indicating the motor period. Always read the MotorPeriod1 first. SpeedCmd(2) 0x1B 7:0 SpeedCmd[7:0] 8-bit value indicating the speed command based on analog or PWMin or I2C. FF indicates 100% speed command. Buffer(2) 0x1C 7:0 spdCmdBuffer [8:1] 8-bit value indicating the speed command after buffer output. FF indicates 100% speed command.

5 Lock5 Stuck in closed loop

4 Lock4 Stuck in open loop

3 Fault3 No motor

2 Lock2 Kt abnormal

1 Lock1 Speed abnormal

0 Lock0 Lock detection current limit

7 DoubleFreq 0 = Set driver output frequency to 25 kHz

7 AdjMode

See BEMF Constant and Table 3 .

7 CtrlAdvMd

3 ISDen 0 = Initial speed detect (ISD) disable

2 RvsDrEn 0 = Reverse drive disable

The threshold where device starts to process reverse drive (RvsDr) or brake.

7 FaultEn3

3 AVSIndEn Inductive AVS enable. Enabled when high.

1 AVSMMd

0 IPDRlsMd

VCC and 360 ns for 12-V VCC. 0001 = 0.4-A current threshold. xxxx = 0.2 A × (n + 1) current threshold.

2 VregSel

1 SpdCtrlMd

0 CLoopDis 0 = Transfer to closed loop at Op2ClsThr speed

3.3 V or 5 V

9 Application and Implementation

validate and test their design implementation to confirm system functionality.

9.1 Application Information

9.2 Typical Application

Figure 39. Typical Application Schematics for DRV10975 (Top Image) and DRV10975Z (Bottom Image)

9.2.1 Design Requirements

Table 10 provides design input parameters and motor parameters for system design. Table 10. Recommended Application Range Table 11. External Components

9.2.2 Detailed Design Procedure

1. See the Design Requirements section and make sure your system meets the recommended application
2. See the DRV10983 and DRV10975 Tuning Guide and measure the motor parameters.
3. See the DRV10983 and DRV10975 Tuning Guide. Configure the parameters using DRV10975 GUI, and
4. See the Programming Guide for the DRV10983 and Non-Volatile Memory section for burning tuned settings
5. Build your hardware based on Layout Guidelines.
6. Connect the device into system and validate your system solution.

9.2.3 Application Curves

Figure 40. DRV10975 Start-Up Waveform Figure 41. DRV10975 Operation Current Waveform

10 Power Supply Recommendations

user must place a 10-µF ceramic capacitor rated for VCC as close as possible to the VCC and GND pins. in the application, the user can reduce the value of the local ceramic capacitor to 1 µF.

11 Layout

11.1 Layout Guidelines

• Place VCC, GND, U, V, and W pins with thick traces because high current passes through these traces.
• Place the 10-µF capacitor between VCC and GND, and as close to the VCC and GND pins as possible.
• Place the capacitor between CPP and CPN, and as close to the CPP and CPN pins as possible.
• Connect the GND, PGND, and SWGND under the thermal pad.
• Keep the thermal pad connection as large as possible, both on the bottom side and top side. It should be one piece of copper without any gaps.

11.2 Layout Example

Figure 42. Layout Schematic

DRV10975, DRV10975Z SLVSCP2D –JANUARY 2015–REVISED MARCH 2018 www.ti.com Product Folder Links: DRV10975 Submit Documentation Feedback Copyright © 2015–2018, Texas Instruments Incorporated

12 Device and Documentation Support

12.1 Device Support

12.1.1 Third-Party Products Disclaimer

TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

12.2 Documentation Support

12.2.1 Related Documentation

For related documentation see the following:

• Texas Instruments, DRV10983 and DRV10975 Evaluation Module user's guide
• Texas Instruments, DRV10983 and DRV10975 Tuning Guide
• Texas Instruments, How to Design a Thermally-Efficient Integrated BLDC Motor Drive PCB application report
• Texas Instruments, Programming Guide for the DRV10983

12.3 Trademarks

PowerPAD, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners.

12.4 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

12.5 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

12.6 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

12.7 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most- current data available for the designated device. This data is subject to change without notice and without revision of this document. For browser-based versions of this data sheet, see the left-hand navigation pane.

www.ti.com 22-Mar-2018 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples DRV10975PWP ACTIVE HTSSOP PWP 24 60 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 DRV10975 DRV10975PWPR ACTIVE HTSSOP PWP 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 DRV10975 DRV10975RHFR PREVIEW VQFN RHF 24 3000 TBD Call TI Call TI -40 to 125 DRV10975ZPWP ACTIVE HTSSOP PWP 24 60 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 DRV10975Z DRV10975ZPWPR ACTIVE HTSSOP PWP 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 DRV10975Z PDRV10975RHFR ACTIVE VQFN RHF 24 1 TBD Call TI Call TI -40 to 125 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width.

www.ti.com 22-Mar-2018 Addendum-Page 2 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 9-Mar-2018 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DRV10975PWPR HTSSOP PWP 24 2000 367.0 367.0 38.0 DRV10975ZPWPR HTSSOP PWP 24 2000 367.0 367.0 38.0 PACKAGE MATERIALS INFORMATION www.ti.com 9-Mar-2018 Pack Materials-Page 2

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