PDI1284P11 PHILIPS | Alldatasheet

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Technical content

/C0080 /C0115 /C0111/C0110/C0111 /C0115 Product specification Supersedes data of 1997 Sep 15 PDI1284P11 3.3V Parallel interface transceiver/buffer

1999 Sep 17

Philips Semiconductors Product specification PDI1284P113.3V Parallel interface transceiver/buffer

21999 Sep 17 853–2036 22356

FEATURES

  • Asynchronous operation
  • 8-Bit transceivers
  • 6 additional buffer/driver lines peripheral to cable
  • 5 additional control lines from cable
  • 5V tolerant
  • ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model
  • Latch up protection exceeds 500 mA per JEDEC Std 19
  • Input Hysteresis
  • Low Noise Operation
  • IEEE 1284 Compliant Level 1 & 2
  • Overvoltage Protection on B/Y side for OFF-state
  • A side 3-State option
  • B side active or resistive pull up option
  • Cable side VCC for 5V or 3V operation

DESCRIPTION

The PDI1284P11 parallel interface chip is designed to provide an asynchronous, 8-bit, bi-directional, parallel interface for personal computers. The part includes all 19 signal lines defined by the IEEE1284 interface specification for Byte, Nibble, EPP, and ECP modes. The part is designed for hosts or peripherals operating at 3.3V to interface 3.3V or 5.0V devices. The 8 transceiver pairs (A/B 1-8) allow data transmission from the A bus to the B bus, or from the B bus to the A bus, depending on the state of the direction pin DIR. The B bus and the Y9-Y13 lines have either totem pole or resistor pull up outputs, depending on the state of the high drive enable pin HD. The A bus has only totem pole style outputs. All inputs are TTL compatible with at least 400mV of input hysteresis at V CC = 3.3V. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS Tamb = 25°C; GND = 0V TYPICAL UNIT R D B/Y Side output resistance VCC = 3.3V; VO = 1.65V ±0.2V (See Figure 2) 45 Ω R PU B/Y side pull up resistance VCC = 3.3V; Outputs, resistive pull up1.4K Ω SR B/Y Side slew rate R L = 62Ω ; CL = 50pF (See Waveform 4) 0.2 V/ns ICC Total static current VI = VCC /GND; IO = 0 5 µA VHYS Input hysteresis VCC = 3.3V 0.47 V tPLH /tPHL A –B/Y Propagation delay to the B/Y side outputs VCC = 3.3V 12.5/13.9 ns

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE ORDER CODE DRAWING NUMBER 48-pin plastic SSOP Type II 0°C to +70°C PDI1284P11 DL SOT370-1 48-pin plastic TSSOP Type II 0°C to +70°C PDI1284P11 DGG SOT362-1

Philips Semiconductors Product specification PDI1284P113.3V Parallel interface transceiver/buffer

1999 Sep 17 3

V CC PLHI A14 A15 A16 A17 HLHO DIR Y10 Y11 Y12 Y13 V CCB GND OEA VCCB PLHO C14 C15 C16 C17 HLHI SV00496 PIN DESCRIPTION PIN NUMBER SYMBOL FUNCTION 8, 9, 11, 12, 13, 14, 16, 17 A1 - A8 Data inputs/outputs 41, 40, 38, 37, 36, 35, 33, 32 B1 - B8 IEEE 1284 Std. outputs/inputs 2, 3, 4, 5, 6 A9 - A13 Data inputs 47, 46, 45, 44, 43 Y9 - Y3 IEEE 1284 Std. outputs 29, 28, 27, 26 C14 - C17 Control inputs (cable) 20, 21, 22, 23 A19 - A17 Control outputs (peripheral)

1 HD B/Y–side high drive

48 DIR Direction selection

19 PLHI Peripheral logic high input

(peripheral)

30 PLHO Peripheral logic high

output (cable)

25 HLHI Host logic high input

(cable)

24 HLHO Host logic high output

(cable) 10, 15, 39 GND Ground (0V) 7, 18 VCC Positive supply voltage 31, 42 VCCB Cable side power supply voltage 3V/5V

34 OEA A side output enable

Philips Semiconductors Product specification PDI1284P113.3V Parallel interface transceiver/buffer

1999 Sep 17 4

PINS WITH PULL UP RESISTORS TO LOAD CABLE PINS SYMBOL FUNCTION 47, 46, 45, 44, 43Y9 – Y13 Output cable drivers 35, 33, 32 B1 – B8 Output cable drivers 29, 28, 27, 26 C14 – C17 External cables control signal input FUNCTION TABLE DIR OEA HD INPUTS OUTPUTS OUTPUT TYPES X X X C14-17 A14-17 tP X X X HLHI HLHO tP X X L A9-13 Y9-13 rP X X H A9-13 Y9-13 tP X X L PLHI PLHO O.C. X X H PLHI PLHO tP H X L A1-8 B1-8 rP H X H A1-8 B1-8 tP L L X B1-8 A1-8 tP L H X A1-8 Z* L H X B1-8 rP* A = Side driving internal IC B = Side driving external cable (bidirectional) C = Side receiving control signals from internal cable Y = Side driving external cable (unidirectional) X = Don’t care – control signals in Z = High Z or 3-State O.C.= Open collector t P = Totem pole output rP = Resistive pull up: 1.4kΩ (nominal) on B/Y/C cable side and VCC . However, while a B/Y side output is Low as driven by a Low signal on the A side, that particular B/Y side resistor is switched out to stop current drain from V CC through it. * When DIR = L and OEA = H, the output signal is isolated from the input signal. B1 – 8 signals maintain an rP = 1.4kΩ on the input for this mode.

Philips Semiconductors Product specification PDI1284P113.3V Parallel interface transceiver/buffer

1999 Sep 17 5

ABSOLUTE MAXIMUM RATINGS 1, 2 SYMBOL PARAMETER CONDITIONS RATING UNIT ESD Immunity, per Mil Std 883C method 3015 /C00341 kV VCC DC supply voltage –0.5 to +4.6 V VCCB DC cable supply voltage –0.5 to +6.5 V IIK DC input diode current VI < 0 ±20 mA IOK DC output diode current VO < 0 ±50 mA VIN DC input voltage3 –0.5 to +5.5 V VOUT B/Y DC output voltage on B/Y side3 –0.5 to +5.5 V VOUT B/Y Transient output voltage on B/Y side4 40ns transient –2 to +7 V VOUT A DC output voltage on A side –0.5 to VCC +0.5 V IO DC output current Outputs in High or Low state ±50 mA Tstg Storage temperature range –60 to +150 °C ICC /IGND Continuous current through VCC or GND ±200 mA NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 4. V OUT B/Y (tr) guarantees only that this part will not be damaged by reflections in application so long as the voltage levels remain in the specified range. RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMITS UNITSYMBOL PARAMETER MIN MAX UNIT VCC DC supply voltage 3.0 3.6 V VCCB DC cable supply voltage 3.0 5.5 V VIH High level Input voltage 2.0 V VIL Low level input voltage 0.8 V VOUT B/Y B/Y output voltage –0.5 5.5 V VOUT A A side output voltage 0 VCC V IOH B/Y side output current High –14 mA IOL B/Y side output current Low 14 mA Tamb Operating free-air temperature range 0 +70 °C

Philips Semiconductors Product specification PDI1284P113.3V Parallel interface transceiver/buffer

1999 Sep 17 6

DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = 0°C to 70°C UNIT MIN TYP MAX VHYS , A, B Input hysteresis A, B, control inputs, VCC = 3.3V, VIL= 0.8, VIH = 2.0 0.4 V VIH, A, B, PLHI High-level input voltage VCC = 3.0 to 3.6V 2.0 V VIL, A, B, PLHI Low-level input voltage VCC = 3.0 to 3.6V 0.8 V VHYS , C Input hysteresis C Inputs, VCC = 3.3V 0.8 V VIH, C High-level input voltage C Inputs, VCC = 3.0 to 3.6V 2.3 V VIL C Low-level input voltage VCC = 3.0 to 3.6V 0.8 V VIH HLH High-level input voltage VCC = 3.6V 2.6 V VIL HLH Low-level input voltage VCC = 3.0 1.55 V RD P Output impedance VCC = 3.3V, VO = 1.65 /C00340.1V See Fig. 2 35 45 55 Ω RD N Output impedance VCC = 3.3V, VO = 1.65 /C00340.1V See Fig. 2 35 45 55 Ω R PU Pull up resistance VCC = 3.3V, outputs in high Z 1.15 1.4 1.65 kΩ VOH , B/Y High-level output voltage VCC = 3.0V, IOH = –14mA 2.23 V VOL , B/Y Low-level output voltage VCC = 3.0V, IOL = 14mA 0.77 V VO H , A High level output voltage IOH = –500µA, VCC = 3.0V 2.8 VOH , and HLH High-level output voltage IOH = –4mA, VCC = 3.0V 2.4 V VO L, A Low level output voltage IOL = 50µA, VCC = 3.0V 0.2 VOL , and HLH Low-level output voltage IOL = 4mA, VCC = 3.0V 0.4 V VO PLH High-level output voltage IOH = 500µA, VCC = 3.15V 3.1 VVO PLH Low-level output voltage IOL = 500µA, VCC = 3.0V 0.8 V ICC Quiescent supply current for VCC and VCCB under all conditions except when B or C inputs are LOW VCC = 3.6V, VCCB = 3.6V to 5.5V Vin = 0 or VCC ; VBin = VCCB Vcin = VCCB or Floating 0.1 100 µA VCC = VCCB = Vdir = 3.6V Vin = 0 or VCC ; Vcin = 0V 10 15 mA ICC 2 Quiescent supply current for VCCB when B or C inputs VCC = Vdir = 3.6V; VCCB = 5.5V Vin = 0 or VCC ; Vcin = 0V 16 20 ICCBL 2 for VCCB when B or C in uts are LOW VCC = VCCB = 3.6V; Vdir = 0V Vin =0 or VCC ; VBin = Vcin = 0V 30 40 mA VCC = 3.6V, VCCB = 5.5V; Vdir = 0V Vin = 0 or VCC ; VBin = Vcin = 0 V 47 60 Ioff Power off leakage current VO = 5.5V, VCC = VCCB = 0 /C0041100 µAoff C/B/Y side Pow er off leakage current VO = 5.5V, VCC = 0, VCCB = 4.5V ±100 µA Iin1 Input leakage current Input leakage current1 Vin = 0 to VCC ±1 µA IOZ 1 3-State output current VOUT = VCC or GND ±20 µA NOTES: 1. The pull up resistor on the B side outputs makes it impossible to test IOZ on the B side. This applies to the input current on the C side inputs as well. 2. Includes extra ICCB current from pull-up resistors, i.e. ICCBL = (#B + #C LOW inputs) * (VCCB/RPU ).

Philips Semiconductors Product specification PDI1284P113.3V Parallel interface transceiver/buffer

1999 Sep 17 7

GND = 0V, tR = tF = 3.0ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER TEST CONDITIONS WAVEFORMS Tamb = 0°C to +70°C UNIT MIN TYP MAX tpLH Propagation delay P a t hAt oBo rY 25 0 20 ns tpHL Propagation delay Path A to B or Y 2, 5 0 20 ns tpLH Propagation delay P a t hBt oA 25 0 12 ns tpHL Propagation delay Path B to A 2, 5 0 12 ns tpLH Propagation delay P a t hCt oA 25 ns tpHL Propagation delay Path C to A 2, 5 ns tpLH Propagation delay Path PLH 25 ns tpHL Propagation delay Path PLH 2, 5 ns tpLH Propagation delay Path HLH 25 ns tpHL Propagation delay Path HLH 2, 5 ns tslew Slew rate B or Y side outputs 4 0.05 0.4 V/ns tpHZ Output enable/ HD to Y or B 3 ns tpZH disable time R L = 500Ω 3 ns tDIFF Propagation delay differenceHD prop tpZH –tpHZ 10 ns tpHZ Output enable time HD to PLHO 3 20 ns tpZH O utput enable time R L = 500Ω 20 ns tpHZ 50 tpZH Output enable/ Dir to B R L = 250Ω Fig 1. 30 ns tpLZ disable time R L = 250Ω on the B/Y side tP load 50 ns tpZL 30 tpHZ 1 15 tpZH Output enable/ Dir to A Fig 1. 50 ns tpLZ disable time R L = 250Ω 15 ns tpZL 50 tpHZ 3 6 tpZH Output enable/ OEA to A Fig 1. 12 ns tpLZ disable time R L = 250Ω 6 ns tpZL 12

Philips Semiconductors Product specification PDI1284P113.3V Parallel interface transceiver/buffer

1999 Sep 17 8

VM = 1.5V VX = VOL ±0.3V VY = VOH –0.3V VOL and VOH are the typical output voltage drops that occur with the output load. (VCC never goes below 3.0V). VM tPLHtPHL VOH VOL SY00001 VM INPUTS GND OUTPUTS V = 2.7V Waveform 1. Input Bn to output An propagation delays tPLH tPHL SY00008 INPUT OUTPUT 2.4V 1.4V 0.4V VOUT VOUT –1.4V1.4V 1.4V Waveform 2. Voltage Waveforms Propagation Delay Times (A To B) Measured at Output Pin VCC OUTPUT LOW-to-OFF OFF-to-LOW VOL VOH OUTPUT HIGH-to-OFF OFF-to-HIGH GND tPZH VM VM VM VM VM tPZL tPHZ tPLZ outputs enabled outputs disabled outputs enabled DIR to A DIR to B HD to B VX VY SY00002 Waveform 3. 3-State enable and disable times 0.4V 2.4V 0.9V 0.4V t1 t2 t1 t2 2.4V 1.9V INPUT OUTPUT SY00007 Waveform 4. Slew Rate Voltage Waveforms on B/Y side (Input pulse rise and fall time are 3ns, 150ns /C0116 pulse width /C011610 µs, for both a Low to High and a High to Low transition.) Slew Rate measured between 0.4V and 0.9V - rising. Slew Rate measured between 2.4V and 1.9V - falling. Slew Rate measured at VOUT as specified in Waveform 5.

1999 Sep 17 9

R L = Load resistor; see AC CHARACTERISTICS for value. see AC CHARACTERISTICS for value. Figure 1. Load Circuitry for Bn to An Switching Times be calculated using the equation RD = VCC /2 /C0357 IO /C0357. Figure 2. Output Impedance RD

Philips Semiconductors Product specification PDI1284P113.3V Parallel interface transceiver/buffer

1999 Sep 17 10

SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1

Philips Semiconductors Product specification PDI1284P113.3V Parallel interface transceiver/buffer

1999 Sep 17 11

TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm SOT362-1

Philips Semiconductors Product specification PDI1284P113.3V Parallel interface transceiver/buffer

1999 Sep 17 12

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors

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P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381  Copyright Philips Electronics North America Corporation 1999 All rights reserved. Printed in U.S.A. Date of release: 09-99 Document order number: 9397 750 06421 /C0080 /C0115 /C0111/C0110/C0111 /C0115 Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Production Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Data sheet status [1] Please consult the most recently issued datasheet before initiating or completing a design.