PD78F0066

PD78F0066_15 RENESAS | Alldatasheet

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Technical content

Datasheet sections

• 8 Preliminary Product Information
• 2.1 Port Pins
• 2.2 Non-Port Pins
• 2.3 Recommended Connection of Unused Pins
• 5.1 Selection of Transmission Method
• 5.2 Function of Flash Memory Programming
• 5.3 Connection of Flashpro II

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© 1998 PRELIMINARY PRODUCT INFORMATION MOS INTEGRATED CIRCUIT Document No. U13419EJ1V0PM00 (1st edition) Date Published June 1998 N CP(K) Printed in Japan mPD78F0066 8-BIT SINGLE-CHIP MICROCONTROLLER

DESCRIPTION

The mPD78F0066 is a product of the mPD780065 Subseries in the 78K/0 Series. It is equivalent to the mPD780065 with a flash memory in place of internal ROMNote. Because this device can be written and erased electrically without being removed from the substrate, it is ideally suited for evaluation at system development, small-scale production, and for systems likely to be upgraded frequently. Note The internal ROM capacity is different (refer to 1. DIFFERENCES BETWEEN mPD78F0066 AND MASK ROM VERSIONS for details). Functions are described in detail in the following user’s manuals, which should be read when carrying out design work. mPD780065 Subseries User’s Manual : Under preparation 78K/0 Series User’s Manual Instruction : U12326E

FEATURES

• Pin-compatible with mask ROM versions (except VPP pin)
• Flash memory : 48 Kbytes Note
• Internal high-speed RAM : 1024 bytes
• Internal expansion RAM : 4096 bytes
• Buffer RAM : 32 bytes
• Operable with the same power supply voltage as that of mask ROM version (V DD = 2.7 to 5.5 V) Note The flash memory capacity can be changed with the memory size switching register (IMS). Remark For the differences between the flash memory versions and the mask ROM versions, refer to 1. DIFFERENCES BETWEEN mPD78F0066 AND MASK ROM VERSIONS .

ORDERING INFORMATION

Part Number Package Internal ROM mPD78F0066GC-8BT 80-pin plastic QFP (14 · 14 mm) Flash memory The information contained in this document is being issued in advance of the production cycle for the device. The parameters for the device may change before final production or NEC Corporation, at its own discretion, may withdraw the device prior to its production.

2 Preliminary Product Information

78K/0 SERIES PRODUCT DEVELOPMENT The following shows the 78K/0 Series products development. Subseries names are shown inside frames. Note Under planning 80-pin 80-pin Basic subseries for driving FIP, Display output total: 34 PD78044Hm PD78044Fm N-ch open drain was added to the PD78044F, Display output total: 34m PD78014m PD780001m PD78002m PD78014Ym PD78002Ym PD78083m PD780024YmPD780024m PD780034YmPD780034m PD78014Hm PD78018Fm PD78018FYm Control FIPTM drive 100-pin LCD drive IEBusTM supported 42/44-pin 64-pin 64-pin 64-pin 80-pin 100-pin 100-pin 100-pin 78K/0 Series Basic subseries for driving LCDs, On-chip UART Y subseries products are compatible with I2C bus. Products under development Products in mass production 80-pin 100-pin PD78054m PD78054Ym PD78064Bm PD78064m PD78064Ym EMI-noise reduced version of the PD78078m I/O and FIP C/D of the PD78044F were enhanced, Display output total: 53m EMI-noise reduced version of the PD78064m PD78058Fm PD78058FYm PD780058Y NotemPD780058m PD78070Am PD78070AYm PD78078m PD78078Ym 80-pin PD780308m PD780308Ym SIO of the PD78064 was enhanced and ROM, RAM capacity expandedm 100-pin Meter control 80-pin On-chip controller/driver for automotive meter drivePD780973m PD78075Bm100-pin PD780018AYm100-pin 64-pin 64-pin 64-pin 64-pin Timer was added to the PD78054 and external interface was enhancedm ROM-less version of the PD78078m EMI-noise reduced version of the PD78054m UART and D/A converter were added to the PD78014 and I/O was enhancedm A/D converter of the PD780024 was enhancedm PD780065m80-pin On-chip RAM of 5 Kbytes Serial I/O of the PD78018F was enhancedm Serial I/O of the PD78054 was enhanced and EMI-noise was reducedm EMI-noise reduced version of the PD78018Fm Serial I/O of the PD78078Y was enhanced and the function is limitedm Low-voltage (1.8 V) operation version of the PD78014, with larger selection of ROM and RAM capacities m A/D converter and 16-bit timer were added to the PD78002m A/D converter was added to the PD78002m Basic subseries for control On-chip UART, capable of operating at low voltage (1.8 V) PD780988m Inverter control 100-pin On-chip inverter control circuit and UART. EMI-noise was reduced I/O and FIP C/D of the PD78044H were enhanced, Display output total: 48 PD780232m80-pin For panel control. On-chip FIP C/D. Display output total: 53 m 64-pin PD78098Bm80-pin IEBus controller was added to the PD78054. EMI-noise was reducedm PD780208m PD780228m

3Preliminary Product Information The following lists the main functional differences between subseries products. Function ROM Timer 8-bit 10-bit 8-bit VDD ExternalSerial Interface I/O MIN. Subseries Name Capacity 8-bit 16-bitWatch WDT A/D A/D D/A ValueExpansion Control mPD78075B 32 K to 40 K4 ch 1 ch 1 ch 1 ch 8 ch — 2 ch 3 ch (UART: 1 ch) 88 1.8 V Available mPD78078 48 K to 60 K mPD78070A — 61 2.7 V mPD780058 24 K to 60 K2 ch 3 ch (time division 68 1.8 V UART: 1 ch) mPD78058F 48 K to 60 K 3 ch (UART: 1 ch) 69 2.7 V mPD78054 16 K to 60 K 2.0 V mPD780065 40 K to 48 K — 4 ch (UART: 1 ch) 60 2.7 V mPD780034 8 K to 32 K — 8 ch 3 ch (UART: 1 ch, time 51 1.8 V mPD780024 8 ch — division 3-wire: 1 ch) mPD78014H 2 ch 53 mPD78018F 8 K to 60 K mPD78014 8 K to 32 K 2.7 V mPD780001 8 K — — 1 ch 39 — mPD78002 8 K to 16 K 1 ch — 53 Available mPD78083 — 8 ch 1 ch (UART: 1 ch) 33 1.8 V — Inverter mPD780988 32 K to 60 K3 ch Note — 1 ch — 8 ch — 3 ch (UART: 2 ch) 47 4.0 V Available control FIP drive mPD780208 32 K to 60 K2 ch 1 ch 1 ch 1 ch 8 ch — — 2 ch 74 2.7 V — mPD780228 48 K to 60 K3 ch — — 1 ch 72 4.5 V mPD780232 16 K to 24 K 4 ch 2 ch 40 mPD78044H 32 K to 48 K2 ch 1 ch 1 ch 8 ch 1 ch 68 2.7 V mPD78044F 16 K to 40 K 2 ch LCD drive mPD780308 48 K to 60 K2 ch 1 ch 1 ch 1 ch 8 ch — — 3 ch (time division 57 2.0 V — UART: 1 ch) mPD78064B 32 K 2 ch (UART: 1 ch) mPD78064 16 K to 32 K IEBus mPD78098B 40 K to 60 K2 ch 1 ch 1 ch 1 ch 8 ch — 2 ch 3 ch (UART: 1 ch) 69 2.7 V Available supported Meter mPD780973 24 K to 32 K3 ch 1 ch 1 ch 1 ch 5 ch — — 2 ch (UART: 1 ch) 56 4.5 V — control Note 16-bit timer: 2 channels 10-bit timer: 1 channel

4 Preliminary Product Information

Internal Flash memory 48 Kbytes Note memory High-speed RAM 1024 bytes Expansion RAM 4096 bytes Buffer RAM 32 bytes Memory space 64 Kbytes General-purpose registers 8 bits · 32 registers (8 bits · 8 registers · 4 banks) Minimum instruction execution time On-chip minimum instruction execution time modification function clock selected When subsystem 122 ms (at 32.768-kHz operation) clock selected Instruction set • 16-bit operation

• Multiplication/division (8 bits · 8 bits, 16 bits ‚ 8 bits)
• Bit manipulation (set, reset, test, Boolean operation)
• BCD correction, etc. I/O ports • CMOS I/O : 60 A/D converter • 8-bit resolution · 8 channels Serial interface • 3-wire serial I/O mode : 1 channel
• 3-wire serial I/O mode (MAX. 32-byte on-chip automatic transmission/ reception function) : 1 channel
• 2-wire serial I/O mode : 1 channel
• UART mode : 1 channel Timer • 16-bit timer/event counter : 1 channel
• 8-bit timer/event counter : 2 channels
• Watch timer : 1 channel
• Watchdog timer : 1 channel Timer output 3 (8-bit PWM output capable: 2) Clock output 131 kHz, 262 kHz, 524 kHz, 1.05 MHz, 2.10 MHz, 8.38 MHz (main system clock: at 8.38-MHz operation) 32.768 kHz (subsystem clock: at 32.768-kHz operation) Vectored interrupt Maskable Internal : 13, External : 4 source Non-maskable Internal : 1 Software 1 Power supply voltage V DD = 2.7 to 5.5 V Operating ambient temperature T A = –40 to +85°C Package 80-pin plastic QFP (14 · 14 mm) Note The flash memory capacity can be changed with the memory size switching register (IMS).

5Preliminary Product Information PIN CONFIGURATION (Top View)

• 80-pin plastic QFP (14 · 14 mm) mPD78F0066GC-8BT Cautions 1. Connect the VPP pin directly to VSS0 in normal operation mode. 2. Connect the AVSS pin to VSS0 . Remark When the mPD78F0066 is used in application fields that require reduction of the noise generated from inside the microcontroller, the implementation of noise reduction measures, such as supplying voltage to V DD0 and VDD1 individually and connecting VSS0 and VSS1 to different ground lines, is recommended. ANI7 ANI6 ANI5 ANI4 ANI3 ANI2 ANI1 ANI0 AV REF RESET XT1 XT2 V PP V DD1 VSS1 P90/SCK31 P91/SO31 P92/SI31 P42/AD2 P43/AD3 P44/AD4 P45/AD5 P46/AD6 P47/AD7 P50/A8 P51/A9 P52/A10 P53/A11 P54/A12 P55/A13 P56/A14 P57/A15 V DD0 VSS0 P37 P36 P35 P34 P00/INTP0 P01/INTP1 P02/INTP2 P03/INTP3 P04 P05 P06 P07 P20/TI00/TO0 P21/TI01 P22/TI50/TO50 P23/TI51/TO51 P24 P25 P26 P27 P30 P31 P32 P33 AV SS P84/SI1 P83/SO1 P82/SCK1 P81/BUSY P80/STB P77 P76 P75/SDIO30 P74/SCK30 P73/RxD0 P72/TxD0 P71/ASCK0 P70/PCL P64/RD P65/WR P66/WAIT P67/ASTB P40/AD0 P41/AD1 80 79 78 77 76 75 74 73 72 71 70 69 68 64 63 62 6167 66 65 21 22 23 24 25 26 27 28 29 30 31 32 33 37 38 39 4034 35 36

6 Preliminary Product Information

RD : Read Strobe RESET : Reset RxD0 : Receive Data SCK1, SCK30, SCK31 : Serial Clock SDIO30 : Serial Data Input/Output SI1, SI31 : Serial Input SO1, SO31 : Serial Output STB : Strobe TI00, TI01, TI50, TI51 : Timer Input TO0, TO50, TO51 : Timer Output TxD0 : Transmit Data V DD0 , VDD1 : Power Supply VPP : Programming Power Supply VSS0 , VSS1 : Ground WAIT : Wait WR : Write Strobe X1, X2 : Crystal (Main system Clock) XT1, XT2 : Crystal (Subsystem Clock) A8 to A15 : Address Bus AD0 to AD7 : Address/Data Bus ANI0 to ANI7 : Analog Input ASCK0 : Asynchronous Serial Clock ASTB : Address Strobe AV REF : Analog Reference Voltage AV SS : Analog Ground BUSY : Busy INTP0 to INTP3 : Interrupt from Peripherals P00 to P07 : Port0 P20 to P27 : Port2 P30 to P37 : Port3 P40 to P47 : Port4 P50 to P57 : Port5 P64 to P67 : Port6 P70 to P77 : Port7 P80 to P84 : Port8 P90 to P92 : Port9 PCL : Programmable Clock

7Preliminary Product Information BLOCK DIAGRAM 16-bit TIMER/ EVENT COUNTER 8-bit TIMER/ EVENT COUNTER 50 8-bit TIMER/ EVENT COUNTER 51 WATCHDOG TIMER WATCH TIMER INTERRUPT CONTROL CLOCK OUTPUT CONTROL SERIAL INTERFACE 1 SERIAL INTERFACE 30 SERIAL INTERFACE 31 UART0 A/D CONVERTER TI00/TO0/P20 TI50/TO51/P22 TI51/TO51/P23 SI1/P84 SO1/P83 SCK1/P82 BUSY/P81 STB/P80 SI31/P92 SO31/P91 SCK31/P90 RxD0/P73 TxD0/P72 ASCK0/P71 ANI0 to ANI7 AV SS PCL/P70 AV REF INTP0/P00 to INTP3/P03 SDIO30/P75 SCK30/P74 TI01/P21 VDD0 VPPVSS1VSS0VDD1 RAM (5 K Bytes) 78K/0 CPU CORE FLASH MEMORY (48 K Bytes) PORT 0 PORT 2 PORT 3 PORT 4 PORT 5 PORT 6 PORT 7 PORT 8 PORT 9 EXTERNAL ACCESS SYSTEM CONTROL P00 to P07 P20 to P27 P30 to P37 P40 to P47 P50 to P57 P64 to P67 P70 to P77 P80 to P84 P90 to P92 AD0/P40 to AD7/P47 A8/P50 to A15/P57 RD/P64 WR/P65 WAIT/P66 ASTB/P67 RESET XT1 XT2

9Preliminary Product Information 1. DIFFERENCES BETWEEN mPD78F0066 AND MASK ROM VERSIONS The mPD78F0066 is a product provided with a flash memory that enables on-board writing, erasing, and rewriting of programs with the device mounted on the target system. The functions of the mPD78F0066 (except the functions specified for flash memory) can be made the same as those of the mask ROM versions by setting the memory size switching register (IMS). Table 1-1 shows the differences between the flash memory version (mPD78F0066) and the mask ROM version (mPD780065). Table 1-1. Differences between mPD78F0066 and Mask ROM Version Item mPD78F0066 Mask ROM Version Internal ROM structure Flash memory Mask ROM Internal ROM capacity 48 Kbytes Note 40 Kbytes IC pin Not provided Provided VPP pin Provided Not provided Note Flash memory capacity can be set to 40 Kbytes or 48 Kbytes by the memory size switching register (IMS). Caution There are differences in noise immunity and noise radiation between the flash memory and mask ROM versions. When pre-producing an application set with the flash memory version and then mass-producing it with the mask ROM version, be sure to conduct sufficient evaluations for the commercial samples (not engineering samples) of the mask ROM version.

10 Preliminary Product Information

1. PIN FUNCTIONS

2.1 Port Pins (1/2)

Pin Name I/O Function After Alternate Reset Function P00 to P03 I/O Port 0 Input INTP0 to 8-bit input/output port. INTP3 Input/output can be specified bit-wise. P04 to P07 When used as an input port, an internal pull-up resistor can be connected by — software. P20 I/O Port 2 Input TI00/TO0 P21 8-bit input/output port. TI01 P22 Input/output can be specified bit-wise. TI50/TO50 P23 When used as an input port, an internal pull-up resistor can be connected by TI51/TO51 P24 to P27 software. P30 to P37 I/O Port 3 Input — 8-bit input/output port. Input/output can be specified bit-wise. When used as an input port, an internal pull-up resistor can be connected by software. P40 to P47 I/O Port 4 Input AD0 to AD7 8-bit input/output port. Input/output can be specified bit-wise. When used as an input port, an internal pull-up resistor can be connected by software. P50 to P57 I/O Port 5 Input A8 to A15 8-bit input/output port. Input/output can be specified bit-wise. When used as an input port, an internal pull-up resistor can be connected by software. P64 I/O Port 6 Input RD P65 4-bit input/output port. WR Input/output can be specified bit-wise. P66 When used as an input port, an internal pull-up resistor can be connected byWAIT P67 software. ASTB P70 I/O Port 7 Input PCL P71 8-bit input/output port. ASCK0 P72 Input/output can be specified bit-wise. TxD0 P73 When used as an input port, an internal pull-up resistor can be connected by RxD0 P74 software. SCK30 P75 SDIO30 P76, P77 — P80 I/O Port 8 Input STB P81 5-bit input/output port. BUSY P82 Input/output can be specified bit-wise. SCK1 P83 When used as an input port, an internal pull-up resistor can be connected by SO1 P84 software. SI1

11Preliminary Product Information

2.1 Port Pins (2/2)

P90 I/O Port 9 Input SCK31 3-bit input/output port. P91 Input/output can be specified bit-wise. SO31 When used as an input port, an internal pull-up resistor can be connected by P92 software. SI31

2.2 Non-Port Pins (1/2)

Pin Name I/O Function After Alternate Reset Function INTP0 to Input External interrupt request input by which the effective edge (rising edge, falling Input P00 to P03 INTP3 edge, or both rising edge and falling edge) can be specified. TI00 Input External count clock input to 16-bit timer (TM0). Input P20/TO0 Capture trigger signal input to capture register (CR01) of TM0. TI01 Capture trigger signal input to capture register (CR00) of TM0. P21 TI50 External count clock input to 8-bit timer (TM50). P22/TO50 TI51 External count clock input to 8-bit timer (TM51). P23/TO51 TO0 Output 16-bit timer output. Input P20/TI00 TO50 8-bit timer output (shared with 8-bit PWM output). P22/TI50 TO51 P23/TI51 SI1 Input Serial interface serial data input. Input P84 SI31 Input P92 SO1 Output Serial interface serial data output. Input P83 SO31 Output P91 SDIO30 I/O Serial interface serial data input/output. Input P75 SCK1 I/O Serial interface serial clock input/output. Input P82 SCK30 Input P74 SCK31 Input P90 BUSY Input Busy input for serial interface automatic transmission/reception. Input P81 STB Output Strobe output for serial interface automatic transmission/reception. Input P80 RxD0 Input Serial data input for asynchronous serial interface. Input P73 TxD0 Output Serial data output for asynchronous serial interface. Input P72 ASCK0 Input Serial clock input for asynchronous serial interface. Input P71 PCL Output Clock output (for trimming of main system clock and subsystem clock). Input P70 AD0 to AD7 I/O Lower address/data bus for extending memory externally. Input P40 to P47 A8 to A15 Output Higher address bus for extending memory externally. Input P50 to P57 RD Output Strobe signal output for read operation of external memory. Input P64 WR Output Strobe signal output for write operation of external memory. Input P65 WAIT Input Inserting wait for accessing external memory. Input P66 ASTB Output Strobe output which externally latches address information output to port 4 Input P67 and port 5 to access external memory. ANI0 to ANI7 Input A/D converter analog input. Input —

12 Preliminary Product Information

2.2 Non-Port Pins (2/2)

AV REF Output A/D converter reference voltage input (shared with analog power supply). — — AV SS — A/D converter ground potential. Voltage equal to VSS0 or VSS1 .— — RESET Input System reset input. — — X1 Input Connecting crystal resonator for main system clock oscillation. — — X2 — —— XT1 Input Connecting crystal resonator for subsystem clock oscillation. — — XT2 — —— VDD0 — Positive power supply voltage for ports. — — VDD1 — Ground potential of ports. — — VSS0 — Positive power supply (except ports). — — VSS1 — Ground potential (except ports). — — VPP — Applying high-voltage for program write/verify. Connect directly to VSS0 or VSS1 —— in normal operation mode.

13Preliminary Product Information

2.3 Recommended Connection of Unused Pins

Table 2-1 shows the recommended connection of unused pins. Table 2-1. Recommended Connection of Unused Pins Pin Name I/O Recommended Connection when Not Used P00/INTP0 I/O Independently connect to V SS0 through resistor. P01/INTP1 P02/INTP2 P03/INTP3 P04 to P07 P20/TI00/TO0 Independently connect to V DD0 or VSS0 through resistor. P21/TI01 P22/TI50/TO50 P23/TI51/TO51 P24 to P27 P30 to P37 Independently connect to V DD0 or VSS0 through resistor. P40/AD0 to P47/AD7 Independently connect to V DD0 through resistor. P50/A8 to P57/A15 Independently connect to V DD0 or VSS0 through resistor. P64/RD P65/WR P66/WAIT P67/ASTB P70/PCL P71/ASCK0 P72/TxD0 P73/RxD0 P74/SCK30 P75/SDIO30 P76, P77 P80/STB P81/BUSY P82/SCK1 P83/SO1 P84/SI1 P90/SCK31 P91/SO31 P92/SI31 ANI0 to ANI7 Input Connect to V SS0 . XT1 Connect to V DD0 . XT2 — Leave open. AV REF Connect to VSS0 . AV SS VPP Directly connect to VSS0 or VSS1 .

14 Preliminary Product Information

1. MEMORY SIZE SWITCHING REGISTER (IMS) This register sets a part of internal memory unused by software. The memory map can be made the same as that of mask ROM versions with different types of internal ROM capacities by setting the memory size switching register (IMS). IMS is set with an 8-bit memory manipulation instruction. RESET input sets IMS to CFH. Caution To initialize the program, be sure to set IMS to the value shown in Figure 3-1. Also be sure to set IMS to the value shown in Figure 3-1 after resetting, because reset input sets IMS to CFH. Figure 3-1. Format of Memory Size Switching Register Table 3-1 shows the IMS set value to make the memory map the same as those of mask ROM versions. Table 3-1. Set Value of Memory Size Switching Register Target Mask ROM Versions IMS Set Value mPD780065 CAH RAM2 RAM1 RAM0 ROM3 ROM2 ROM1 ROM0 IMS Symbol FFF0H Address CFH After reset R/W R/W ROM3 ROM2 ROM1 ROM0 Selection of Internal ROM Capacity

40 Kbytes

48 Kbytes

Selection of Internal High-speed RAM Capacity 1024 bytes Setting prohibitedOthers

15Preliminary Product Information 4. INTERNAL EXPANSION RAM SIZE SWITCHING REGISTER (IXS) The internal expansion RAM size switching register (IXS) is the register that sets the internal expansion RAM capacity. IXS is set with a 1-bit memory manipulation instruction or an 8-bit memory manipulation instruction. RESET input sets IXS to 0CH. Caution To initialize the program, be sure to set IXS to 04H. Also be sure to set IXS to 04H after resetting, because reset input sets IXS to 0CH. Figure 4-1. Format of Internal Expansion RAM Size Switching Register IXRAM3 IXRAM2 IXRAM1 IXRAM0 IXS Symbol FFF4H Address 0CH After reset R/W R/W IXRAM3 IXRAM2 IXRAM1 IXRAM0 Selection of Internal Expansion RAM Capacity 4096 bytes Setting prohibitedOthers

16 Preliminary Product Information

1. FLASH MEMORY PROGRAMMING Writing to a flash memory can be performed without removing the memory from the target system (on-board). Writing is performed by connecting the dedicated flash programmer (Flashpro II) to the host machine and the target system. Also, writing to a flash memory can be performed on an adapter for flash memory writing, which is connected to Flashpro II. Remark Flashpro II is a product of Naitou Densei Machidaseisakusho Co., Ltd.

5.1 Selection of Transmission Method

Writing to a flash memory is performed using Flashpro II with a serial transmission mode. One of the transmission method is selected from those in Table 5-1. The selection of the transmission method is made by using the format shown in Figure 5-1. Each transmission method is selected by the number of V PP pulses shown in Table 5-1. Table 5-1. List of Transmission Method Transmission Method Channels Pin V PP Pulses 3-wire serial I/O 2 SCK31/P90 0 SO31/P91 SI31/P92 SCK1/P82 1 SO1/P83 SI1/P84 UART 1 TxD0/P72 8 RxD0/P73 Caution Select a transmission method always using the number of VPP pulses shown in Table 5-1.

17Preliminary Product Information Figure 5-1. Format of Transmission Method Selection

5.2 Function of Flash Memory Programming

Operations such as writing to a flash memory are performed by various command/data transmission and reception operations according to the selected transmission method. Table 5-2 shows major functions of flash memory programming. Table 5-2. Major Functions of Flash Memory Programming Function Description Reset Used to stop write operation and detect transmission cycle. Batch verify Compares the entire memory contents with the input data. Batch delete Deletes the entire memory contents. Batch blank check Checks the deletion status of the entire memory. High-speed write Performs write to the flash memory based on the write start address and the number of data to be written (number of bytes). Continuous write Performs continuous write based on the information input with high-speed write operation. Status Used to confirm the current operating mode and operation end. Oscillation frequency setting Sets the frequency of the resonator. Delete time setting Sets the memory delete time. Silicon signature read Outputs the device name and memory capacity, and device block information. 10 V VDD VPP VPP pulses (transmission method selection) On-board writing mode 12 n RESET VDD VSS VSS

18 Preliminary Product Information

5.3 Connection of Flashpro II

The connection of the Flashpro II and the mPD78F0066 differs according to the transmission method. The connection for each transmission method is shown in Figures 5-2 and 5-3. Figure 5-2. Connection of Flashpro II for 3-wire Serial I/O System Flashpro II VPP VDD RESET SCK SO SI GND VPP VDD RESET SCKn SIn SOn V SS PD78F0066 n = 1, 31 m Flashpro II VPP VDD RESET TxD RxD GND VPP VDD RESET RxD0 TxD0 V SS PD78F0066m Figure 5-3. Connection of Flashpro II for UART System

19Preliminary Product Information 6. PACKAGE DRAWING

80 PIN PLASTIC QFP (14·14)

ITEM MILLIMETERS INCHESNOTE Each lead centerline is located within 0.13 mm (0.005 inch) of its true position (T.P.) at maximum material condition. P80GC-65-8BT F 0.825 0.032 B 14.00 –0.20 0.551 +0.009 –0.008 S 1.70 MAX. 0.067 MAX. M 0.17 0.007 +0.001 –0.003 +0.03 –0.07 +0.009 –0.008 C 14.00 –0.20 0.551 +0.009 –0.008 A 17.20 –0.20 0.677 –0.008 G 0.825 0.032 H 0.32 –0.06 0.013 +0.002 –0.003 I 0.13 0.005 K 1.60 –0.20 0.063 –0.008 L 0.80 –0.20 0.031 +0.009 –0.008 N 0.10 0.004 P 1.40 –0.10 0.055 –0.004 Q 0.125 –0.075 0.005 –0.003 R3 ° 3°+7° –3° +7° –3° D 17.20 –0.20 0.677 –0.008 4160 4061 2180 201 M S Q R K M L A B C D JH I F G P N detail of lead end

20 Preliminary Product Information

APPENDIX A. DEVELOPMENT TOOLS The following development tools are available for developing systems using the mPD780065 Subseries. Refer to (5) Cautions when the development tools are used. (1) Language processing software RA78K/0 78K/0 Series common assembler package CC78K/0 78K/0 Series common C compiler package DF780065 Note Device file for the mPD780065 Subseries CC78K/0-L 78K/0 Series common C compiler library source file Note Under development (2) Flash memory writing tools Flashpro II Dedicated flash programmer for microcomputers incorporating flash memory (Part number: FL-PR2) FA-80GC Note Adapter for flash memory writing Note Under development (3) Debugging tools

• When using the IE-78K0-NS in-circuit emulator IE-78K0-NS 78K/0 Series common in-circuit emulator IE-70000-MC-PS-B Power supply unit for IE-78K0-NS IE-70000-98-IF-C Interface adapter necessary when a PC-9800 Series computer (except notebook-type personal computer) is used as host machine IE-70000-CD-IF PC card and interface cable necessary when a PC-9800 Series notebook-type personal computer is used as host machine IE-70000-PC-IF-C Interface adapter necessary when an IBM PC/AT TM or a compatible machine is used as host machine IE-780065-NS-EM4Note Probe board necessary when emulating the mPD780065 Subseries IE-78K0-NS-P01 I/O board necessary when emulating the mPD780065 Subseries NP-80GC Emulation probe for 80-pin plastic QFP (GC-8BT type) EV-9200GC-80 Socket to be mounted on the board of the target system for 80-pin plastic QFP (GC-8BT type) ID78K0-NS Integrated debugger for IE-78K0-NS SM78K0 78K/0 Series common system simulator DF780065 Note Device file for the mPD780065 Subseries Note Under development

21Preliminary Product Information

• When using the IE-78001-R-A in-circuit emulator IE-78001-R-A 78K/0 Series common in-circuit emulator IE-70000-98-IF-B Interface adapter necessary when a PC-9800 Series computer (except notebook-type personal IE-70000-98-IF-C computer) is used as host machine IE-70000-PC-IF-B Interface adapter necessary when an IBM PC/AT or a compatible machine is used as host IE-70000-PC-IF-C machine IE-78000-R-SV3 Interface adapter and cable necessary when an EWS is used as host machine IE-780065-NS-EM4Note Probe board necessary when emulating the mPD780065 Subseries IE-78K0-NS-P01 I/O board necessary when emulating the mPD780065 Subseries IE-78K0-R-EX1Note Emulation probe conversion board necessary when the IE-780065-NS-EM4 + IE-78K0-NS-P01 is used in the IE-78001-R-A. EP-78230GC-R Emulation probe for 80-pin plastic QFP (GC-8BT type) EV-9200GC-80 Socket to be mounted on the board of the target system for 80-pin plastic QFP (GC-8BT type) ID78K0 Integrated debugger for IE-78001-R-A SM78K0 78K/0 Series common system simulator DF780065 Note Device file for the mPD780065 Subseries Note Under development (4) Real-time OS RX78K/0 Real-time OS for 78K/0 Series MX78K0 OS for 78K/0 Series

22 Preliminary Product Information

(5) Cautions when the development tools are used

• The ID78K0-NS, ID78K0, and SM78K0 are used in combination with the DF780065.
• The CC78K/0 and RX78K/0 are used in combination with the RA78K/0 and DF780065.
• Flashpro II, FA-80GC, and NP-80GC are products of Naitou Densei Machidaseisakusho Co., Ltd. (TEL: (044) 822-3813). Contact an NEC distributor when purchasing these products.
• Refer to the 78K/0 Series Selection Guide (U11126E) for information on third party development tools.
• Host machines and OSs compatible with the software are as follows: Host Machine [OS] PC EWS PC-9800 Series [WindowsTM ] HP9000 Series 700 TM [HP-UXTM ] IBM PC/AT and compatible machines SPARCstation TM [SunOSTM ] Software [Japanese/English Windows] NEWS TM (RISC) [NEWS-OSTM ] RA78K/0 ÖNote Ö CC78K/0 ÖNote Ö ID78K0-NS Ö — ID78K0 ÖÖ SM78K0 Ö — RX78K/0 ÖNote Ö MX78K0 ÖNote Ö Note DOS based software

23Preliminary Product Information APPENDIX B. RELATED DOCUMENTS Documents Related Devices Document Name Document No. English Japanese mPD780065 Subseries User’s Manual To be prepared Under preparation mPD780065 Preliminary Product Information To be prepared Under preparation mPD78F0066 Preliminary Product Information This document U13419J 78K/0 Series User’s Manual - Instruction U12326E U12326J 78K/0 Series Instruction Table — U10903J 78K/0 Series Instruction Set — U10904J Development Tool Documents (User’s Manual) Document Name Document No. English Japanese RA78K0 Assembler Package Operation U11802E U11802J Assembly Language U11801E U11801J Structured Assembly Language U11789E U11789J RA78K Series Structured Assembler Preprocessor EEU-1402 U12323J CC78K/0 C Compiler Operation U11517E U11517J Language U11518E U11518J CC78K/0 C Compiler Application Note Programming Know-How U13034E U13034J CC78K Series Library Source File — U12322J IE-78K0-NS To be prepared To be prepared IE-78001-R-EM To be prepared To be prepared IE-780065-NS-EM4 To be prepared To be prepared EP-78230 EEU-1515 EEU-985 SM78K0 System Simulator Windows Based Reference U10181E U10181J SM78K Series System Simulator External Part User Open U10092E U10092J Interface Specifications ID78K0-NS Integrated Debugger PC Based Reference U12900E U12900J ID78K0 Integrated Debugger EWS Based Reference — U11151J ID78K0 Integrated Debugger PC Based Reference U11539E U11539J ID78K0 Integrated Debugger Windows Based Guide U11649E U11649J Caution The contents of the above related documents are subject to change without notice. The latest documents should be used for design, etc.

24 Preliminary Product Information

Embedded Software Documents (User’s Manual) Document Name Document No. English Japanese 78K/0 Series Real-time OS Basics U11537E U11537J Installation U11536E U11536J OS for 78K/0 Series MX78K0 Basics U12257E U12257J Other Related Documents Document Name Document No. English Japanese Semiconductor Device Mounting Technology Manual C10535E C10535J Quality Grades on NEC Semiconductor Devices C11531E C11531J NEC Semiconductor Device Reliability/Quality Control System C10983E C10983J Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD)C11892E C11892J Guide to Quality Assurance for Semiconductor Devices MEI-1202 — Microcomputer Product Series Guide — U11416J Caution The contents of the above related documents are subject to change without notice. The latest documents should be used for design, etc.

25Preliminary Product Information [MEMO]

26 Preliminary Product Information

1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS

Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it.

2 HANDLING OF UNUSED INPUT PINS FOR CMOS

Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS device behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to V DD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices.

3 STATUS BEFORE INITIALIZATION OF MOS DEVICES

Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function.

27Preliminary Product Information NEC Electronics Inc. (U.S.) Santa Clara, California Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288 NEC Electronics (Germany) GmbH Duesseldorf, Germany Tel: 0211-65 03 02 Fax: 0211-65 03 490 NEC Electronics (UK) Ltd. Milton Keynes, UK Tel: 01908-691-133 Fax: 01908-670-290 NEC Electronics Italiana s.r.1. Milano, Italy Tel: 02-66 75 41 Fax: 02-66 75 42 99 NEC Electronics Hong Kong Ltd. Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044 NEC Electronics Hong Kong Ltd. Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411 NEC Electronics Singapore Pte. Ltd. United Square, Singapore 1130 Tel: 65-253-8311 Fax: 65-250-3583 NEC Electronics Taiwan Ltd. Taipei, Taiwan Tel: 02-719-2377 Fax: 02-719-5951 NEC do Brasil S.A. Cumbica-Guarulhos-SP, Brasil Tel: 011-6465-6810 Fax: 011-6465-6829 NEC Electronics (Germany) GmbH Benelux Office Eindhoven, The Netherlands Tel: 040-2445845 Fax: 040-2444580 NEC Electronics (France) S.A. Velizy-Villacoublay, France Tel: 01-30-67 58 00 Fax: 01-30-67 58 99 NEC Electronics (France) S.A. Spain Office Madrid, Spain Tel: 01-504-2787 Fax: 01-504-2860 NEC Electronics (Germany) GmbH Scandinavia Office Taeby, Sweden Tel: 08-63 80 820 Fax: 08-63 80 388 Regional Information Some information contained in this document may vary from country to country. Before using any NEC product in your application, please contact the NEC office in your country to obtain a list of authorized representatives and distributors. They will verify:

• Device availability
• Ordering information
• Product release schedule
• Availability of related technical literature
• Development environment specifications (for example, specifications for third-party tools and components, host computers, power plugs, AC supply voltages, and so forth)
• Network requirements In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary from country to country. J98. 2

No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product. M4 96.5 FIP and IEBus are trademarks of NEC Corporation. MS-DOS and Windows are either registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. PC/AT and PC DOS are trademarks of International Business Machines Corporation. HP9000 Series 700 and HP-UX are trademarks of Hewlett-Packard Company. SPARCstation is a trademark of SPARC International, Inc. SunOS is a trademark of Sun Microsystems, Inc. NEWS and NEWS-OS are trademarks of Sony Corporation. The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such.