PD70224 MICROSEMI | Alldatasheet
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IdealBridge™ Dual MOSFET-based Bridge Rectifier <> Microsemi Power Matters.”
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.”
1 Revision History
1.1 Revision 2.0 Revision 2.0 was published in January 2018. The following is a summary of changes in revision 2.0 of this document: © The formatting of this document was updated to the latest template. ® Updated SOA Graph to show Test Methodology and discuss protection recommendations. © MSL3 compliance added © Recommended Protection Scheme moved to the Application Note “ Design for PD System Surge Immunity" 1.2 Revision 1.1 Revision 1.1 was published in July 2015. In revision 1.1 of this document, maximum SUPP_Sx current, application information, adding SOA graph. Also, updated MSL level was added. 1.3 Revision 1.0 Revision 1.0 was published in March 2015. In revision 1.0 of this document, ESD was updated. 1.4 Revision 0.72 Revision 0.72 was published in May 2014. In revision 0.72 of this document, dimensions to recommended layout add IMAX_LOAD was added. 1.5 Revision 0.7 Revision 0.7 was published in May 2014. It was the first publication of this document. Microsemi Proprietary and Confidential. PD70224 Datasheet 1
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.”
2 Product Overview
PD70224 is a dual pack of MOSFET-based full-bridge rectifiers. It contains low-Ros 0.16 Q N-channel MOSFETs for much higher overall efficiency and higher output power, particularly when used in Powered Devices for Power over Ethernet (PoE) applications. The entire drive circuitry for driving the MOSFETs is on-chip, including a charge pump for driving the high-side N-channel MOSFETs. The total forward drop (bridge offset) introduced by the IdealBridge™ rectifier is only 192 mV at 0.6A, compared to a standard bridge rectifier that typically presents 2000 mV of forward drop. PD70224 IdealBridge™ can support over 1A current, making it the ideal choice not only for modern energy-saving 2-pair applications compliant with IEEE802.3af and IEEE802.3at (Type 1 and Type 2), but also 4-pair Powered Devices such as 60 watt and POH (Power over HDBase-T, 95W). In addition, PD70224 is capable of helping to identify at the physical layer itself whether a 2-pair PSE or a 4-pair PSE is providing power over the cable. It does that by sensing the voltage on the line (un-rectified) side of the pairs.
2.1 Features
- Active circuit with low forward-drop to replace dissipative passive diode bridges © Self-contained drive circuitry for MOSFETs © Designed to support IEEE802.3af/at, UPOE and Power over HDBase-T (PoH) © Integrated 0.16 Q N-Channel MOSFETs for 0.32 Q total path resistance © “Power present” indicator signals for identifying 4-pair bridge power © Low leakage, < 10 yA during detection © Wide operating voltage range up to 57 V © =-40°C to +85°C ambient © Available in 40 pin package © MSL3, ROHS Compliant
2.2 Applications
© Power over Ethernet (all IEEE compliant 2-pair modes) © Proprietary 4-pair standards, UPOE (Universal PoE), IEEE802.3bt and POH Figure 1 ¢ Dual Conventional Bridge versus Single Ideal Bridge mia mis ‘a | a four <o Son GAS Ina Iza 5 i WAG oe wie wie as ONS Dual single Conventional Deidge IdcalDridge™ PD70z24 Microsemi Proprietary and Confidential. PD70224 Datasheet 2
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters
3 Functional Descriptions
The following figure shows the functional blocks of PD70224. Figure 2 ¢ Block Diagram PD70224 Vow Oscillator Reference (Shou Vooos1 Chip Supply SUPP_SAC—_} 1A [> IN2a [_> tt Polarity 12 aa Detection and WAEN [> Gate Drives {__> OUTN Bridge Rectifier “A” shown here. All of this is duplicated for Bridge Rectifier "B”, except for the blocks in dark-gray/black above. Microsemi Proprietary and Confidential. PD70224 Datasheet 3
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.” Bridge Rectifier “A” (powered with The MOSFETs and active bridge circuitry is guaranteed to tum ON at a threshold set between ‘MDI or MDI-X) 23.1V and 32V. Below that threshold, rectifier operation is through their body diodes only ‘ouTP Twisted Pair Ga e | Rest of PD and jal peach Grayed-out FETs a3 aa (Q2 and Q3) not t conducting SUPP_SA | our en SUPP_SA positive with L | respect to OUTN. Twisted Pair Qi and Q4 conducting. Q1 is high side, so it needs boosted Gate drive rail. Q4 is low-side so it does not need boosted Gate drive rail. Q2 and Q3 not conducting. Their Gates are held at the voltage of their respective Source terminals. oma eles ‘ouTP Twisted Pair & at Mls im NA ait Rest of PD nll °. ine epeton Grayed-out FETs 1s (Q1 and Q4) not supp_sA ‘> conducting : OUTN INA L SUPP_SA positive with respect to OUTN Twisted Pair Q2 and Q3 conducting. Q2 is high side, so it needs boosted Gate drive rail. 03 is low- side so it does not need boosted Gate drive rail. Qi and Q4 not conducting. Their Gates are held at the voltage of their respective Source terminals
3.1 Purpose of Charge Pump
In the case that follows, the FETs connected to OUTP (the "high-side" FETs) are the ones that require a boosted Gate drive rail so they can be turned ON. The on-chip charge pump provides the boosted Gate drive rail for the high-side FETs. The FETs connected to OUTN ("low-side" FETs) do not need a boosted drive rail to be turned ON.
3.2 Purpose and Use of Supply Pins
Since the twisted pair set is delivering power, in the following case, SUPP_SA is positive with respect to OUTN. But if these two twisted pairs were not connected to a PSE, SUPP_SA would be low. For a standard 2-pair or 4-pair PDs with two bridge rectifiers (4-pairs), one connected to the data pairs, the other to the spare pairs, the presence of high voltage on SUPP_SA and/or SUPP_SB will indicate whether the data pairs or spare pairs, or both, are connected to PSEs. So SUPP_SA and SUP_SA and/or SUPP_SB will indicate whether the data pairs or spare pairs, or both, are connected to PSEs. So SUPP_SA and SUPP_SB can be used to indicate 2-pair or 4-pair PoE operation. Microsemi Proprietary and Confidential. PD70224 Datasheet 4
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters
4 Electrical Specifications
Performance is not necessarily guaranteed over this entire range. These are maximum stress ratings only. Exceeding these ratings, even momentarily, can cause immediate damage, or negatively impact long-term operating reliability. Table 1 ¢ Absolute Maximum Ratings Parameter Min = Max Units INA, IN2B, IN2A, IN2B to OUTN 03 74 v INA to IN2A 03-74 v IN2B to IN2B 03 74 v INA, IN2B, IN2A, IN2B to OUTP 74 v INA, INA to INIB 03 74 v INA, IN2A to IN2B 03 74 v OUTP to OUTN 03 74 v OUTP to INIA, IN1B, IN2A, IN2B 03 74 v SUPP_SA, SUPP_SB to OUTN 03 74 v WA_EN to OUTN 03 55 v tna, Ine (currents through bridge A or B) 15 A Junction Temperature 150 °C Lead Soldering Temperature (40s, reflow) 260 °C Storage Temperature “65 150 C ESD rating HEM 212508 MM #100 v com £2000 v 1. All pins pass 1250v, Except IN1A and IN2A that Pass 1000v Note: EPAD1 is connected by copper plane on PCB to OUTP, and EPAD2 is similarly connected to OUTN. OUTN is ground for IC. Microsemi Proprietary and Confidential. PD70224 Datasheet 5
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.”
4.2 Operating Ratings
Performance is generally guaranteed over this range as provided under Electrical Characteristics (see page 6). Table 2 © Operating Ratings Parameter Min = Max Units INA, IN1B to OUTN 57 v IN2A, IN2B to OUTN 57 v WA_EN to OUTN 03 5 v Junction Temperature 40,125 °C. Port Current (In) 0 15 OA
4.3 Electrical Characteristics
Unless otherwise specified under conditions, the Min and Max ratings stated below apply over the entire specified operating ratings of the device. Typ values stated are either by design or by production testing at 25°C ambient. Table 3 © Typical Electrical Performance ‘Symbol Parameter Conditions Min Typ Max Units Vive Input Voltage for Bridge “x”, where x is “A” 87 v or “8”, ‘la Differential Quiescent Current 6 10 HA 2.5V< Vin <10.1V; I(Vin=10.1V) ~ I{Vin=2.5V); No load between OUTP and OUTN; No load on SUPP_Sx. pins. la ‘Quiescent Current 85 HA
10.2 V< Vine < 23 V;
(single bridge) No load between OUTP & OUTN; No load on SUPP_Sx. pins. 900 WA Quiescent Current (both bridge combined) Vine = 58V; No load between OUTP & OUTN; No load on SUPP_Sx. pins. Vrorw_on ‘Active turn-on voltage of FETS 231 275 32 v Vest Turn-on voltage hysteresis 04 v Tar Alternate input voltage polarity — Delay time 200 ms required (Vin = OV) while alternating input voltage polarity Microsemi Proprietary and Confidential. PD70224 Datasheet 6
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.” ‘Symbol Parameter Conditions Min Typ Max Units Vorrser Bridge offset @ Off state 18) OV Vinu-< Virion, two body diodes in series lin = 40mA_ Ros FET Drain to Source Resistance b= 0.6AT: = 25°C 016 0.26 Q b= 0.6A; 038 ~ 40°C $ Ts 125°C hk Leakage Current (Reverse) Vout — Vourn = 57V 80 HA Vero Backfeed Voltage Between input 27 terminals with 100 KO resistor across them and 57V between OUTP and OUTN Maximum Forward Current (per bridge) 045 = A buon below Vrunn_ow arxon 1s A Maximum Forward Current (per bridge) above Vive on. Per bridge, while only one bridge out of the two is active. Iwwxiowm Maximum Load Current (per device) above V 2 rn runv_on. Per device while two bridges are active and each bridge is supporting half load Vo.sure Maximum voltage drop between INx to ‘Supp_Sx Loaded with 2 Vv SUPP_Sx pins. 100 kA resistor wax _surr Maximum current to consume from SUPP_Sx. 10 mA pins. Vie WA_EN- Input high logic 135 Vv Vie WA_EN-- Input low logic 105. Microsemi Proprietary and Confidential. PD70224 Datasheet 7
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.”
5 Pin Descriptions
The following illustration is a representation of PD70224 device, as seen from the top and bottom view. Figure 5 ¢ Internal Construction and Pinout PD70224 j Pa : < ss 23 §§ LES SC BEBE , .TMSGets our Fe] Fa] ove ea 5) our fy la ES ove a — a our [2] Ee] cure O (Pin 41) = el i” .) = me = ws { l [1 Pe) nis Cc o nz8 [SJ * | =I ii fat f>| PS) ints CJ C) inp [SJ eo mb ea) eves feist ey abt soy ee ra a | i EPAD2 - = Os = (Pin 42) oum fey 2 [=] om te C) oun Lee ==_ I PS cum St s oun Ce] [5] ourw C — ECBEGBES SER TOSTE ar << TOP VIEW BOTTOM VIEW 6x8 MLPQ — 40L 6x8 MLPQ — 40L Table 4 « Pin Description Pin Number Pin Description PD70224 Designator MLP-Quad 52 lead 12,3 our Rectified positive (upper) rail shared by both bridges 4 NA. Not applicable (pin not present) 5,67,8 IN2B Input “2” of bridge rectifier number B 9 NA. Not applicable (pin not present) 40, 11, 12 OUTN Rectified negative (lower) rail shared by both bridges 13,14 IN2A Input “2” of bridge rectifier number A. Same as Pins 39 and 40. * 15 NA. Not applicable (pin not present) 16 SUPP_SA _Input power supply detect pin for bride rectifier number A. Goes high when pairs connected to this bridge are powered by the PSE. NAL Not applicable (pin not present) 7 SUPP_SB _Input power supply detect pin for bride rectifier number B. Goes high when pairs connected to this bridge are powered by the PSE.
18 NAL Not applicable (pin not present)
Microsemi Proprietary and Confidential. PD70224 Datasheet 9
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.” Pin Number Pin Description PD70224 Designator MLP-Quad 52 lead 19, 20 INIA Input “1” of bridge rectifier number A. ? 21, 22, 23 OUTN Rectified negative (lower) rail shared by both bridges, same as Pins 10, 11 and 12. 24 NA. Not applicable (pin not present) 25, 26,27,28 INIB Input “1” of bridge rectifier number B 29 NA. Not applicable (pin not present) 30, 31, 32 ouTP Rectified positive (upper) rail shared by both bridges. Same as Pins 1, 2 and 3 33,34 INIA Input “1” of bridge rectifier number A. Same as Pins 19 and 20. ? 35 NA. Not applicable (pin not present)
36 WA_EN While this input is low (referenced to OUTN) the chip work according to internal flow
diagram. When this input is high, it enable wall adapter feature, that is, turn OFF internal switches and act as regular diode bridge. NA. Not applicable (pin not present)
37 NC Not connected; do not connect externally (leave floating)
38 NA. Not applicable (pin not present) 39, 40 IN2A Input “2” of bridge rectifier number A. Same as Pins 13 and 14. ¢ a1 EPADI. Connect to OUTP on PCB
42 EPAD2 Connect to OUTN on PCB
- These pins are not shorted to pins 39 and 40 inside the device. The device functionality relies on a copper trace on the PCB, between pins 13, 14, 39 and 40. 2. These pins are not shorted to pins 33 and 34 inside the device. The device functionality relies ona copper trace on the PCB, between pins 33, 34, 19 and 20. 3. These pins are not shorted to pins 19 and 20 inside the device. The device functionality relies ona copper trace on the PCB, between pins 33, 34, 19 and 20. 4. These pins are not shorted to pins 13 and 14 inside the device. The device functionality relies ona copper trace on the PCB, between pins 13, 14, 39 and 40. Microsemi Proprietary and Confidential. PD70224 Datasheet 10
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.”
6 Package Information
6.1 Package Outline Drawing
Figure 6 ¢ PD70224 Package Outline Drawing 40 Pin QFN 6x8 (mm) L D + Ad out Lb L2 t r O i roo D a ; | T q F 41 | =) q 5 : E 5 q | & 5 q ke | es ims) D2 cq D q 2Q qj 7 +o -A3 |K 4 no.»zon.n Al “er X- depopulated pin Table 5 ¢ Package Measurements Dim Millimeters Inches MIN MAX MIN MAX A 0.80 1.00 0.031 (0.039 AL 0.00 0.05) 0 0.002 a3 0.20 REF 0.008 REF b 0.18 0.30 0.007 0.012 D 6.00 BSC 0.236 BSC E 8.00 BSC 0.315 BSC 2 4.25 4.50 0.167 0.177 £2 6.35 6.6 0.250 0.260 £3 3.50 3.75 0.138 (0.148 4 2.20 2.46 0.087 (0.097 e 0.50 BSC 0.020 Bsc K 1.016 - 0.0400 u 037 057 0.014 0.022 2 0.30 0.50 0.012 0.020 1. Dimensions do not include protrusions; these shall not exceed 0.155mm (.006”) on any side. Lead dimension shall not include solder coverage. 2. Dimensions are in millimeters, inches for reference only. Microsemi Proprietary and Confidential. PD70224 Datasheet FEN
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.”
6.2 Thermal Specifications
The following table lists the thermal specifications of PD70224. Table 6 ¢ Thermal Properties Thermal Resistance Min Typ = Max —_Units Bn 31 “c/w Ox 25 “cw Oc 5 “c/w Note: The 6.x numbers assume no forced airflow. Junction Temperature is calculated using T: = Ta + (Po x ®.a). In particular, 81a is a function of the PCB construction. The stated number above is for a four-layer board in accordance with JESD-51 (JEDEC). PD70224 Recommended PCB layout for 40 Pin QFN 6x8 (mm) Recommended PCB layout pattern for PD70224 is described in the following three figures. Pad of pins number 4, 9, 15, 18, 24, 29, 35 and 38 are missing from the layout because it do not exist in package. Figure 7 © PD70224 Top layer Copper Recommended PCB Layout (mm) oO 4,37 R fan) ow oa fs Re) 0] oO UU UU U a) cI No) i) a te) Cc Cc}— Mm i) a ou i) fom) nw a > my t = o 0 ao W) a ae a O° — a INU a “+7 00 00 00 i——— 6. 40 Microsemi Proprietary and Confidential. PD70224 Datasheet 2
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.” Figure 8 ¢ PD70224 Top layer Solder Mask, Solder Paste and Vias Recommended PCB Layout (mm) x 4,37 ee) = 4.06 fe vt oOo U _ (pO 00 00 5 = [=] a DO lnomNW ig) = le ol| aaa fee) al ee) os? Bk |S
0 Ts *
OY ©) O loo) foe) a) a Ste a wile Ol a 1.68 e 3,76 Figure 9 e PD70224 Bottom layer Copper and Solder Paste Recommended PCB Layout for Thermal Pad Array (mm) 37 a - a to} [o} [oO] [9] O Ww | n CU |fof of [of {eo} afd © | hu omoloifol} 1! i © 71 a D co |fo} [o} [o} [9] ou a | ina ~ |folfolfon fel So ———o 0.61 i e 112 25 J Microsemi Proprietary and Confidential. PD70224 Datasheet 13,
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.”
7 Application Information
PD70224 application is described in the following paragraph.
7.1 Peripheral devices
PD applications utilizing PD70224 IC should use 1nF/100V ceramic capacitor at Bridge A inputs and at Bridge B inputs. A unidirectional 58V TVS should be placed between device output pins. An 10K ohm resistor should be placed on SUPP_SA and SUPP_SB lines between PD70224 and PD70210A device. When WA_EN function is not used connect WA_EN pin to OUTN Pin. When WA_EN function is used connect a 10V/100nF capacitor between WA_EN pin and OUTN Pin. The Devices are presented in Figure 6 and Figure 7.
7.2 Operation with an External DC Source
PD applications utilizing PD70224 IC may be operated with an external power source (DC wall adaptor). There are two cases of providing power with an external source, the cases are presented in the figures. 1. External source connected to application’s low voltage supply rails. External source voltage level is dependent on DCDC output characteristics. This connection is not affected by the PD70224 use. 2. External source connected to PD device output connection toward the application (VPP to VPNOUT). External source voltage level is dependent on DCDC input requirements. Figure 10 ¢ External Power Input Connected to Application Supply Rails (2) input Po P7026 Datas from] can | [aber z on came [YF] t lee np SS fi oer | le Microsemi Proprietary and Confidential. PD70224 Datasheet 14
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.” R3, R4 and R5 sets PD70210A disable threshold and PD70224 disable threshold. PD70210A disable threshold should be set so that it will always be lower than PD70224 disable threshold. 1 Volt is a good choice for the margin between the two. So, in case of 44V-57V external adapter, the disable setting can be selected as follows: PFET enable threshold = 35V. PD70224 disable threshold = 43V. R1 and R2 setting should be so that the value of Q1 VGS < 20V at max voltage condition of external adapter. While external adapter voltage is above 35V, Q1 will be above its VGSth value. VGS = Vext_adapter x mt = vext_adapter xX ~~ ACOPIT RIF RD Suppose VGSth is 3.5V thus we will set VGS=5V. R1 is selected as 2KQ. | Vext_adapter — VGS = — vVGs Using R1=2KQ, Vext_adapter=30V and VGS= maximum VGSta =3.5V. we get R2 value. R2 = 15K. = PD70210A_Wa_en = Vext_adapter_PD70210A x —-—— (R3 + R4) REZSRI Vext_adapter —VGS = RL x — +. vas R3, R4 and RS are set using the following two equations: Microsemi Proprietary and Confidential. PD70224 Datasheet 16
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.” RS (I) PD70224_Wa_en = Vext_adapter_PD70224 x ——_ (R3+R4+R5) R4+R5 (Il) | PD70210A_Wa_en = Vext_adapter_PD70210A x ————— (R3+R4+R5) Set R3, R4 and RS up to few KQ. At equation (I) set Vext_adapter_PD70224 =44V and from PD70224 data sheet PD70224_WA_EN=1. 35V. At equation (II) set Vext_adapter_PD70210A=(minimum Vext_adapter_PD70224 -1V) and from PD_IC data sheet PD70210A_WA_EN=2.4V. RS is selected as 620. Solving the two equations plus accuracy and verifying that PD70210A is always disconnected before PD70224, we get the optimum resistors values for an adapter of adapter of 36V and above. R3 = 15KQ R4 = 8200. R5 = 6200
7.3 Design Example
Next four figures illustrates the layout of PD70224 EVB evaluation board for reference. The board is two layers PCB. U2 is PD70224. This board can be ordered from Microsemi. Figure 13 ¢ PD70224 EVB PCB Silk Top PD70210/A EVB O :
3 J, saree] sP= eae Ce
P=] Eb dhacst i a ie wa eniaze 219 | i 0 - aT vO mee = | |Z cure ours oure ours vent HA ott PR-1415-E00 0C APPROVAL . © Microsemi Microsemi Proprietary and Confidential. PD70224 Datasheet 7
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.” Figure 14 PD70224 EVB PCB Silk Bottom
2 MPs ATs
° q a bevel : Figure 15 « PD70224 EVB PCB Top Copper : - 9 e ay = . e | ° | =a TTT? TTT e—! Ee? i | Ey ry ee T Gs . Figure 16 « PD70224 EVB PCB Bottom Copper . e RY ne si, ee e° x) @ ee rr . P.S Microsemi Proprietary and Confidential. PD70224 Datasheet 18
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.”
8 Ordering Information
Table 7 ¢ Ordering Information Part Number Ambient Type Package Packaging Part Marking Temperature Type PD702241LQ. ~~ 40°C to 85°C RoHS compliant, Pb- MLP-Quad (40 Bulk/Tube ‘Microsemi Logo PD702241L0- free, MSL3 lead) Tape and sc TR Reel PD70224 FReat YYwwazz? 1. F R e4: F = FAB Code, R = Product revision code and e4 = 2nd level interconnect. 2. YY = Year, WW = Week, A = Assembly location, and ZZ = Assembly Lot sequence code. Microsemi Proprietary and Confidential. PD70224 Datasheet 19
IdealBridge™ Dual MOSFET-based Bridge Rectifier ay Microsemi Power Matters.” Azo mss owt rprsetton, groin eating th nfoston conse reno tbo products and seat 4 Zz for any particular purpose, nor does Microsemi assume any liability whatsoever arising out of the application or use of any product oF circuit. The _ ‘mission-critical equipment or applications. Any performance specifications are believed to be reliable but are not verified, and Buyer must conduct and = | Completa perormance and oe tesng ofthe posits alone and together ith, orintle in,anyendproduts ayer shal nt ey on any data Power Matters. _and performance specifications or parameters provided by Microsemi. It is the Buyer's responsibility to independently determine suitability of any. cre Corporate Headaurters broducs ad to eta verity the same. The infrmaton proved by Microsemi erende proved "as where and wth a at, nd the One tmertse, Ase Vee, Entei ssacted wth sich norman ently th te Bayer Microsemi does ot ran exp or mpl, to any arty any patent hs, caszese use fcanses or anyother rights, wheter th gad t such infomation self or anthngGessibed by sich information. ifomatonprovied inthis ‘in the US: 4 (00783-4113 document proprietary to Microsemi, and Mose eserves the right to make any changes to the infomation inthis dacument oto any products Cul te us 45) 3806100 and serves st any ine without oti. Fae el a9) 2154096 Ema sates supprt@ moses com ‘wizovani Corporation (Wandog: MSC] offers compahansive porto of semiconductor and ear sktion or aaripac & defense, vmumirsentom Communion, dats center and indus! mares Products incu hgh performance and rato hardened analog ted nterated Score corpeaton, Aliighs reserved Microsemi andthe wiouens sti FPGA, SoCs and AI power management prod, ing nd ychonzation devs and pec me ston, eting the Wons Excel oration, Bs eed Mose ane Mice Stanard fr tine vie pocesing devices sltions, Grete components enterprise storge and communication seltios; sear tchelogies lan dears of Mose Croraon Alte and salable ants tamper products themet soon; Powerover Ethernet Is and mispans as well custom dein capitis and sees. IMcosenis headquartered ls Vo Cafoi, and ho appovnately 4.20 employees ably Learn more at ww mire com Po-000206655 Microsemi Proprietary and Confidential. PD70224 Datasheet 20