PD57030-E STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 Electrical data
  • 1.1 Maximum ratings
  • 1.2 Thermal data
  • 2 Electrical characteristics
  • 2.1 Static
  • 2.2 Dynamic
  • 3 Impedance
  • 4 Typical performance
  • 5 Test circuit
  • 6 Package mechanical data
  • 7 Revision history

RF POWER transistor, LDMOST plastic family N-Channel enhancement-mode lateral MOSFETs General features ■ Excellent thermal stability ■ Common source configuration ■ POUT = 30W with 14dB gain @ 945MHz / 28V ■ New RF plastic package

Description

The PD57030 is a common source N-Channel, enhancement-mode lateral Field-Effect RF power transistor. It is designed for high gain, broad band commercial and industrial applications. It operates at 28 V in common source mode at frequencies up to 1 GHz. PD57030 boasts the excellent gain, linearity and reliability of ST’s latest LDMOS technology mounted in the first true SMD plastic RF power package, PowerSO-10RF . PD57030’s superior linearity performance makes it an ideal solution for base station applications. The PowerSO-10 plastic package, designed to offer high reliability, is the first ST JEDEC approved, high power SMD package. It has been specially optimized for RF needs and offers excellent RF performances and ease of assembly. Mounting recommendations are available in www.st.com/rf/ (look for application note AN1294) Pin connection PowerSO-10RF (formed lead) PowerSO-10RF (straight lead) Gate Source Drain Order codes Part number Package Packing PD57030-E PowerSO-10RF (formed lead) Tube PD57030S-E PowerSO-10RF (straight lead) Tube PD57030TR-E PowerSO-10RF (formed lead) Tape and reel PD57030STR-E PowerSO-10RF (straight lead) Tape and reel

1 Electrical data

1.1 Maximum ratings

1.2 Thermal data

Table 1. Absolute maximum ratings (TCASE = 25°C) Table 2. Thermal data

2 Electrical characteristics

2.1 Static

2.2 Dynamic

Table 3. Static Table 4. Dynamic

3 Impedance

Figure 1. Current conventions Table 5. Impedance data

4 Typical performance

Figure 2. Capacitance vs supply voltage Figure 3. Drain current vs Figure 4. Gate-source voltage vs

Figure 5. Output power vs input power Figure 6. Input return loss vs output power Figure 7. Power gain vs output power Figure 8. Efficiency vs output power

960 MHz925 MHz

945 MHz

925 MHz

960 MHz

Figure 9. Output power vs bias current Figure 10. Efficiency vs bias current Figure 11. Output power vs drain voltage Figure 12. Efficiency vs drain voltage

925 MHz 945 MHz

Figure 13. Output power vs

5 Test circuit

Figure 14. Test circuit schematic Table 6. Test circuit component part list

6 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com

Figure 17. Package dimensions Table 7. PowerSO-10RF Formed lead (Gull Wing) Mechanical data

Figure 18. Package dimensions Table 8. PowerSO-10RF Straight Lead Mechanical data

Figure 19. Tube information

Figure 20. Reel information

7 Revision history

Table 9. Revision history 07-Aug-2006 1 Initial release.