PD54003-E STMICROELECTRONICS | Alldatasheet
Document overview
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- PDF pages: 28
Technical content
Datasheet sections
- 1 Electrical data
- 1.1 Maximum ratings
- 1.2 Thermal data
- 2 Electrical Characteristics
- 2.1 Static
- 2.2 Dynamic
- 3 Impedance
- 4 Typical performance
- 5 Test circuit
- 6 Circuit layout
- 7 Common source s-parameter
- 8 Mechanical Data
- 9 Revision history
RF POWER transistor, LDMOST plastic family N-channel enhancement-mode, lateral MOSFETs General features ■ Excellent thermal stability ■ Common source configuration ■ POUT = 3W with 12dB gain @ 500MHz ■ New RF plastic package
Description
The PD54003 is a common source N-channel, enhancement-mode lateral Field-Effect RF power transistor. It is designed for high gain, broadband commercial and industrial applications. It operates at 7V in common source mode at frequencies of up to 1GHz. The PD54003 features the excellent gain, linearity and reliability of ST’s latest LDMOS technology, the PowerSO-10RF. The superior linearity performance makes it an ideal solution for portable radios. The PowerSO-10RF is the first true Surface- mount Device (SMD) plastic RF power package. It is based on the highly reliable PowerSO-10, the first ST-originated, JEDEC-approved, high-power SMD package. It has been optimized specifically for RF requirements, and offers excellent RF performance as well as ease of assembly. Surface-mount recommendations are available in Pin connection PowerSO-10RF (formed lead) PowerSO-10RF (straight lead) Gate Source Drain Order codes Part number Package Packing PD54003-E PowerSO-10RF (formed lead) Tube PD54003S-E PowerSO-10RF (straight lead) Tube PD54003TR-E PowerSO-10RF (formed lead) Tape and reel PD54003STR-E PowerSO-10RF (straight lead) Tape and reel
1 Electrical data
1.1 Maximum ratings
1.2 Thermal data
Table 1. Absolute maximum ratings (TCASE = 25°C) Table 2. Thermal data
2 Electrical Characteristics
2.1 Static
2.2 Dynamic
Table 3. Static Table 4. Dynamic
3 Impedance
Figure 1. Current conventions Table 5. Impedance data
4 Typical performance
Figure 2. Capacitance vs. drain voltage Figure 3. Drain current vs. gate voltage Figure 4. Gate-source voltage vs. case
Figure 5. Output power vs. Figure 6. Power gain vs. output power Figure 7. Drain efficiency vs. Figure 8. Return loss vs. output power
480 MHz
500 MHz
520 MHz
Figure 9. Output power vs. Figure 10. Drain voltage vs. bias current Figure 11. Output power vs. Figure 12. Drain efficiency vs. supply voltage
Figure 13. Output power vs.
500 MHz 520 MHz
Figure 14. Output power vs. Figure 15. Power gain vs. output power Figure 16. Drain efficiency vs. Figure 17. Return loss vs. output power
480 MHz 500 MHz
Figure 18. Output power vs. Figure 19. Drain efficiency vs. bias current
Figure 20. Output power vs. Figure 21. Drain efficiency vs. Figure 22. Output power vs.
5 Test circuit
Figure 23. Test circuit schematic Table 6. Test circuit component part list
6 Circuit layout
Figure 24. Test fixture component layout Figure 25. Test circuit photomaster
7 Common source s-parameter
Table 7. S-parameter
Table 8. S-parameter
Table 9. S-parameter
Table 10. S-parameter
Table 11. S-parameter
Table 12. S-parameter
Mechanical data PD54003-E, PD54003S-E
8 Mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com
Figure 26. Package dimensions Table 13. PowerSO-10RF Formed lead (Gull Wing) Mechanical data
Figure 27. Package dimensions Table 14. PowerSO-10RF Straight Lead Mechanical data
Figure 28. Tube information
Figure 29. Reel information
9 Revision history
Table 15. Revision history 21-Mar-2006 1 Initial release.