PD250DF230ZLST

DS250DF230 TI1 | Alldatasheet

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ADVANCE□INFORMATION VDD RX0P RX0N RX1P RX1N CAL_CLK_IN CAL_CLK_OUT ADDR0 ADDR1 TEST0 /RCK0 SDC (1) READ_EN_N ALL_DONE_N SDA (1) INT_N TX0P TX0N TX1P TX1N GND (1) SMBus signals need to be pulled up elsewhere in the system.

30.72 MHz or 25 MHz

7RQH[WGHYLFH¶V CAL_CLK_IN Float for SMBus Slave mode, or connect to next GHYLFH¶V5($'_EN_N for SMBus Master mode 2.5V or 3.3V To other open-drain interrupt pins VDD 0.01 F (2x) 0.1 F (2x) SMBus Slave mode SMBus Slave mode 2.5 V RX EN_SMB Address straps (pull-up, pull- down, or float) 1 NŸ To system SMBus CDR TX RX TX THR /TEST1 X CDR Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to change without notice. DS250DF230 SNLS637 –AUGUST 2018 DS250DF23025-GbpsMulti-Rate2-ChannelRetimer

1 Features

1• Dual-Channel Multi-Rate Retimer With Integrated Signal Conditioning

• All Channels Lock Independently From 19.6 to

25.8 Gbps (Including Sub-Rates, Such as

12.16512 Gbps, 9.8304 Gbps, 6.144 Gbps, and More)

• Ultra-Low Latency: <500 ps Typical for 25.78125- Gbps Data Rate
• Adaptive Continuous Time Linear Equalizer (CTLE)
• Continuous Adaptive Decision Feedback Equalizer (DFE) and Adaptation Algorithm, Capable to Compensate Large Channel Loss Variation Over Temperature
• Combined Equalization Supporting 35-dB Channel Loss at 12.9 GHz
• On-Chip Eye-Opening Monitor (EOM), PRBS Pattern Checker and Generator
• Low-Jitter Transmitter With 3-Tap FIR Filter
• Integrated 2×2 Cross-Point
• Recovered Clock Available for System Clock Synchronization Applications on Channel 0
• Single Power Supply, No Low-Jitter Reference Clock Required
• Wide Stay-In-Lock Temperature Range

2 Applications

• Jitter Cleaning for Front-Port Optical Interface in Wireless and Wired Systems
• Backplane/Mid-Plane Reach Extension
• Active Cable Assemblies
• 802.3bj 100GbE, InfiniBand EDR, and OIF-CEI- 25G-LR/MR/SR/VSR Electrical Interfaces
• SFP28, QSFP28, CFP2/CFP4, CDFP

3 Description

The DS250DF230 is a dual-channel multi-rate retimer with integrated signal conditioning. The device is used to extend the reach and robustness of long, lossy, crosstalk-impaired high-speed serial links and while achieving a bit error rate (BER) of 10–15 or less. Each channel of the DS250DF230 independently locks to serial data rates in a continuous range from 19.6 Gbps to 25.8 Gbps or to any supported sub-rate (÷2 and ÷4), including key data rates such as 12.16512 Gbps, 9.8304 Gbps, 6.144 Gbps. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) DS250DF230 NFBGA (36) 5.00 mm × 5.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic

ADVANCE□INFORMATION DS250DF230 SNLS637 –AUGUST 2018 www.ti.com Product Folder Links: DS250DF230 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Table of Contents

7 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. DATE REVISION NOTES August 2018 * Initial release.

ADVANCE□INFORMATION DS250DF230 www.ti.com SNLS637 –AUGUST 2018 Product Folder Links: DS250DF230 Submit Documentation FeedbackCopyright © 2018, Texas Instruments Incorporated

5 Description (continued)

The DS250DF230 has a single power supply and minimal need for external components. These features reduce PCB routing complexity and BOM cost. The advanced equalization features of the DS250DF230 include a low-jitter 3-tap transmit finite impulse response (FIR) filter, an adaptive continuous-time linear equalizer (CTLE), and an adaptive decision feedback equalizer (DFE). This enables reach extension for lossy interconnect and backplanes with multiple connectors and crosstalk. The integrated CDR function is available for front-port optical module applications to reset the jitter budget and retime the high-speed serial data. The DS250DF230 supplies 2x2 cross-point that gives the host lane crossing, fanout, and multiplexing options. The DS250DF230 can be configured either through the SMBus or through an external EEPROM. Up to 16 devices can share an EEPROM using common-channel configuration. A non-disruptive on-chip eye monitor and a PRBS generator and checker is available for in-system diagnostics.

ADVANCE□INFORMATION DS250DF230 SNLS637 –AUGUST 2018 www.ti.com Product Folder Links: DS250DF230 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated

6 Device and Documentation Support

6.1 Device Support

6.1.1 Development Support

For additional information, see TI’s Surface Mount Technology (SMT) References at: http://focus.ti.com/quality/docs under the Quality & Lead (Pb)-Free Data menu. Click here to request access to the DS250DF230 IBIS Model (SNLM215) in the DS250DF230 MySecure folder.

6.2 Documentation Support

6.2.1 Related Documnetation

For related documentation, see the following:

• DS250DF230EVM User's Guide (SNLU238)
• DS2x0DF810, DS250DFx10, DS250DF230 Programmer's Guide (SNLU182) Click here to request access to these documents in the DS250DF230 MySecure folder.

6.3 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

6.4 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

6.5 Trademarks

E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

6.6 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

6.7 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

7 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

ADVANCE□INFORMATION DS250DF230 www.ti.com SNLS637 –AUGUST 2018 Product Folder Links: DS250DF230 Submit Documentation FeedbackCopyright © 2018, Texas Instruments Incorporated (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PRE_PROD Unannounced device, not in production, not available for mass market, nor on the web, samples not available. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. space (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) space (3) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. space (4) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. space (5) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device space (6) Multiple Device markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Important Information and Disclaimer: The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

7.1 Package Option Addendum

7.1.1 Packaging Information

Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish(3) MSL Peak Temp (4) Op Temp (°C) Device Marking(5)(6) DS250DF230ZLSR PREVIEW DSBGA ZLS 36 3000 TBD SNAGCU TBD -40 to 85 D250DF230 DS250DF230ZLST PREVIEW DSBGA ZLS 36 250 TBD SNAGCU TBD -40 to 85 D250DF230 PD250DF230ZLST ACTIVE DSBGA ZLS 36 250 TBD SNAGCU TBD -40 to 85 P250DF230

ADVANCE□INFORMATION Reel Width (W1) REEL DIMENSIONS W Dimension designed to accommodate the component length Dimension designed to accommodate the component thickness Overall width of the carrier tape Pitch between successive cavity centers Dimension designed to accommodate the component width TAPE DIMENSIONS B0 W A0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket Quadrants Sprocket Holes Q1 Q1Q2 Q2 Q3 Q3Q4 Q4 Reel Diameter User Direction of Feed DS250DF230 SNLS637 –AUGUST 2018 www.ti.com Product Folder Links: DS250DF230 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated

7.1.2 Tape and Reel Information

(mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant DS250DF230ZLSR DSBGA ZLS 36 3000 330 12.4 5.3 5.3 1.65 8 12 TBD DS250DF230ZLST DSBGA ZLS 36 250 TBD 12.4 5.3 5.3 1.65 8 12 TBD PD250DF230ZLST DSBGA ZLS 36 250 TBD 12.4 5.3 5.3 1.65 8 12 TBD

ADVANCE□INFORMATION TAPE AND REEL BOX DIMENSIONS Width (mm) W L H DS250DF230 www.ti.com SNLS637 –AUGUST 2018 Product Folder Links: DS250DF230 Submit Documentation FeedbackCopyright © 2018, Texas Instruments Incorporated Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS250DF230ZLSR DSBGA ZLS 36 3000 TBD TBD TBD DS250DF230ZLST DSBGA ZLS 36 250 TBD TBD TBD PD250DF230ZLST DSBGA ZLS 36 250 TBD TBD TBD

www.ti.com PACKAGE OUTLINE C1.41 MAX TYP0.35 0.23

0.8 TYP

4 TYP

36X -0.45 0.35 B 5.1 4.9 A 5.1 4.9 NFBGA - 1.41 mm max heightZLS0036A BALL GRID ARRAY 4220412/A 04/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. BALL A1 CORNER SEATING PLANE BALL TYP 0.1 C SCALE 2.500 B A 1 2 3

0.15 C A B

0.08 C SYMM SYMM BALL A1 CORNER 5 6 E D C F

www.ti.com EXAMPLE BOARD LAYOUT 36X ( 0.35) (0.8) TYP (0.8) TYP ( 0.35) METAL

0.05 MAX

( 0.35) SOLDER MASK OPENING

0.05 MIN

NFBGA - 1.41 mm max heightZLS0036A BALL GRID ARRAY 4220412/A 04/2017 NOTES: (continued) 3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments Literature number SPRAA99 (www.ti.com/lit/spraa99). SYMM SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X 1 2 3 4 F E D C B A 5 6 NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS NOT TO SCALE EXPOSED METAL SOLDER MASK DEFINED EXPOSED METAL

www.ti.com EXAMPLE STENCIL DESIGN (0.8) TYP NFBGA - 1.41 mm max heightZLS0036A BALL GRID ARRAY 4220412/A 04/2017 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. SYMM SYMM SOLDER PASTE EXAMPLE BASED ON 0.15 mm THICK STENCIL SCALE:15X 1 2 3 4 F E D C B A 5 6

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