PCT2075GV/N005X

PCT2075_V01 NXP | Alldatasheet

Document overview

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Technical content

1. General description The PCT2075 is a temperature-to-digital converter featuring 1 C accuracy over 25 C to +100 C range. It uses an on-chip band gap temperature sensor and Sigma-Delta A-to-D conversion technique with an overtemperature detection output that is a drop-in replacement for other LM75 series thermal sensors. The device contains a number of data registers: Configuration register (Conf) to store the device settings such as device operation mode, OS operation mode, OS polarity and OS fault queue; temperature register (Temp) to store the digital temp reading, set-point registers (Tos and Thyst) to store programmable overtemperature shutdown and hysteresis limits, and programmable temperature sensor sampling time Tidle, that can be communicated by a controller via the 2-wire serial I2C-bus Fast-mode Plus interface. The PCT2075 also includes an open-drain output (OS) which becomes active when the temperature exceeds the programmed limits. The OS output operates in either of two selectable modes: OS comparator mode or OS interrupt mode. Its active state can be selected as either HIGH or LOW. The fault queue that defines the number of consecutive faults in order to activate the OS output is programmable as well as the set-point limits. The PCT2075 can be configured for different operation conditions. It can be set in normal mode to periodically monitor the ambient temperature, or in shut-down mode to minimize power consumption. The temperature register always stores an 11-bit two’s complement data, giving a temperature resolution of 0.125 C. This high temperature resolution is particularly useful in applications of measuring precisely the thermal drift or runaway. When the device is accessed the conversion in process is not interrupted (that is, the I 2C-bus section is totally independent of the Sigma-Delta converter section) and accessing the device continuously without waiting at least one conversion time between communications will not prevent the device from updating the Temp register with a new conversion result. The new conversion result will be available immediately after the Temp register is updated. It is also possible to read just one of the temperature register bytes without lock-up. The PCT2075 powers up in the normal operation mode with the OS in comparator mode, temperature threshold of 80 C and hysteresis of 75 C, so that it can be used as a stand-alone thermostat with those pre-defined temperature set points. The default set points can be modified during manufacture and ordered under custom part number. There are three selectable logic address pins with three logic states so that 27 8-pin devices or three 6-pin devices can be connected on the same bus without address conflict. PCT2075 I2C-bus Fm+, 1 degree C accuracy, digital temperature sensor and thermal watchdog Rev. 9.1 — 21 April 2017 Product data sheet

Product data sheet Rev. 9.1 — 21 April 2017 2 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog 2. Features and benefits  Pin-for-pin replacement for LM75 series but allows up to 27 devices on the bus  Power supply range from 2.7 V to 5.5 V  Temperatures range from 55 C to +125 C  Frequency range 20 kHz to 1 MHz with SMBus time-out to prevent hanging up the bus  1 MHz Fast-mode Plus 30 mA SDA drive allows more devices on the same bus but is backward compatible to Fast-mode and Standard-mode  11-bit ADC that offers a temperature resolution of 0.125 C  Temperature accuracy of:  1 C (max.) from 25 C to +100 C  2 C (max.) from 55 C to +125 C  Programmable temperature threshold and hysteresis set points during operation  Supply current of <1.0 A in shut-down mode for power conservation  Stand-alone operation as thermostat at power-up  ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101  Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA  Small 8-pin package types: SO8, TSSOP8 and 2 mm  3m mH W S O N 8  Small 6-pin package type: TSOP6 3. Applications  System thermal management  Personal computers  Electronics equipment  Industrial controllers  Cooling system: turn on when the temperature is higher (hotter) than -5C; turn off when the temperature is below -10C Fig 1. Cooling system using custom part PCT2075GV/N005X aaa-027129 -5°C Tots OS reset OS active AC off -10°C Thys AC on AC offreading temperature limits OS output in comparator mode AC on

4.1 Ordering options

Table 1. Ordering information Table 2. Ordering options

2500 T amb = 55 C to +125 C

4000 T amb = 55 C to +125 C

5000 T amb = 55 C to +125 C

3000 T amb = 55 C to +125 C

Product data sheet Rev. 9.1 — 21 April 2017 4 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog 5. Block diagram 6. Pinning information

6.1 Pinning

Fig 2. Block diagram of PCT2075 PCT2075 SDA VCC SCLA0 OS A1 GNDA2 002aag634 BIAS REFERENCE BAND GAP TEMP SENSOR OSCILLATOR POWER-ON RESET 11-BIT SIGMA-DELTA A-to-D CONVERTER POINTER REGISTER TIDLE/TIMER COMPARATOR/ INTERRUPT COUNTER LOGIC CONTROL AND INTERFACE CONFIGURATION REGISTER THYST REGISTER TOS REGISTER TEMPERATURE REGISTER Fig 3. Pin configuration for SO8 Fig 4. Pin configuration for TSSOP8 Fig 5. Pin configuration for HWSON8 Fig 6. Pin configuration for TSOP6 PCT2075D SDA VCC SCL A0 OS A1 GND A2 002aag635 PCT2075DP PCT2075DP/Q900 SDA V CC SCL A0 OS A1 GND A2 002aag636 002aag637 terminal 1 index area

1 SDA

2 SCL

6.2 Pin description

need to be incorporated in the PCB in the thermal pad region. Table 3. Pin description fo r SO8, TSSOP8 and HWSON8 SDA 1 Digital I/O. I 2C-bus serial bidirectional data line; open-drain. SCL 2 Digital input. I 2C-bus serial clock input. OS 3 Overtemp Shutdown output; open-drain. GND 4 [1] Ground. To be connected to the system ground. A2 5 Digital input. User-defined address bit 2. A1 6 Digital input. User-defined address bit 1. A0 7 Digital input. User-defined address bit 0. Table 4. Pin description for TSOP6 A0 1 Digital input. User-defined address bit 0. GND 2 Ground. To be connected to the system ground. SCL 4 Digital input. I 2C-bus serial clock input. OS 5 Overtemp Shutdown output; open-drain. 2C-bus serial bidirectional data line; open-drain.

Product data sheet Rev. 9.1 — 21 April 2017 6 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog 7. Functional description

7.1 General operation

The PCT2075 uses the on-chip band gap sensor to measure the device temperature with the resolution of 0.125 C and stores the 11-bit two’s complement digital data, resulted from 11-bit A-to-D conversion, into the device Temp register. This Temp register can be read at any time by a controller on the I2C-bus. Reading temperature data does not affect the conversion in progress during the read operation. The PCT2075 can be set to operate in either mode: normal or shutdown. In normal operation mode, the temp-to-digital conversion is executed every 100 ms or other programmed value and the Temp register is updated at the end of each conversion. During each ‘conversion period’ (T conv) of about 100 ms, the device takes only about 28 ms, called ‘temperature conversion time’ (tconv(T)), to complete a temperature-to-data conversion and then becomes idle for the time remaining in the period. This feature is implemented to significantly reduce the device power dissipation. In shutdown mode, the device becomes idle, data conversion is disabled and the Temp register holds the latest result; however, the device I2C-bus interface is still active and register write/read operation can be performed. The device operation mode is controllable by programming bit B0 of the configuration register. The temperature conversion is initiated when the device is powered-up or put back into normal mode from shutdown. In addition, at the end of each conversion in normal mode, the temperature data (or Temp) in the Temp register is automatically compared with the overtemperature shutdown threshold data (or T ots) stored in the Tos register, and the hysteresis data (or Thys) stored in the Thyst register, in order to set the state of the device OS output accordingly. The device Tos and Thyst registers are write/read capable, and both operate with 9-bit two’s complement digital data. To match with this 9-bit operation, the Temp register uses only the 9 MSB bits of its 11-bit data for the comparison. Tots must always be higher than Thys. The way that the OS output responds to the comparison operation depends upon the OS operation mode selected by configuration bit B1, and the user-defined fault queue defined by configuration bits B3 and B4. In OS comparator mode, the OS output behaves like a thermostat. It becomes active when the Temp exceeds the Tots, and is reset when the Temp drops below the Thys. Reading the device registers or putting the device into shutdown does not change the state of the OS output. The OS output in this case can be used to control cooling fans or thermal switches. In OS interrupt mode, the OS output is used for thermal interruption. When the device is powered-up, the OS output is first activated only when the Temp exceeds the Tots, then it remains active indefinitely until being reset by a read of any register. Once the OS output has been activated by crossing Tots and then reset, it can be activated again only when the Temp drops below the Thys; then again, it remains active indefinitely until being reset by a read of any register. The OS interrupt operation would be continued in this sequence: Tots trip, Reset, Thys trip, Reset, Tots trip, Reset, Thys trip, Reset, etc. Putting the device into the shutdown mode by setting the bit 0 of the configuration register also resets the OS output.

Product data sheet Rev. 9.1 — 21 April 2017 7 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog In both cases, comparator mode and interrupt mode, the OS output is activated only if a number of consecutive faults, defined by the device fault queue, has been met. The fault queue is programmable and stored in the two bits, B3 and B4, of the Configuration register. Also, the OS output active state is selectable as HIGH or LOW by setting accordingly the configuration register bit B2. At power-up, the PCT2075 is put into normal operation mode in OS comparator mode, the Tots is set to 80 C, the Thys is set to 75 C, the OS active state is selected LOW and the fault queue is equal to 1. The temp reading data is 0 C and not updated until the first conversion is completed in about 28 ms. The default Tots and Thys is set at the factory and can be modified on custom part number. The OS response to the temperature is illustrated in Figure 7.

7.2 I 2C-bus serial interface

The device can be connected to a compatible 2-wire serial interface Fast-mode Plus I2C-bus as a slave device under the control of a controller or master device, using two device terminals, SCL and SDA. The controller must provide the SCL clock signal and write/read data to/from the device through the SDA terminal. Notice that if the I2C-bus common pull-up resistors have not been installed as required for I2C-bus, then an external pull-up resistor, about 1.5 k, is needed for each of these two terminals. The bus communication protocols are described in Section 7.10. (1) OS is reset by either reading register or putti ng the device in shutdown mode. It is assumed that the fault queue is met at each Tots and Thys crossing point. Fig 7. OS response to temperature 002aah455 (1) (1) (1) Tots Thys OS reset OS active OS reset OS active OS output in comparator mode OS output in interrupt mode reading temperature limits

7.2.1 Bus fault time-out

manufacture and shipped under custom part number.

7.3 Slave address

describes the pin logic levels used to properly connect up to three 6-pin devices. dissipation associated with detection. Table 5. PCT2075 address table (SO8, TSSOP8, HWSON8 packages)

Product data sheet Rev. 9.1 — 21 April 2017 9 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog

7.4 Register list

The PCT2075 contains four data registers beside the pointer register as listed in Table 7. The pointer value, read/write capability and default content at power-up of the registers are also shown in Table 7. 24 1 1 floating 0101 111 25 0 floating floating 0110 101 26 1 floating floating 0110 110 27 floating floating floating 0110 111 Table 6. PCT2075 address table (TSOP6 package) Table 7. Register table

Description

Conf 01h R/W 00h Configuration register: contains a single 8-bit data byte; to set the device operating condition; default = 0. Temp 00h read only 0000h Temperature register: contains two 8-bit data bytes; to store the measured Temp data. Tos 03h R/W 5000h Overtemperature shutdown threshold register: contains two 8-bit data bytes; to store the overtemperature shutdown T ots limit; default = 80 C. FB00h Default = -5 C for PCT2075GV/N005X only. Thyst 02h R/W 4B00h Hysteresis register: contains two 8-bit data bytes; to store the hysteresis Thys limit; default = 75 C. F600h Default = -10 C for PCT2075GV/N005X only. Tidle 04h R/W 00h Temperature conv ersion cycle default to 100 ms.

7.4.1 Pointer register

can then read the Temp data without specifying the pointer byte. Anything not shown in Table 9 is reserved and should not be used. Table 8. Pointer register Table 9. Pointer value

7.4.2 Configuration register

conditions. Table 10 shows the bit assignments of this register.

7.4.3 Temperature register

the bit arrangement of the Temp data in the data bytes.

1. If the Temp data MSByte bit D10 = 0, then the temperature is positive and Temp value
2. If the Temp data MSByte bit D10 = 1, then the temperature is negative and

Temp value (C) = (two’s complement of Temp data) 0.125 C. Table 10. Conf register

1 OS active HIGH

1 OS interrupt

Table 11. Temp register

Examples of the Temp data and value are shown in Table 12. LM75 and it is here similar to the Tos and Thyst registers. resolution will be 1.00 C instead.

7.4.4 Overtemperature shutdown threshold (Tos) and hysteresis (Thyst) registers

two registers in order to set the state of the device OS output; see Section 7.1. Thyst data in the data bytes. only the 9 MSB of the Temp data for data comparison. Table 12. Temp register value Table 13. Tos register

be used and the 7 LSB of the LSByte are equal to zero and should be ignored. A single byte read of either Tos or Thyst is allowed. shows examples of the limit data and value.

7.4.5 Tidle register

set to idle for a user-specified time to save power after temperature measurement is done. temperature. The register is composed of 5-bit values TIDLE[4:0] at pointer address 04h. Table 14. Thyst register Table 15. Tos and Thyst limit data and value Table 16. Tidle - Temperature idle register (address 04h) bit allocation Temperature idle register contains the value of time in between temperature measurements.  100 ms is the temperature sampling period.

Product data sheet Rev. 9.1 — 21 April 2017 14 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog The device temperature sensor powers up to measure temperature every 100 ms, with Tidle = 00001 by default. For the PCT2075 with 11-bit accuracy, the ADC conversion is about 28 ms. As a result, the PCT2075 will be idle for (100 ms  28 ms) = 72 ms between two temperature measurements.

7.5 OS output and polarity

The OS output is an open-drain output and its state represents results of the device watchdog operation as described in Section 7.1. In order to observe this output state, an external pull-up resistor is needed. The resistor should be as large as possible, up to 1.5 k, to minimize the Temp reading error due to internal heating by the high OS sinking current. The OS output active state can be selected as HIGH or LOW by programming bit B2 (OS_POL) of register Conf: setting bit OS_POL to logic 1 selects OS active HIGH and setting bit B2 to logic 0 sets OS active LOW. At power-up, bit OS_POL is equal to logic 0 and the OS active state is LOW.

7.6 OS comparator and interrupt modes

As described in Section 7.1, the device OS output responds to the result of the comparison between register Temp data and the programmed limits, in registers Tos and Thyst, in different ways depending on the selected OS mode: OS comparator or OS interrupt. The OS mode is selected by programming bit B1 (OS_COMP_INT) of register Conf: setting bit OS_COMP_INT to logic 1 selects the OS interrupt mode, and setting to logic 0 selects the OS comparator mode. At power-up, bit OS_COMP_INT is equal to logic 0 and the OS comparator is selected. The main difference between the two modes is that in OS comparator mode, the OS output becomes active when Temp has exceeded T ots and reset when Temp has dropped below Thys, reading a register or putting the device into shutdown mode does not change the state of the OS output; while in OS interrupt mode, once it has been activated either by exceeding Tots or dropping below Thys, the OS output will remain active indefinitely until reading a register, then the OS output is reset. Temperature limits Tots and Thys must be selected so that Tots > Thys. Otherwise, the OS output state will be undefined.

7.7 OS fault queue

selectable by programming the two bits B4 and B3 (OS_F_QUE[1:0]) in register Conf.

7.8 Shutdown mode

bit SHUTDOWN to logic 0 will return the device to normal mode. set, the OS output will be unchanged in comparator mode and reset in interrupt mode.

7.9 Power-up defaul t and power-on reset

• Normal operation mode
• OS comparator mode
• Tots = 80 C (or as specified for the custom part number)
• Thys = 75 C (or as specified for the custom part number)
• OS output active state is LOW
• Pointer value is logic 000 (Temp)
• SMBus time-out enabled (or as specified for the custom part number) When the power supply voltage is dropped below the device power-on reset level of approximately 1.0 V (POR) for over 2 s and then rises up again, the PCT2075 will be reset to its default condition as listed above. In some applications a higher or lower default T ots and Thys values or no SMBus time-out may be required. Please contact NXP for information on custom part number.

Table 17. Fault queue table

Product data sheet Rev. 9.1 — 21 April 2017 16 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog

7.10 Protocols for writing and reading the registers

The communication between the host and the device must strictly follow the rules as defined by the I2C-bus management. The protocols for device register read/write operations are illustrated in Figure 8 to Figure 13 together with the following definitions: 1. Before a communication, the I 2C-bus must be free or not busy. It means that the SCL and SDA lines must both be released by all devices on the bus, and they become HIGH by the bus pull-up resistors. 2. The host must provide SCL clock pulses necessary for the communication. Data is transferred in a sequence of 9 SCL clock pulses for every 8-bit data byte followed by 1-bit status of the acknowledgement. 3. During data transfer, except the START and STOP signals, the SDA signal must be stable while the SCL signal is HIGH. It means that the SDA signal can be changed only during the LOW duration of the SCL line. 4. S: START signal, initiated by the host to start a communication, the SDA goes from HIGH to LOW while the SCL is HIGH. 5. RS: RE-START signal, same as the START signal, to start a read command that follows a write command. 6. P: STOP signal, generated by the host to stop a communication, the SDA goes from LOW to HIGH while the SCL is HIGH. The bus becomes free thereafter. 7. W: write bit, when the write/read bit = LOW in a write command. 8. R: read bit, when the write/read bit = HIGH in a read command. 9. A: device acknowledge bit, returned by th e device. It is LOW if the device works properly and HIGH if not. The host must release the SDA line during this period in order to give the device the control on the SDA line. 10. A’: master acknowledge bit, not returned by the device, but set by the master or host in reading 2-byte data. During this clock period, the host must set the SDA line to LOW in order to notify the device that the first byte has been read for the device to provide the second byte onto the bus. 11. NA: Not Acknowledge bit. During this cloc k period, both the device and host release the SDA line at the end of a data transfer, the host is then enabled to generate the STOP signal. 12. In a write protocol, data is sent from the host to the device and the host controls the SDA line, except during the clock period when the device sends the device acknowledgement signal to the bus. 13. In a read protocol, data is sent to the bus by the device and the host must release the SDA line during the time that the device is providing data onto the bus and controlling the SDA line, except during the clock period when the master sends the master acknowledgement signal to the bus. 14. For best temperature accuracy both temp erature bytes should be read as shown in Figure 12 and Figure 13, but for a quick less accurate check/reduce bus transmission then only one byte, the MSByte, needs to be read as shown in Figure 10.

Product data sheet Rev. 9.1 — 21 April 2017 17 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog (1) See Table 5 or Table 6 for device address. Fig 8. Write configuration register (1-byte data) 002aah777 B6 S SDA SCL B 5 B 4 B 3 B 2 B 1 B 0 W A 00000001 A 000 D 4 D 3 D 2 D 1 D 0 A P 23456789123456789123456789 START STOPwrite device acknowledge device acknowledgedevice acknowledge device address(1) pointer byte configuration data byte (1) See Table 5 or Table 6 for device address. Fig 9. Read configuration register including pointer byte (1-byte data) 002aah778 SCL SDA (next) (next) 123456789123456789 device address(1) pointer byte START RE-STARTwrite device acknowledgedevice acknowledge SCL (cont.) SDA (cont.) 123456789123456789 device address(1) data byte from device STOPread master not acknowledgeddevice acknowledge D7 D6 D5 D4 D3 D2 D1 D0 PB6 B5 B4 B3 B2 B1 B0 R A NA

00000001 A RSB6S B5 B4 B3 B2 B1 B0 W A

(1) See Table 5 or Table 6 for device address. Fig 10. Read configuration or temp register with preset pointer (1-byte data) 002aah779 START S SCL SDA 123456789123456789 device address(1) data byte from device STOPread master not acknowledgeddevice acknowledge D7 D6 D5 D4 D3 D2 D1 D0 PB6 B5 B4 B3 B2 B1 B0 R A NA

Product data sheet Rev. 9.1 — 21 April 2017 18 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog (1) See Table 5 or Table 6 for device address. Fig 11. Write Tos or Thyst register (2-byte data) 002aah780 123456789123456789 D7SDA (cont.) SCL (cont.) D6 D5 D4 D3 D2 D1 D0 A D7 D6 D5 D4 D3 D2 D1 D0 A P B6 S SDA SCL B5 B4 B3 B2 B1 B0 W A 0 0 0 0 0 0 P1 P0 A (next) (next) 123456789123456789 device address(1) pointer byte MSByte data LSByte data START write device acknowledgedevice acknowledge STOPdevice acknowledgedevice acknowledge (1) See Table 5 or Table 6 for device address. Fig 12. Read Temp, Tos or Thyst register including pointer byte (2-byte data) 123456789 123456789123456789 123456789 B6 B5 B4 B3 B2 B1 B0 R A D7 D6 D5 D4 D3 D2 D1 D0 A' D7 D6 D5 D4 D3 D2 D1 D0 NA P 1234567890 B6 S B5 B4 B3 B2 B1 B0 W A 0 0 0 0 0 0 P1 P0 A (next) (next) SDA SCL SDA (cont) SCL (cont) RS 002aah781 device address(1) pointer byte device address(1) MSByte from device LSByte from device START RE-STARTwrite device acknowledgedevice acknowledge read master acknowledge master not acknowledgeddevice acknowledge STOP (1) See Table 5 or Table 6 for device address. Fig 13. Read Temp, Tos or Thyst register with preset pointer (2-byte data) 123456789123456789123456789 B6S B 5B 4B 3B 2B 1B 0 R A D 7D 6D 5D 4D 3D 2D 1D 0 A ' D 7D 6D 5D 4D 3D 2D 1D 0N A PSDA SCL 002aah782 device address(1) MSByte from device LSByte from device START read master acknowledge master not acknowledgeddevice acknowledge STOP

Product data sheet Rev. 9.1 — 21 April 2017 19 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog 8. Application design-in information

8.1 Typical application

8.2 Temperature accuracy

Because the local channel of the temperature sensor measures its own die temperature that is transferred from its body, the temperature of the device body must be stabilized and saturated for it to provide the stable readings. Because the device operates at a low-power level, the thermal gradient of the device package has a minor effect on the measurement. The accuracy of the measurement is more dependent upon the definition of the environment temperature, which is affected by different factors: the printed-circuit board on which the device is mounted; the air flow contacting the device body (if the ambient air temperature and the printed-circuit board temperature are much different, then the measurement may not be stable because of the different thermal paths between the die and the environment). The stabilized temperature liquid of a thermal bath will provide the best temperature environment when the device is completely dipped into it. A thermal probe with the device mounted inside a sealed-end metal tube located in consistent temperature air also provides a good method of temperature measurement.

8.3 Noise effect

The device design includes the implementation of basic features for a good noise immunity:

• The 50 ns low-pass filter on both the bus pins SCL and SDA;
• The hysteresis of the threshold voltages to the bus input signals SCL and SDA, about 500 mV minimum;
• All pins have ESD protection circuitry to prevent damage during electrical surges. The ESD protection on the address, OS, SCL and SDA pins it to ground. The latch-back based device breakdown voltage of address/OS is typically 11 V and SCL/SDA is typically 9.5 V at any supply voltage but will vary over process and temperature. Since Fig 14. PCT2075 typical application 002aag640 0.1 μF 1.5 kΩ DIGITAL LOGIC PCT2075 DETECTOR OR INTERRUPT LINE BUS PULL-UP RESISTORS I 2C-BUS 2SCL SDA 7 4 3 OS V CC power supply GND 1.5 kΩ1.5 kΩ

operation if the device is de-powered.

• Use decoupling capacitors at VCC pin.
• Keep the digital traces away from switching power supplies.
• Apply proper terminations for the long board traces.
• Add capacitors to the SCL and SDA lines to increase the low-pass filter characteristics. 9. Limiting values 10. Recommended operating conditions

Table 18. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Table 19. Recommended operating characteristics

[1] Typical values are at V CC = 3.3 V and Tamb =2 5 C. Table 20. Static characteristics VCC = 2.7 V to 5.5 V; Tamb = 55 C to +125 C; unless otherwise specified.

Product data sheet Rev. 9.1 — 21 April 2017 22 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog Fig 15. Average supply current versus temperature; I2C-bus inactive Fig 16. Average supply current versus temperature; I2C-bus active Fig 17. Shutdown mode supply current versus temperature Fig 18. LOW-level output voltage on OS pin versus temperature; IOL =4m A Fig 19. LOW-level output current on OS pin versus temperature; VOL =0 . 4V Fig 20. LOW-level input current versus temperature; digital pins 100 150 200 250 I DD (μA) Tamb (°C) −75 125 75−25 25 002aah437 VDD = 5.5 V 4.5 V 3.3 V 2.7 V Tamb (°C) −75 125 75−25 25 300 200 100 400 002aah438 IDD (μA) VDD = 5.5 V 4.5 V 3.3 V 2.7 V IDD (μA) Tamb (°C) −75 125 75−25 25 002aah439 VDD = 5.5 V 4.5 V 3.3 V 2.7 V Tamb (°C) −75 125 75−25 25 0.30 0.20 0.10 0.40 002aah440 VOL (V) VDD = 5.5 V 4.5 V 3.3 V 2.7 V Tamb (°C) −75 125 75−25 25 002aah441 IOL (mA) VDD = 5.5 V 4.5 V 3.3 V 2.7 V −0.2 0.2 −0.6 0.6 1.0 IIL (μA) −1.0 Tamb (°C) −75 125 75−25 25 002aah442 VDD = 5.5 V 4.5 V 3.3 V 2.7 V

Product data sheet Rev. 9.1 — 21 April 2017 23 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog Fig 21. HIGH-level input current versus temperature; digital pins Fig 22. LOW-level output voltage on SDA pin versus temperature; IOL =2 0m A Fig 23. LOW-level output current on SDA pin versus temperature; VOL =0 . 4V Fig 24. Temperature accuracy versus temperature; VCC =2 . 8V t o 5 . 5V Fig 25. Power-on reset threshold voltage versus temperature; rising VCC Fig 26. Power-on reset voltage versus temperature; falling VCC IIH (μA) Tamb (°C) −75 125 75−25 25 002aah443 VDD = 5.5 V 4.5 V 3.3 V 2.7 V Tamb (°C) −75 125 75−25 25 0.30 0.20 0.10 0.40 002aah453 VOL (V) VDD = 5.5 V 4.5 V 3.3 V 2.7 V Tamb (°C) −75 125 75−25 25 002aah454 IOL (mA) VDD = 5.5 V 4.5 V 3.3 V

2.7 V Tamb (°C)

−75 125 75−25 25 −2.0 1.0 −1.0 2.0 002aah444 Tacc (°C) 1.0 2.0 3.0 V th(POR) (V) Tamb (°C) −75 125 75−25 25 002aah451 1.0 2.0 3.0 V POR (V) Tamb (°C) −75 125 75−25 25 002aah452

[1] These specifications are guaranteed by design and not tested in production. [2] This is the SDA time LOW fo r reset of serial interface. Table 21. I 2C-bus interface dynamic characteristics[1] VCC = 2.7 V to 5.5 V; Tamb = 55 C to +125 C; unless otherwise specified.

Product data sheet Rev. 9.1 — 21 April 2017 25 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog 13. Package outline Fig 28. Package outline SOT96-1 (SO8) 81,7 $ PD[ $ $ $ ES F ' H + ( / / S 4 =\\ZY ș 5()(5(1&(6287/,1( 9(56,21 (8523($1 ,(& -('(& -(,7$ PP LQFKHV R R ',0(16,216 LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV 1RWHV 3ODVWLFRUPHWDOSURWUXVLRQVRIPP LQFK PD[LPXPSHUVLGHDUHQRWLQFOXGHG 3ODVWLFRUPHWDOSURWUXVLRQVRIPP LQFK PD[LPXPSHUVLGHDUHQRWLQFOXGHG 627 Z 0 ș ES GHWDLO; H F Y 0 $ SLQLQGH[ ( 06 PP VFDOH SODVWLFVPDOORXWOLQHSDFNDJH OHDGV ERG\\ZLGWK PP 627

Product data sheet Rev. 9.1 — 21 April 2017 26 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog Fig 29. Package outline SOT505-1 (TSSOP8) 81,7 $ PD[ $ $ ES /+( /S Z \\YF H' ș 5()(5(1&(6287/,1( 9(56,21 (8523($1 ,(& -('(& -(,7$ PP ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 1RWHV 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 627 Z 0ES H ș $$ $ GHWDLO; F Y 0 $ PP VFDOH 76623 SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJH OHDGV ERG\\ZLGWKPP 627 SLQLQGH[

Product data sheet Rev. 9.1 — 21 April 2017 27 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog Fig 30. Package outline SOT1069-2 (HWSON8) 5HIHUHQFHV2XWOLQH YHUVLRQ (XURSHDQ SURMHFWLRQ ,VVXHGDWH ,(& -('(& -(,7$ 627 VRW BSR 8QLW PP PD[ QRP PLQ 'LPHQVLRQV 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG +:621 SODVWLFWKHUPDOHQKDQFHGYHU\\YHU\\WKLQVPDOORXWOLQHSDFNDJH QROHDGV WHUPLQDOV ERG\\[[PP 627 $ E ' ( HH . Z PP VFDOH \\&\\ WHUPLQDO LQGH[DUHD % $' GHWDLO; WHUPLQDO LQGH[DUHD E H H $&%Y

Product data sheet Rev. 9.1 — 21 April 2017 28 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog Fig 31. Package outline SOT1353-1 (TSOP6) 5HIHUHQFHV2XWOLQH YHUVLRQ (XURSHDQ SURMHFWLRQ ,VVXHGDWH ,(& -('(& -(,7$ 627 6& VRWBSR 8QLW PP PD[ QRP PLQ 'LPHQVLRQV PPDUHWKHRULJLQDOGLPHQVLRQV 7623 3ODVWLFWKLQVPDOORXWOLQHSDFNDJH OHDGV 627 $ $ $ ES F'(H + ( / /S 4YZ PP VFDOH SLQLQGH[ F /S$ '( % $ GHWDLO; H ES

Product data sheet Rev. 9.1 — 21 April 2017 29 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog 14. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”.

14.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both the mechanical and the electrical connection. There is no single soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization.

14.2 Wave and reflow soldering

Wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. The wave soldering process is suitable for the following:

• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board Not all SMDs can be wave soldered. Packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. Also, leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. The reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. Leaded packages, packages with solder balls, and leadless packages are all reflow solderable. Key characteristics in both wave and reflow soldering are:
• Board specifications, including the board finish, solder masks and vias
• Package footprints, including solder thieves and orientation
• The moisture sensitivity level of the packages
• Package placement
• Inspection and repair
• Lead-free soldering versus SnPb soldering

14.3 Wave soldering

Key characteristics in wave soldering are:

• Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave
• Solder bath specifications, including temperature and impurities

14.4 Reflow soldering

• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see Figure 32) than a SnPb process, thus reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is heated to the peak temperature) and cooling down. It is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). In addition, the peak temperature must be low enough that the packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table 22 and 23 Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see Figure 32.

Table 22. SnPb eutectic process (from J-STD-020D) Table 23. Lead-free process (from J-STD-020D)

Product data sheet Rev. 9.1 — 21 April 2017 31 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 15. Soldering: PCB footprints MSL: Moisture Sensitivity Level Fig 32. Temperature profiles for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = MSL limit, damage level peak temperature Fig 33. SOT96-1 (SO8); reflow soldering VRW BIURFFXSLHGDUHD VROGHUODQGV 'LPHQVLRQVLQPPSODFHPHQWDFFXUDF\\“ î î

Product data sheet Rev. 9.1 — 21 April 2017 32 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog Fig 34. SOT96-1 (SO8); wave soldering Fig 35. SOT505-1 (TSSOP8); reflow soldering VRW BIZ VROGHUUHVLVW RFFXSLHGDUHD VROGHUODQGV 'LPHQVLRQVLQPP ERDUGGLUHFWLRQ SODFHPHQWDFFXUUDF\\“ î î î î HQODUJHGVROGHUODQG VRWBIURFFXSLHGDUHDVROGHUODQGV 'LPHQVLRQVLQPP

Product data sheet Rev. 9.1 — 21 April 2017 33 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog Fig 36. SOT1069-2 (HWSON8); reflow soldering 627 ',0(16,216LQPP )RRWSULQWLQIRUPDWLRQIRUUHIORZVROGHULQJRI+:621SDFNDJH Q63[ Q63 \\ RFFXSLHGDUHD VROGHUODQGSOXVVROGHUSDVWH VROGHUODQG VROGHUSDVWHGHSRVLW VRW BIU,VVXHGDWH 6/[ $\\%\\ 6/\\ *\\+\\ 63[ 63\\ Q63[ Q63\\

Table 24. Abbreviations Table 25. Revision history

• Section 4 “Ordering information”: Added PCT2075GV/N005X
• Table 7 “Register table”: Added register information for PCT2075GV/N005X
• Added Figure 1 “Cooling system using custom part PCT2075GV/N005X” PCT2075 v.9 20141024 Product data sheet - PCT2075 v.8 Modifications: • Table 1 “Ordering information”: Changed topside mark of PCT2075GV from ‘075’ to ‘20x’; added Table note [1]
• Table 2 “Ordering options”: Added PCT2075GVX PCT2075 v.8 20140925 Product data sheet - PCT2075 v.7 PCT2075 v.7 20140306 Product data sheet - PCT2075 v.6 PCT2075 v.6 20140124 Product data sheet - PCT2075 v.5 PCT2075 v.5 20131209 Product data sheet - PCT2075 v.4 PCT2075 v.4 20130719 Product data sheet - PCT2075 v.3 PCT2075 v.3 20130521 Product data sheet - PCT2075 v.2 PCT2075 v.2 20130506 Product data sheet - PCT2075 v.1 PCT2075 v.1 20130405 Product data sheet - -

Product data sheet Rev. 9.1 — 21 April 2017 35 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog 18. Legal information

18.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com

18.2 Definitions

Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.

18.3 Disclaimers

Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.

Product data sheet Rev. 9.1 — 21 April 2017 36 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.

18.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. I2C-bus — logo is a trademark of NXP Semiconductors N.V. 19. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog © NXP Semiconductors N.V. 2017. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 21 April 2017 Document identifier: PCT2075 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 20. Contents 7.2 I

7.4.4 Overtemperat ure shutdown threshold (Tos) and

7.10 Protocols for writing and reading the registers 16