PCS809 PULSECORE | Alldatasheet

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January 2007 PCS809/PCS810 rev 0.2 Notice: The information in this document is subject to change without notice. PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018 www.pulsecoresemi.com 3-Pin µP Voltage Supervisor

FEATURES

  • Ultra Low Supply Current 1µA(typ.)
  • Guaranteed Reset Valid to VCC=0.9V
  • Available in three Output Types: Open Drain Active Low (PCS809N), Push-Pull Active Low (PCS809), Push-Pull Active High (PCS810)
  • 140ms Min. Power-On Reset Pulse Width
  • Internally Fixed Threshold 2.3V, 2.6V, 2.9V, 3.1V, 4.0V, 4.4V, and 4.6V
  • Tight Voltage Threshold Tolerance: 1.5%
  • Low profile Package: SOT-23-3

APPLICATIONS

  • Notebook Computers
  • Digital Still Cameras
  • PDAs
  • Critical Microprocessor Monitoring RESET THRESHOLD Suffix Voltage(V) L 4.6 M 4.4 J 4.0 T 3.1 S 2.9 R 2.6 P 2.3

DESCRIPTION

PCS809/PCS810 are low-power microprocessor (µP) supervisory circuits used to monitor power supplies in µP and digital systems. They provide applications with benefits of circuit reliability and low cost by eliminating external components. These devices perform as valid singles in applications with VCC ranging from 6.0V down to 0.9V. The reset signal lasts for a minimum period of 140ms whenever VCC supply voltage falls below preset threshold. Both PCS809 and PCS810 were designed with a reset comparator to help identify invalid signals, which last less than 140ms. The only difference between them is that they have an active-low RESET output an d active-high RESET output, respectively. Low supply current (1µA) makes PCS809/PCS810 ideal for portable equipment. The devices are available in 3- SOT-23 package Typical Operating Circuit VCC GND GND VCC VCC RESET (RESET) RESET INPUT PCS809 (PCS810) µP Push-Pull Output

January 2007 PCS809/PCS810 rev 0.2 3-Pin µP Voltage Supervisor 2 of 8 Notice: The information in this document is subject to change without notice. Pin Diagram Pin Description Block Diagrams Pin# PCS809 PCS810 Pin Name Description 1 1 GND Ground. 2 - RESET RESET is asserted LOW if VCC falls below VTH. RESET remains LOW for atleast 140ms (TRST) once VCC exceeds the Threshold. In addition, RESET is active LOW - 2 RESET RESET is asserted HIGH if VCC falls below VTH. RESET remains HIGH for atleast 140ms (TRST) once VCC exceeds the threshold. In addition, RESET is active HIGH 3 3 VCC Power supply input voltage (3.0V, 3.3V, 5.0V) GND VCC RESET (RESET) PCS809 (PCS810) Reset Generator Bandgap VCC GND Push-Pull Type RESET (RESET) N-ch Open-Drain Type Reset Generator Bandgap VCC GND RESET NMOS

January 2007 PCS809/PCS810 rev 0.2 3-Pin µP Voltage Supervisor 3 of 8 Notice: The information in this document is subject to change without notice. Detailed Description RESET OUTPUT µP will be activated at a valid reset state. These µP supervisory circuits assert reset to prevent code execution errors during power-up, power-down, or brownout conditions. RESET is guaranteed to be a logic low for V TH>VCC>0.9V. Once VCC exceeds the reset threshold, an internal timer keeps RESET low for the reset timeout period; after this interval, RESET goes high. If a brownout condition occurs (VCC drops below the reset threshold), RESET goes low. Any time VCC goes below the reset threshold, the inter nal timer resets to zero, and RESET goes low. The internal timer is activated after VCC returns above the reset thre shold, and RESET remains low for the reset timeout period. BENEFITS OF HIGHLY ACCURATE RESET THRESHOLD PCS809/810 with specified voltage as 5V±10% or 3V±10% are ideal for systems using a 5V±5% or 3V±5% power supply. The reset is guaranteed to assert after the power supply falls out of re gulation, but before power drops below the minimum specified operating voltage range of the system ICs. The pre-trimmed thresholds are reducing the range over which an undesirable reset may occur.

Application Information

NEGATIVE-GOING VCC TRANSIENTS In addition to issuing a reset to the µP during power-up, power-down, and brownout conditions, PCS809 series are relatively resistant to short-duration negative-going VCC transient. ENSURING A VALID RESET OUTPUT DOWN TO VCC=0 When VCC falls below 0.9V, PCS809 RESET output no longer sinks current; it becomes an open circuit. In this case, high-impedance CMOS logic inputs connecting to RESET can drift to undetermined voltages. Therefore, PCS809/810 with CMOS is perfect for most applications of VCC below 0.9V. However in applications where RESET must be valid down to 0V, adding a pull-down resistor to RESET causes any leakage cu rrents to flow to ground, holding RESET low. INTERFACING TO µP WITH BIDIRECTIONAL RESET PINS The RESET output on the PCS8 09 is open drain, this device interfaces easily with µPs that have bidirectional reset pins. Connecting the µP supervisor’s RESET output directly to the microcontroller’s RESET pin with a single pull-up resistor allows either device to assert reset.

January 2007 PCS809/PCS810 rev 0.2 3-Pin µP Voltage Supervisor 4 of 8 Notice: The information in this document is subject to change without notice. Absolute Maximum Rating Parameter Min Max Unit VCC 0.3 6.5 V RESET,RESET 0.3 Vcc+0.3 V Input Current (VCC) 20 mA Output Current (RESET or RESET) 20 mA Continuous Power Dissipation (TA=+70°C) 320 mW Operating Junction Temperature Range -40 +85 °C Junction Temperature 125 °C Storage Temperature Range -65 150 °C Lead Temperature (Soldering) 10 sec 260 °C Test Circuit GND TEST CIRCUIT 0.1uF VCC VCC RESET (RESET)

January 2007 PCS809/PCS810 rev 0.2 3-Pin µP Voltage Supervisor 5 of 8 Notice: The information in this document is subject to change without notice. Electrical Characteristics: (Typical valves are at TA=+25°C unless otherwise specified.) (Note1) Parameter Symbol Test Conditions Min Typ Max Unit Opreating Voltage VCC 0.9 6 V Supply Current I CC VCC= VTH +0.1V 1 3 μA TA=+25°C 2.265 2.335 P device TA-40°C to +85°C 2.254 2.3 2.346 TA=+25°C 2.561 2.639 R device TA-40°C to +85°C 2.548 2.6 2.652 TA=+25°C 2.857 2.944 S device TA-40°C to +85°C 2.842 2.9 2.958 TA=+25°C 3.054 3.147 T device TA-40°C to +85°C 3.038 3.1 3.162 TA=+25°C 3.940 4.060 J device TA-40°C to +85°C 3.920 4.0 4.080 TA=+25°C 4.334 4.466 M device TA-40°C to +85°C 4.312 4.4 4.488 TA=+25°C 4.531 4.669 RESET threshold V TH L device TA-40°C to +85°C 4.508 4.6 4.692 V VCC to Reset Delay T RD VCC=V TH to (VTH-0.1V), VTH =3.1V 20 μS TA=+25°C 140 230 560 Reset Active Timeout Period T RP VCC=V TH (MAX) TA-40°C to +85°C 100 1030 mS VOH VCC = V TH +0.1V,ISOURECE =1mA 0.8VCC RESET output Voltage VOL VCC = V TH -0.1V,ISINK =1mA 0.2VCC VOH VCC = V TH +0.1V,ISOURECE =1mA 0.8VCC RESET output Voltage VOL VCC = V TH -0.1V,ISINK =1mA 0.2VCC V Note1: Specifications are production tested at T A =25°C. Specifications over the -40°C to 85°C operating temperature range are assured by design, characterization and correlation with Statistical Quality Controls (SQC). Note 2: RESET output is for PCS809: RESET output for PCS810.

January 2007 PCS809/PCS810 rev 0.2 3-Pin µP Voltage Supervisor 6 of 8 Notice: The information in this document is subject to change without notice.

Ordering Information

Part # Threshold Voltage Temperature Range Package Top Marking PCS809 Push-Pull type PCS809LIURF 4.6 -40°C to +85°C 3-SOT-23 RA46P PCS809MIURF 4.4 -40°C to +85°C 3-SOT-23 RA44P PCS809JIURF 4.0 -40°C to +85°C 3-SOT-23 RA40P PCS809TIURF 3.1 -40°C to +85°C 3-SOT-23 RA31P PCS809SIURF 2.9 -40°C to +85°C 3-SOT-23 RA29P PCS809RIURF 2.6 -40°C to +85°C 3-SOT-23 RA26P PCS809PIURF 2.3 -40°C to +85°C 3-SOT-23 RA23P PCS809 N Open- Drain type PCS809NLIURF 4.6 -40°C to +85°C 3-SOT-23 RB46P PCS809NMIURF 4.4 -40°C to +85°C 3-SOT-23 RB44P PCS809NJIURF 4.0 -40°C to +85°C 3-SOT-23 RB40P PCS809NTIURF 3.1 -40°C to +85°C 3-SOT-23 RB31P PCS809NSIURF 2.9 -40°C to +85°C 3-SOT-23 RB29P PCS809NRIURF 2.6 -40°C to +85°C 3-SOT-23 RB26P PCS809NPIURF 2.3 -40°C to +85°C 3-SOT-23 RB23P PCS810 ACTIVE HIGH RESET PCS810LIURF 4.6 -40°C to +85°C 3-SOT-23 RD46P PCS810MIURF 4.4 -40°C to +85°C 3-SOT-23 RD44P PCS810JIURF 4.0 -40°C to +85°C 3-SOT-23 RD40P PCS810TIURF 3.1 -40°C to +85°C 3-SOT-23 RD31P PCS810SIURF 2.9 -40°C to +85°C 3-SOT-23 RD29P PCS810RIURF 2.6 -40°C to +85°C 3-SOT-23 RD26P PCS810PIURF 2.3 -40°C to +85°C 3-SOT-23 RD23P Note: For parts to be packed in tape and reel, add “T” at the end of the part number PulseCore Semiconductor parts are RoHS Compliant. All parts are lead free by default.

January 2007 PCS809/PCS810 rev 0.2 3-Pin µP Voltage Supervisor 7 of 8 Notice: The information in this document is subject to change without notice. Dimensions Inches Millimeters Symbol Min Max Min Max A 0.035 0.057 0.95 1.45 A1 0.00 0.006 0.05 0.15 A2 0.035 0.051 0.90 1.30 b 0.009 0.015 0.30 0.50 c 0.003 0.009 0.08 0.22 D 0.111 0.117 2.80 3.00 E 0.106 0.114 2.60 3.00 E1 0.060 0.066 1.50 1.70 L 0.014 0.022 0.30 0.60 L1 0.023 REF 0.60 REF e 0.0256 BSC 0.95 BSC e1 0.0768 BSC 1.90 BSC θ 0° 8° 0° 8°

January 2007 PCS809/PCS810 rev 0.2 3-Pin µP Voltage Supervisor 8 of 8 Notice: The information in this document is subject to change without notice. Pre © Copyright 2007 PulseCore Semiconductor Corporation. A ll rights reserved. Our logo and name are trademarks or registered trademarks of PulseCore Semi conductor. All other brand and produc t names may be the trademarks of their respective companies. PulseCore reserves the right to make c hanges to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents PulseCore’s best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the product descri bed herein is under development, significant changes to these specifications are possible. The information in this product dat a sheet is intended to be general descriptive information for potential customers and users, and is not in tended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or li ability arising out of the applic ation or use of any product described herein, and disclaims any express or implied warr anties related to the sale and/or use of PulseCore products including liability or warranties related to fitness for a particu lar purpose, merchantability, or infringement of any intellec tual property rights, except as express agreed to in PulseCore’ s Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclus ively according to PulseCore’s Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellect ual property rights of PulseCore or third partie s. PulseCore does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of PulseC ore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use. PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com Copyright © PulseCore Semiconductor All Rights Reserved Part Number: PCS809/810 Document Version: 0.2 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued PulseCore Semiconductor, dated 11-11-2003