PCM63

PCM63P BURR-BROWN | Alldatasheet

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Technical content

FEATURES

l COLINEAR 20-BIT AUDIO DAC l NEAR-IDEAL LOW LEVEL OPERATION l GLITCH-FREE OUTPUT l ULTRA LOW –96dB max THD+N (Without External Adjustment) l 116dB SNR min (A-Weight Method) l INDUSTRY STD SERIAL INPUT FORMAT l FAST (200ns) CURRENT OUTPUT (±2mA; ±2% max) l CAPABLE OF 16x OVERSAMPLING l COMPLETE WITH REFERENCE

DESCRIPTION

The PCM63P is a precision 20-bit digital-to-analog converter with ultra-low distortion (–96dB max with a full scale output; PCM63P-K). Incorporated into the PCM63P is a unique Colinear dual-DAC per channel architecture that eliminates unwanted glitches and other nonlinearities around bipolar zero. The PCM63P also features a very low noise (116dB max SNR; A-weighted method) and fast settling current output (200ns typ, 2mA step) which is capable of 16-times oversampling rates. Applications include very low distortion frequency synthesis and high-end consumer and professional digital audio applications. Colinear™, Burr-Brown Corp. Colinear™ 20-Bit Monolithic Audio DIGITAL-TO-ANALOG CONVERTER 19-Bit Upper DAC 19-Bit Lower DAC Upper DAC Positive Data Latches Lower DAC Negative Data Latches Input Shift Register and Control Logic Buried Zener Reference Servo Amp Ref Amp PCM63P 20-Bit DAC R R I FEEDBACK FEEDBACK OUT Bipolar Offset Current Offset Decouple 25 7 12 Analog Common Digital Common Reference Decouple Servo Decouple Clock Latch Enable Data 23 24 Upper B2 Adj 28 11 –5V Analog 21 3 +5V Analog Lower B2 Adj –5V Digital +5V Digital Colinear Potentiometer Voltage DEMO BOARD AVAILABLE See Appendix A International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 PCM63P © 1990 Burr-Brown Corporation PDS-1083F Printed in U.S.A. January, 1998

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. SPECIFICATIONS ELECTRICAL All specifications at 25°C and ±VA and ±VD = ±5V, unless otherwise noted. PCM63P, PCM63P-J, PCM63P-K PARAMETER CONDITIONS MIN TYP MAX UNITS RESOLUTION 20 Bits DYNAMIC RANGE, ΤΗ D +Ν at –60dB Referred to Full Scale PCM63P 96 100 dB PCM63P-J 100 104 dB PCM63P-K 104 108 dB DIGITAL INPUT Logic Family TTL/CMOS Compatible Logic Level: V IH +2.4 +V D V VIL 0 0.8 V IIH VIH = +2.7V +1 µA IIL VIL = +0.4V –50 µA Data Format Serial, MSB First, BTC(1) Input Clock Frequency 12.5 25 MHz TOTAL HARMONIC DISTORTION + N (2), Without Adjustments PCM63P f = 991Hz (0dB)(3) fS = 352.8kHz(4) –92 –88 dB f = 991Hz (–20dB) f S = 352.8kHz –80 –74 dB f = 991Hz (–60dB) f S = 352.8kHz –40 –36 dB PCM63P-J f = 991Hz (0dB) f S = 352.8kHz –96 –92 dB f = 991Hz (–20dB) f S = 352.8kHz –82 –76 dB f = 991Hz (–60dB) f S = 352.8kHz –44 –40 dB PCM63P-K f = 991Hz (0dB) f S = 352.8kHz –100 –96 dB f = 991Hz (–20dB) f S = 352.8kHz –88 –82 dB f = 991Hz (–60dB) f S = 352.8kHz –48 –44 dB ACCURACY Level Linearity at –90dB Signal Level ±0.3 ±1d B Gain Error ±1 ±2% Bipolar Zero Error(5) ±12 µA Gain Drift 0 °C to 70°C 25 ppm/ °C Bipolar Zero Drift 0 °C to 70°C 4 ppm of FSR/ °C Warm-up Time 1 Minute IDLE CHANNEL SNR (6) 20Hz to 20kHz at BPZ(7) +116 +120 dB POWER SUPPLY REJECTION +86 dB ANALOG OUTPUT Output Range ±2.00 mA Output Impedance 670 Ω Internal RFEEDBACK 1.5 k Ω Settling Time 2mA Step 200 ns Glitch Energy No Glitch Around Zero POWER SUPPLY REQUIREMENTS A, ±VD Supply Voltage Range ±4.50 ±5 ±5.50 V +IA, +ID Combined Supply Current +V A, +VD = +5V 10 15 mA –IA, –ID Combined Supply Current –V A, –VD = –5V –35 –45 mA Power Dissipation ±VA, ±VD = ±5V 225 300 mW TEMPERATURE RANGE Specification 0 +70 °C Operating –40 +85 °C Storage –60 +100 °C NOTES: (1) Binary Two’s Complement coding. (2) Ratio of (DistortionRMS + NoiseRMS ) / SignalRMS . (3) D/A converter output frequency (signal level). (4) D/A converter sample frequency (8 x 44.1kHz; 8x oversampling). (5) Offset error at bipolar zero. (6) Measured using an OPA27 and 1.5kΩ feedback and an A-weighted filter. (7) Bipolar Zero.

ORDERING INFORMATION

TEMPERATURE MAX THD+N, PRODUCT PACKAGE RANGE AT 0dB PCM63P 28-Pin Plastic DIP 0 °C to +70°C –88dB PCM63P-J 28-Pin Plastic DIP 0 °C to +70°C –92dB PCM63P-K 28-Pin Plastic DIP 0 °C to +70°C –96dB PIN ASSIGNMENTS PIN DESCRIPTION MNEMONIC P1 Servo Amp Decoupling Capacitor CAP P2 +5V Analog Supply Voltage +V A P3 Reference Decoupling Capacitor CAP P4 Offset Decoupling Capacitor CAP P5 Bipolar Offset Current Output (+2mA) BPO P6 DAC Current Output (0 to –4mA) I OUT P7 Analog Common Connection ACOM P8 No Connection NC P9 Feedback Resistor Connection (1.5k Ω )R F P10 Feedback Resistor Connection (1.5kΩ )R F 2 P11 –5V Digital Supply Voltage –V D P12 Digital Common Connection DCOM P13 +5V Digital Voltage Supply +V D P14 No Connection NC P15 No Connection NC P16 No Connection NC P17 No Connection NC P18 DAC Data Clock Input CLK P19 No Connection NC P20 DAC Data Latch Enable LE P21 DAC Data Input DATA P22 No Connection NC P23 Optional Upper DAC Bit-2 Adjust (–4.29V)* UB2 Adj P24 Optional Lower DAC Bit-2 Adjust (–4.29V)* LB2 Adj P25 Bit Adjust Reference Voltage Tap (–3.52V)* V POT P26 No Connection NC P27 No Connection NC P28 –5V Analog Supply Voltage –V A *Nominal voltages at these nodes assuming ±VA; ±VD = ±5V. ABSOLUTE MAXIMUM RATINGS Thermal Resistance, NOTE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.

PACKAGE INFORMATION

PRODUCT PACKAGE NUMBER (1) PCM63P 28-Pin Plastic DIP 215 PCM63P-J 28-Pin Plastic DIP 215 PCM63P-K 28-Pin Plastic DIP 215 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.

–90dB SIGNAL (10Hz to 20kHz Bandwidth) 200 100 –100 –200 Output Level (µV) 0 400 800 1200 1600 2000 Time (µs) –110dB SIGNAL (10Hz to 20kHz Bandwidth) –20 –40 Output Level (µV) 0 400 800 1200 1600 2000 Time (µs) –90dB SIGNAL SPECTRUM (100Hz Bandwidth) –80 –100 –120 –140 –160 Power Spectrum (dB) 0 4k 8k 12k 16k 20k Frequency (Hz) TYPICAL PERFORMANCE CURVES All specifications at 25°C and ±VA and ±VD = ±5.0V, unless otherwise noted. FPO FPOFPO 16-BIT LEVEL LINEARITY (Dithered Fade to Noise) Deviation from Ideal Level (dB) –120 Output Signal Level (dB) 16-BIT MONOTONICITY 8.83ms/div 1.5 0.5 –0.5 –1.5 Output Voltage (mV) THD+N vs FREQUENCY –40 –60 –100 –120 –80 20 100 1k 10k Output Frequency (Hz) THD+N (dB) –60dB –40dB –20dB 0dB

DUAL-DAC COLINEAR ARCHITECTURE Digital audio systems have traditionally used laser-trimmed, current-source DACs in order to achieve sufficient accuracy. However even the best of these suffer from potential low- level nonlinearity due to errors at the major carry bipolar zero transition. More recently, DACs employing a different architecture which utilizes noise shaping techniques and very high oversampling frequencies, have been introduced (“Bitstream”, “MASH”, or 1-bit DACs). These DACs over- come the low level linearity problem, but only at the expense of signal-to-noise performance, and often to the detriment of channel separation and intermodulation distortion if the succeeding circuitry is not carefully designed. The PCM63 is a new solution to the problem. It combines all the advantages of a conventional DAC (excellent full scale performance, high signal-to-noise ratio and ease of use) with superior low-level performance. Two DACs are combined in a complementary arrangement to produce an extremely linear output. The two DACs share a common reference and a common R-2R ladder to ensure perfect tracking under all conditions. By interleaving the individual bits of each DAC and employing precise laser trimming of resistors, the highly accurate match required between DACs is achieved. This new, complementary linear or dual-DAC Colinear approach, which steps away from zero with small steps in both directions, avoids any glitching or “large” linearity errors and provides an absolute current output. The low level performance of the PCM63P is such that real 20-bit resolu- tion can be realized, especially around the critical bipolar zero point. Table I shows the conversion made by the internal logic of the PCM63P from binary two’s complement (BTC). Also, the resulting internal codes to the upper and lower DACs (see front page block diagram) are listed. Notice that only the LSB portions of either internal DAC are changing around bipolar zero. This accounts for the superlative per- formance of the PCM63P in this area of operation. DISCUSSION OF SPECIFICATIONS DYNAMIC SPECIFICATIONS Total Harmonic Distortion + Noise The key specification for the PCM63P is total harmonic distortion plus noise (THD+N). Digital data words are read into the PCM63P at eight times the standard compact disk audio sampling frequency of 44.1kHz (352.8kHz) so that a sine wave output of 991Hz is realized. For production testing, the output of the DAC goes to an I to V converter, then to a programmable gain amplifier to provide gain at lower signal output test levels, and then through a 40kHz low pass filter before being fed into an analog type distortion analyzer. Figure 1 shows a block diagram of the production THD+N test setup. For the audio bandwidth, THD+N of the PCM63P is essen- tially flat for all frequencies. The typical performance curve, “THD+N vs Frequency,” shows four different output signal levels: 0dB, –20dB, –40dB, and –60dB. The test signals are derived from a special compact test disk (the CBS CD-1). It is interesting to note that the –20dB signal falls only about 10dB below the full scale signal instead of the expected 20dB. This is primarily due to the superior low-level signal performance of the dual-DAC Colinear architecture of the PCM63P. In terms of signal measurement, THD+N is the ratio of DistortionRMS + NoiseRMS / SignalRMS expressed in dB. For the PCM63P, THD+N is 100% tested at all three specified output levels using the test setup shown in Figure 1. It is significant to note that this test setup does not include any output deglitching circuitry. All specifications are achieved without the use of external deglitchers. Dynamic Range Dynamic range in audio converters is specified as the measure of THD+N at an effective output signal level of –60dB referred to 0dB. Resolution is commonly used as a theoretical measure of dynamic range, but it does not take into account the effects of distortion and noise at low signal levels. The INPUT CODE LOWER DAC CODE UPPER DAC CODE ANALOG OUTPUT (20-bit Binary Two’s Complement) (19-bit Straight Binary) (19-bit Straight Binary) *The extra weight of 1LSB is added at this point to make the transfer function symmetrical around bipolar zero. TABLE I. Binary Two’s Complement to Colinear Conversion Chart.

FIGURE 1. Production THD+N Test Setup. any previously available D/A converter. for PCM63P at this signal level is typically less than ±0.3dB. pattern then begins again at bipolar zero. 16 bits), other than by a change in the noise level. gral linearity in the DAC, depending on the grade specified. individual output code can be guaranteed.

for both if no immediate improvement were noted). This procedure would require the generation of the digital bit-2 major carry code to the input of the PCM63P and a DVM or oscilloscope capable of reading the output voltage for a one LSB step (5.72µV) in addition to a distortion analyzer. A more practical approach would be to forego the minor correction for the bit-2 major carry adjustment and only adjust for upper and lower DAC gain matching. The prob- lem is that just by connecting the MSB circuitry to the PCM63P, the odds are that the upper and lower bit-2 weights would be greatly changed from their unadjusted states and thereby adversely affect the desired gain adjustment. Just centering the 100kΩ potentiometers would not necessarily provide the correct starting point. To guarantee that each 100kΩ potentiometer would be set to the correct starting or null point (no current into or out of the MSB adjust pins), the voltage drop across each corresponding 330kΩ resistor would have to measure 0V. A voltage drop of ±1.25mV across either 330kΩ resistor would correspond to a ±1LSB change in the null point from its unadjusted state (1LSB in current or 3.81nA x 330kΩ = 1.26mV). Once these starting points for each potentiometer had been set, each potentiometer would then be adjusted equally, in opposite directions, to achieve the lowest full-scale THD+N possible. If no imme- diate improvement were noted, the direction of rotation for both potentiometers would be reversed. One direction of potentiometer counter-rotations would only make the gain mismatch and resulting THD+N worse, while the opposite would gradually improve and then worsen the THD+N after passing through a no mismatch point. The determination of the correct starting direction would be arbitrary. This proce- dure still requires a good DVM in addition to a distortion analyzer. Each user will have to determine if a small improvement in full-scale THD+N for their application is worth the expense of performing a proper MSB adjustment.

APPLICATIONS

The most common application for the PCM63P is in high- performance and professional digital audio playback, such as in CD and DAT players. The circuit in Figure 6 shows the PCM63P in a typical combination with a digital interface format receiver chip (Yamaha YM3623), an 8x interpolating digital filter (Burr-Brown DF1700P), and two third-order low-pass anti-imaging filters (implemented using Burr-Brown OPA2604APs). Using an 8x digital filter increases the number of samples to the DAC by a factor of 8, thereby reducing the need for a higher order reconstruction or anti-imaging analog filter on the DAC output. An analog filter can now be constructed using a simple phase-linear GIC (generalized immittance converter) architecture. Excellent sonic performance is achieved using a digital filter in the design, while reducing overall circuit complexity at the same time. Because of its superior low-level performance, the PCM63P is also ideally suited for other high-performance applications such as direct digital synthesis (DDS).

FIGURE 6. Stereo Audio Application.