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32bit ∆Σ Modulator Current Segment DAC Current Segment DAC I/VI/V Analog Mute Analog Mute Zero Data Detector UVP/Reset PLL Clock Power Supply Ch. Pump POR Clock Halt Detection Advanced Mute Control MCK BCK LRCK CAPP CAPM VNEG LINE OUT DIN (i2s) PCM510xA CPVDD (3.3V) AVDD (3.3V) DVDD (1.8V or 3.3V) GND PCM5100A,PCM5101A,PCM5102A www.ti.com SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 2VRMSDirectPath™ ,112/106/100dBAudioStereoDACwith32-bit,384kHzPCM Interface Check forSamples: PCM5100A ,PCM5101A ,PCM5102A 1FEATURES TypicalPerformance (3.3VPower Supply) 23• Market-LeadingLow Out-of-BandNoise Parameter PCM5102 /PCM5101 /

  • SelectableDigital-FilterLatency and PCM5100 Performance SNR 112 /106 /100dB
  • No DC BlockingCapacitorsRequired Dynamic Range 112 /106 /100dB
  • IntegratedNegativeCharge Pump THD+N @ -1dBFS –93 /–92 /–90dB FullScaleOutput 2.1VRMS (GND center)• InternalPop-Free ControlFor Sample-Rate Changes Or Clock Halts Normal 8× Oversampling DigitalFilterLatency:20tS Low Latency 8× Oversampling DigitalFilterLatency:3.5tS• IntelligentMuting System; SoftUp or Down Ramp and Analog Mute For 120dB Mute SNR Sampling Frequency 8kHz to384kHz With Popless Operation. System Clock Multiples(fSCK ):64,128,192,256,384,512, 768,1024,1152,1536,2048,3072;up to50 MHz• IntegratedHigh-PerformanceAudio PLL With BCK ReferenceTo Generate SCK Internally
  • Supports 1.8VDigitalInputInterface
  • Small 20-pinTSSOP Package Figure1. PCM510xA FunctionalBlock Diagram OTHER KEY FEATURES
  • Hardware Configuration• Accepts 16-,24-,And 32-BitAudio Data
  • SingleSupply Operation:• PCM Data Formats:I2S,Left-Justified – 3.3VAnalog,1.8Vor 3.3VDigital• Automatic Power-Save Mode When LRCK And
  • IntegratedPower-On ResetBCK Are Deactivated.
  • 1.8Vor 3.3VFailsafeLVCMOS DigitalInputs Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2System Two Cascade,AudioPrecisionaretrademarksofAudioPrecision. 3DirectPathisa trademarkofTexas,Instruments,Inc.. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2012,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

PCM5100A,PCM5101A,PCM5102A SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 www.ti.com This integratedcircuitcan be damaged by ESD. Texas Instrumentsrecommends thatallintegratedcircuitsbe handled with appropriateprecautions.Failuretoobserveproperhandlingand installationprocedurescan cause damage. ESD damage can rangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmay be more susceptibletodamage because verysmallparametricchanges couldcause thedevicenottomeet itspublishedspecifications.

APPLICATIONS

  • A/V Receivers
  • DVD, BD Players
  • HDTV Receivers
  • ApplicationsRequiring2VRMS Audio Output

DESCRIPTION

The PCM510xA devicesare a familyof monolithicCMOS integratedcircuitsthatincludea stereodigital-to- analogconverterand additionalsupportcircuitryina smallTSSOP package.The PCM510xA uses the latest generationofTI’s advanced segment-DAC architecturetoachieveexcellentdynamic performanceand improved tolerancetoclockjitter. The PCM510xA provides2.1VRMS ground centeredoutputs,allowingdesignersto eliminateDC blocking capacitorson theoutput,as wellas externalmutingcircuitstraditionallyassociatedwithsinglesupplylinedrivers. The integratedlinedriversurpassesallothercharge-pumpbased linedriversby supportingloadsdown to1kΩ. By supportingloadsdown to1kΩ,thePCM510xA can essentiallydriveup to10 productsinparallel.(LCD TV, DVDR, AV Receiversetc). The integratedPLL on the deviceremoves the requirementfora system clock(commonly known as master clock),allowinga 3-wireI2S connectionand reducingsystemEMI. Intelligentclockerrorand PowerSense under voltageprotectionutilizesa two levelmute system forpop-free performance.Upon clockerroror system power failure,thedevicedigitallyattenuatesthedata(orlastknown good data),thenmutes theanalogcircuit Compared withexistingDAC technology,the PCM510xA familyoffersup to 20dB lowerout-of-bandnoise, reducingEMI and aliasingindownstream amplifiers/ADCs.(fromtraditional100kHz OBN measurements allthe way to3MHz) The PCM510xA acceptsindustry-standardaudiodataformatswith16-to32-bitdata.Sample ratesup to384kHz aresupported. Table1.DifferencesBetween PCM510xA Devices PartNumber Dynamic Range SNR THD PCM5102A 112dB 112dB –93dB PCM5101A 106dB 106dB –92dB PCM5100A 100dB 100dB –90dB spacer

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PCM5100A,PCM5101A,PCM5102A www.ti.com SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 This integratedcircuitcan be damaged by ESD. Texas Instrumentsrecommends thatallintegratedcircuitsbe handled with appropriateprecautions.Failuretoobserveproperhandlingand installationprocedurescan cause damage. ESD damage can rangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmay be more susceptibletodamage because verysmallparametricchanges couldcause thedevicenottomeet itspublishedspecifications. DEVICE INFORMATION TERMINAL FUNCTIONS, PCM510xA PCM510xA (topview) Table2. TERMINAL FUNCTIONS, PCM510x A TERMINAL I/O DESCRIPTION NAME NO. CPVDD 1 — Charge pump power supply,3.3V CAPP 2 O Charge pump flyingcapacitorterminalforpositiverail CPGND 3 — Charge pump ground CAPM 4 O Charge pump flyingcapacitorterminalfornegativerail VNEG 5 O Negativechargepump railterminalfordecoupling,-3.3V OUTL 6 O AnalogoutputfromDAC leftchannel OUTR 7 O AnalogoutputfromDAC rightchannel AVDD 8 -— Analogpower supply,3.3V AGND 9 — Analogground DEMP 10 I De-emphasiscontrolfor44.1kHzsamplingrate(1):Off(Low)/On (High) FLT 11 I Filterselect:Normal latency(Low)/Low latency(High) SCK 12 I System clockinput(1) BCK 13 I Audiodatabitclockinput(1) DIN 14 I Audiodatainput(1) LRCK 15 I Audiodataword clockinput(1) FMT 16 I Audioformatselection:I2S (Low)/Leftjustified(High) XSMT 17 I Softmute control(1):Softmute (Low)/softun-mute(High) Internallogicsupplyrailterminalfordecoupling,orexternal1.8VsupplyLDOO 18 — terminal DGND 19 — Digitalground DVDD 20 — Digitalpower supply,1.8Vor3.3V (1) FailsafeLVCMOS Schmitttriggerinput Copyright© 2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:PCM5100A PCM5101A PCM5102A

PCM5100A,PCM5101A,PCM5102A SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 www.ti.com ABSOLUTE MAXIMUM RATINGS overoperatingfree-airtemperaturerange(unlessotherwisenoted) VALUE UNIT AVDD, CPVDD, DVDD –0.3to3.9 SupplyVoltage LDOO wtihDVDD at1.8V(See Figure40 and Figure42) –0.3to2.25 DVDD at1.8V –0.3to2.25 V DigitalInputVoltage DVDD at3.3V –0.3to3.9 AnalogInputVoltage –0.3to3.9 OperatingTemperatureRange –25 to85 StorageTemperatureRange –65 to150 THERMAL CHARACTERISTICS overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT θJA ThetaJA HighK 91.2 ψJT PsiJT 1.0 ψJB PsiJB 41.5 ºC/W θJC ThetaJC Top 25.3 θJB ThetaJB 42.0

ELECTRICAL CHARACTERISTICS

AllspecificationsatTA = 25°C, AV DD = CPV DD = DV DD = 3.3V,fS = 48kHz,systemclock= 512 fS and 24-bitdataunless otherwisenoted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Resolution 16 24 32 Bits Data Format (PCM Mode) Audiodatainterfaceformat I2S,leftjustified Audiodatabitlength 16,24,32-bitacceptable Audiodataformat MSB First,2’s Complement fS (1) Samplingfrequency 8 384 kHz System clockfrequency 64,128,192,256,384,512,768,1024,1152,1536,2048,or 3072 fSCK ,up to50Mhz DigitalInput/Output LogicFamily:3.3VLVCMOS compatible VIH 0.7×DV DD Inputlogiclevel V VIL 0.3×DV DD IIH VIN = VDD 10 Inputlogiccurrent µA IIL VIN = 0V –10 VOH IOH = –4mA 0.8×DV DD Outputlogiclevel V VOL IOL = 4mA 0.22×DV DD LogicFamily1.8VLVCMOS compatible VIH 0.7×DV DD Inputlogiclevel V VIL 0.3×DV DD IIH VIN = VDD 10 Inputlogiccurrent µA IIL VIN = 0V –10 VOH IOH = –2mA 0.8×DV DD Outputlogiclevel V VOL IOL = 2mA 0.22×DV DD (1) One sample timesidefinedas thereciprocalofthesamplingfrequency.1tS = 1/fS

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PCM5100A,PCM5101A,PCM5102A www.ti.com SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 ELECTRICAL CHARACTERISTICS (continued) AllspecificationsatTA = 25°C, AV DD = CPV DD = DV DD = 3.3V,fS = 48kHz,systemclock= 512 fS and 24-bitdataunless otherwisenoted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Dynamic Performance (PCM Mode) (2)(3)(Valuesshown forthreedevicesPCM5102/PCM5101/PCM5100) THD+N at–1 dBFS (3) fS = 96kHz –93/–92/–90 Dynamic range(3) EIAJ,A-weighted,fS = 48kHz 106/100/95 112/106/100 EIAJ,A-weighted,fS = 96kHz 112/106/100 EIAJ,A-weighted,fS = 192kHz 112/106/100 Signal-to-noiseratio(3) EIAJ,A-weighted,fS = 48kHz 112/106/100 dB EIAJ,A-weighted,fS = 96kHz 112/106/100 EIAJ,A-weighted,fS = 192kHz 112/106/100 Signaltonoiseratiowith EIAJ,A-weighted,fS = 48kHz 113 123 analogmute(3)(4) EIAJ,A-weighted,fS = 96kHz 123 EIAJ,A-weighted,fS = 192kHz 123 ChannelSeparation fS = 48 kHz 100/95/90 109/103/97 fS = 96kHz 109/103/97 fS = 192kHz 109/103/97 Analog Output Outputvoltage 2.1 VRMS Gain error –6 ±2.0 6 % ofFSR Gain mismatch,channel-to- –6 ±2.0 6 % ofFSRchannel Bipolarzeroerror Atbipolarzero –5 ±1.0 5 mV Load impedance 1 kΩ FilterCharacteristics–1:Normal Pass band 0.45fS Stopband 0.55fS Stopband attenuation –60 dB Pass-bandripple ±0.02 Delaytime 20tS s FilterCharacteristics–2:Low Latency Pass band 0.47fS Stopband 0.55fS Stopband attenuation –52 dB Pass-bandripple ±0.0001 Delaytime 3.5tS s (2) Filtercondition:THD+N: 20Hz HPF, 20kHz AES17 LPF Dynamic range:20Hz HPF, 20kHz AES17 LPF, A-weightedSignal-to-noise ratio:20Hz HPF, 20kHz AES17 LPF, A-weightedChannelseparation:20Hz HPF, 20kHz AES17 LPF Analogperformancespecifications aremeasured usingtheSystem Two Cascade™ audiomeasurement systemby AudioPrecision™ intheRMS mode. (3) Outputloadis10kΩ,with470Ω outputresistorand a 2.2nFshuntcapacitor(seerecommended outputfilter). (4) AssertXSMT orbothL-chand R-ch PCM dataareBPZ Copyright© 2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:PCM5100A PCM5101A PCM5102A

PCM5100A,PCM5101A,PCM5102A SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) AllspecificationsatTA = 25°C, AV DD = CPV DD = DV DD = 3.3V,fS = 48kHz,systemclock= 512 fS and 24-bitdataunless otherwisenoted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Power Supply Requirements DV DD Digitalsupplyvoltage TargetDV DD = 1.8V 1.65 1.8 1.95 VDC DV DD Digitalsupplyvoltage TargetDV DD = 3.3V 3.0 3.3 3.6 AV DD Analogsupplyvoltage 3.0 3.3 3.6 VDC CPV DD Charge-pump suplyvoltage 3.0 3.3 3.6 fS = 48kHz 7 IDD DV DD supplycurrentat1.8V(5) fS = 96kHz 8 mA fS = 192kHz 9 fS = 48kHz 7 IDD DV DD supplycurrentat1.8V(6) fS = 96kHz 8 mA fS = 192kHz 9 IDD DV DD supplycurrentat1.8V(7) 0.3 mA fS = 48kHz 7 12 IDD DV DD supplycurrentat3.3V(5) fS = 96kHz 8 mA fS = 192kHz 9 fS = 48kHz 8 13 IDD DV DD supplycurrentat3.3V(6) fS = 96kHz 9 mA fS = 192kHz 10 IDD DV DD supplycurrentat3.3V(7) 0.5 0.8 mA fS = 48kHz 11 16 AV DD /CPV DD SupplyICC fS = 96kHz 11 mACurrent(5) fS = 192kHz 11 fS = 48kHz 22 32 AV DD /CPV DD SupplyICC fS = 96kHz 22 mACurrent(6) fS = 192kHz 22 AV DD /CPV DD Supply fS = n/a 0.2 0.4ICC mACurrent(7) fS = 48kHz 48.9 185 Power Dissipation,DV DD = fS = 96kHz 50.7 mW1.8V(5) fS = 192kHz 52.5 fS = 48kHz 85.2 187 Power Dissipation,DV DD = fS = 96kHz 87.0 mW1.8V(6) fS = 192kHz 88.8 Power Dissipation,DV DD = fS = n/a(PowerDown Mode) 1.2 mW1.8V(7) fS = 48kHz 59.4 92.4 Power Dissipation,DV DD = fS = 96kHz 62.7 mW3.3V(5) fS = 192kHz 66.0 fS = 48kHz 99.0 148.5 Power Dissipation,DV DD = fS = 96kHz 102.3 mW3.3V(6) fS = 192kHz 105.6 Power Dissipation,DV DD = fS = n/a(PowerDown Mode) 2.3 4.0 mW3.3V(7) (5) InputisBipolarZerodata. (6) Inputis1kHz -1dBFS data (7) Power Down Mode

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-110 -90 -70 -50 -30 -10 -100 -80 -60 -40 -20 0 Input Level [dBFS] THD+N [dB] -10 -110 -90 -70 -50 -30 -100 -80 -60 -40 -20 0 Input Level [dBFS] THD+N [dB] -110 -90 -70 -50 -30 -10 -100 -80 -60 -40 -20 0 Input Level [dBFS] THD+N [dB] PCM5100A,PCM5101A,PCM5102A www.ti.com SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 TYPICAL CHARACTERISTICS AllspecificationsatTA = 25°C, AV DD = CPV DD = DV DD = 3.3V,fS = 48kHz,systemclock= 512 fS and 24-bitdataunless otherwisenoted. PCM5100 A THD+N PCM5101 A THD+N vs vs InputLevel InputLevel Figure2. Figure3. PCM5102 A THD+N vs InputLevel Figure4. Copyright© 2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:PCM5100A PCM5101A PCM5102A

-180 -160 -140 -120 -100 -80 -60 -40 -20 0 5 10 15 20 Frequency [kHz] Amplitude [dB] -180 -160 -140 -120 -100 -80 -60 -40 -20 0 5 10 15 20 Frequency [kHz] Amplitude [dB] -180 -160 -140 -120 -100 -80 -60 -40 -20 0 5 10 15 20 Frequency [kHz] Amplitude [dB] PCM5100A,PCM5101A,PCM5102A SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) AllspecificationsatTA = 25°C, AV DD = CPV DD = DV DD = 3.3V,fS = 48kHz,systemclock= 512 fS and 24-bitdataunless otherwisenoted. PCM5100 A FFT PlotatBPZ With AMUTE PCM5101 A FFT PlotatBPZ With AMUTE Figure5. Figure6. PCM5102 A FFT PlotatBPZ With AMUTE Figure7.

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-160 -140 -120 -100 -80 -60 -40 -20 0 50 100 150 200 250 300 Frequency [kHz] Amplitude [dB] -160 -140 -120 -100 -80 -60 -40 -20 0 50 100 150 200 250 300 Frequency [kHz] Amplitude [dB] -160 -140 -120 -100 -80 -60 -40 -20 0 50 100 150 200 250 300 Frequency [kHz] Amplitude [dB] PCM5100A,PCM5101A,PCM5102A www.ti.com SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 TYPICAL CHARACTERISTICS (continued) AllspecificationsatTA = 25°C, AV DD = CPV DD = DV DD = 3.3V,fS = 48kHz,systemclock= 512 fS and 24-bitdataunless otherwisenoted. PCM5100 A FFT Plotat–60dB To 300kHz PCM5101 A FFT Plotat–60dB To 300kHz Figure8. Figure9. PCM5102 A FFT Plotat–60dB To 300kHz Figure10. Copyright© 2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:PCM5100A PCM5101A PCM5102A

SCK, BCK, LRCK Internal Reset 4 ms Reset Removal 1.5V 1.8V DVDD, LDOO 2.8V 3.3V AVDD, CPVDD Internal Reset I2S Clocks SCK, BCK, LRCK Internal Reset 4 ms Reset Removal 2.8V 3.3V AVDD, DVDD, CPVDD PCM5100A,PCM5101A,PCM5102A SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 www.ti.com

APPLICATION INFORMATION

Reset and System Clock Functions Power-On Reset Function The PCM510xA includesa power-on resetfunctionshown inFigure11. With VDD > 2.8V,the power-on reset functionisenabled.Aftertheinitializationperiod,thePCM510xA issettoitsdefaultresetstate. Figure11. Power-On Reset Timing,DVDD = 3.3V The PCM510xA includesa power-on resetfunctionshown inFigure12 operatingat DVDD=1.8V. With AVDD greaterthan approximately2.8V, and PVDD greaterthan approximately2.8V, and DVDD greaterthan approximately1.5V,thepower-onresetfunctionisenabled.Aftertheinitializationperiod,thePCM510xA issetto itsdefaultresetstate. Figure12. Power-On Reset Timing,DVDD = 1.8V

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(SCK) tSCKL "L" "H" 0.3*DVDD 0.7*DVDD tSCY PCM5100A,PCM5101A,PCM5102A www.ti.com SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 System Clock Input The PCM510xA requiresa system clocktooperatethedigitalinterpolationfiltersand advanced segment DAC modulators.The system clockisappliedattheSCK input(pin12) and supportsup to50MHz. The PCM510xA system-clockdetectioncircuitautomaticallysenses the system-clockfrequency.Common audio sampling frequenciesof8kHz, 16kHz, 32kHz - 44.1kHz - 48kHz, 88.2kHz - 96kHz, 176.4kHz -192kHz,and 384kHz with ±4% toleranceare supported.The samplingfrequencydetectorsetstheclockforthedigitalfilter,DeltaSigma Modulator(DSM) and theNegativeCharge Pump (NCP) automatically.Table3 shows examples ofsystem clock frequenciesforcommon audiosamplingrates. SCK ratesthatare not common to standardaudioclocks,between 1MHz and 50MHz, are onlysupportedin softwaremode , availableonlyinthe PCM512x and PCM514x devices,by configuringvariousPLL and clock- dividerregisters.Thisprogrammabilityallowsthedevicetobecome a clockmasterand drivethehostserialport withLRCK and BCK, from a non-audiorelatedclock(forexample,using12MHz to generate44.1kHz (LRCK) and 2.8224MHz (BCK) ). Figure13 shows thetimingrequirementsforthesystemclockinput.Foroptimalperformance,use a clocksource withlowphase jitterand noise. Table3.System Master Clock InputsforAudio RelatedClocks System Clock Frequency (fSCK )(MHz)Sampling Frequency 64 fS 128 fS 192 fS 256 fS 384 fS 512 fS 768 fS 1024 fS 1152 fS 1536 fS 2048 fS 3072 fS (1) Thissystemclockrateisnotsupportedforthegivensamplingfrequency. (2) Thissystemclockrateissupportedby PLL mode. Figure13. Timing Requirements forSCK Input Table4.Timing Requirements forSCK Input Parameters Min Max Unit tSCY System clockpulsecycletime 20 1000 ns DVDD=1.8V 8 tSCKH System clockpulsewidth,High ns DVDD=3.3V 9 DVDD=1.8V 8 tSCKL System clockpulsewidth,Low ns DVDD=3.3V 9 Copyright© 2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:PCM5100A PCM5101A PCM5102A

PCM5100A,PCM5101A,PCM5102A SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 www.ti.com System Clock PLL Mode The system clockPLL mode allowsdesignerstouse a simple3-wireI2S audiosourcewhen drivingtheDAC. The 3-wiresourcereducesthe need fora highfrequencySCK, making PCB layouteasier,and reduceshigh frequencyelectromagneticinterference. The devicestartsup expectingan externalSCK input,butifBCK and LRCK startcorrectlywhileSCK remainsat ground levelfor16 successiveLRCK periods,thentheinternalPLL starts,automaticallygeneratingan internal SCK from the BCK reference.The PCM510xA disablesthe internalPLL when an externalSCK issupplied; specificBCK ratesare requiredtogeneratean appropriatemasterclock.Table5 describestheminimum and maximum BCK perLRCK fortheintegratedPLL toautomaticallygeneratean internalSCK. Table5.BCK Rates (MHz) by LRCK Sample Rate for PCM510xA PLL Operation BCK (fS) Sample f(kHz) 32 64 8 - - 16 - 1.024 32 1.024 2.048 44.1 1.4112 2.8224 48 1.536 3.072 96 3.072 6.144 192 6.144 12.288 384 12.288 24.576 Audio Data Interface Audio SerialInterface The audiointerfaceportisa 3-wireserialport,includingLRCK (pin15),BCK (pin13),and DIN (pin14).BCK is theserialaudiobitclock,used toclocktheserialdatapresenton DIN intotheserialshiftregisteroftheaudio interface.SerialdataisclockedintothePCM510xA on therisingedge ofBCK. LRCK istheserialaudioleft/right word clock. Table6.PCM510xA Audio Data Formats,BitDepths and Clock Rates MAX LRCKCONTROL MODE FORMAT DATA BITS SCK RATE [xfS] BCK RATE [xfS]FREQUENCY [fS] 128 – 3072Up to192kHz 64,48,32(≤50MHz)Hardware Control I2S/LJ 32,24,20,16 384kHz 64,128 64,48,32 The PCM510xA requiresthe synchronizationof LRCK and system clock,but does not need a specificphase relationbetween LRCK and systemclock. Iftherelationshipbetween LRCK and system clockchanges more than±5 SCK, internaloperationisinitialized withinone sample periodand analogoutputsareforcedtothebipolarzeroleveluntilresynchronizationbetween LRCK and systemclockiscompleted. Iftherelationshipbetween LRCK and BCK areinvalidmore than4 LRCK periods,internaloperationisinitialized withinone sample periodand analogoutputsareforcedtothebipolarzeroleveluntilresynchronizationbetween LRCK and BCK iscompleted.

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  1. 5 * DVDD 0. 5 * DVDD 0. 5 * DVDD (Input ) (Input ) (Input ) PCM5100A,PCM5101A,PCM5102A www.ti.com SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 PCM Audio Data Formats and Timing The PCM510xA supportsindustry-standardaudio data formats,includingstandardI2S and left-justified.Data formatsareselectedusingtheFMT (pin16),Low forI2S,and HighforLeft-justified. Allformatsrequirebinary2s complement,MSB-firstaudiodata.Figure14 shows a detailedtimingdiagramfor theserialaudiointerface. Figure14. PCM510xA SerialAudio Timing -Slave Table7.Audio InterfaceSlaveTiming Parameters Min Max Units tBCY BCK PulseCycleTime 40 ns tBCL BCK PulseWidthLOW 16 ns tBCH BCK PulseWidthHIGH 16 ns tBL BCK RisingEdge toLRCK Edge 8 ns tLB LRCK Edge toBCK RisingEdge 8 ns tDS DATA SetUp Time 8 ns tDH DATA HoldTime 8 ns fBCK BCK frequency@ DVDD=3.3V 24.576 MHz fBCK BCK frequency@ DVDD=1.8V 12.288 MHz Copyright© 2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:PCM5100A PCM5101A PCM5102A

Audio data word = 16-bit, BCK = 32, 48, 64f S DATA MSB LSB MSB LSB BCK 16 15 21 16 15 21 24 23 2 24 23 21 32 31 21 32 31 21 Audio data word = 24-bit, BCK = 48, 64f S Audio data word = 32-bit, BCK = 64fS LRCK LSB L-channel R-channel BCK DATA MSB LSB MSB LSB 16 15 21 16 15 21 - , DATA MSB LSB MSB 21 24 2 21 24 23 DATA MSB LSB MSB LSB 21 32 31 21 32 31 1tS Audio data word = 16-bit, BCK = 32, 48, 64f S Audio data word = 24-bit, BCK = 48, 64f S Audio data word = 32-bit, BCK = 64fS PCM5100A,PCM5101A,PCM5102A SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 www.ti.com LeftJustifiedData Format;L-channel= HIGH, R-channel= LOW Figure15. LeftJustifiedAudio Data Format I2S Data Format;L-channel= LOW, R-channel= HIGH Figure16. I2S Audio Data Format

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−120 −100 −80 −60 −40 −20 0 1 2 3 4 Frequency (x fS) Amplitude (dB) G012 −0.4 −0.2 0.0 0.2 0.4 0.6 0.8 1.0 0 50 100 150 200 250 300 350 400 Samples Amplitude (FFS) G023 PCM5100A,PCM5101A,PCM5102A www.ti.com SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 FunctionDescriptions InterpolationFilter The PCM510x A provides2 typesofinterpolationfilter.Users can selectwhichfiltertouse by usingtheFLT pin (pin11) Table8.DigitalInterpolationFilterOptions FLT Pin Description

0 FIR Normal x8/x4/x2/x1InterpolationFilters

1 IIRLow Latencyx8/x4/x2/x1InterpolationFilters

The Normal x8/x4/x2/x1(bypass)Interpolationfilterisprogrammed in256 cyclesin1 sample time(tS)forsample ratesfrom8kHz to384kHz. Table9.Normal x8 InterpolationFilter Parameter Condition Value (Typ) Value (Max) Units FilterGain Pass Band 0 … … .0.45fS ±0.02 dB FilterGain StopBand 0.55fS … ..7.455fS –60 dB FilterGroup Delay 22tS s Figure17.Normal x8 InterpolationFilterFrequency Figure18.Normal x8 InterpolationFilterImpulse Response Response Copyright© 2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:PCM5100A PCM5101A PCM5102A

−0.05 −0.04 −0.03 −0.02 −0.01 0.00 0.01 0.02 0.03 0.04 0.05 Frequency (x fS) Amplitude (dB) G034 PCM5100A,PCM5101A,PCM5102A SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 www.ti.com Figure19.Normal x8 InterpolationFilterPassband Ripple

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−0.05 −0.04 −0.03 −0.02 −0.01 0.00 0.01 0.02 0.03 0.04 0.05 0.0 0.5 1.0 Frequency (x fS) Amplitude (dB) G031 −120 −100 −80 −60 −40 −20 0 1 2 3 4 Frequency (x fS) Amplitude (dB) G009 −0.4 −0.2 0.0 0.2 0.4 0.6 0.8 1.0 0 20 40 60 80 100 120 140 160 Samples Amplitude (FFS) G020 PCM5100A,PCM5101A,PCM5102A www.ti.com SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 The Normal x4/x2/x1(bypass)Interpolationfilterisprogrammed in256 cyclesin1 sample time(tS) forsample ratesfrom8kHz to384kHz. Table10.Normal x4 InterpolationFilter Parameter Condition Value (Typ) Value (Max) Units FilterGain Pass Band 0 … … .0.45fS ±0.02 dB FilterGain StopBand 0.55fS … ..7.455fS –60 dB FilterGroup Delay 22tS s Figure20.Normal x4 InterpolationFilterFrequency Figure21.Normal x4 InterpolationFilterImpulse Response Response Figure22.Normal x4 InterpolationFilterPassband Ripple Copyright© 2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:PCM5100A PCM5101A PCM5102A

−0.05 −0.04 −0.03 −0.02 −0.01 0.00 0.01 0.02 0.03 0.04 0.05 Frequency (x fS) Amplitude (dB) G028 −120 −100 −80 −60 −40 −20 0 1 2 3 4 Frequency (x fS) Amplitude (dB) G006 −0.4 −0.2 0.0 0.2 0.4 0.6 0.8 1.0 0 10 20 30 40 50 60 70 80 90 100 Samples Amplitude (FFS) G017 PCM5100A,PCM5101A,PCM5102A SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 www.ti.com Normal x2 /x1(bypass)Interpolationfilterisprogrammed in256 cyclesin1 sample time(tS) forsample rates from8kHz to384kHz. Table11.Normal x2 InterpolationFilter Parameter Condition Value (Typ) Value (Max) Units FilterGain Pass Band 0 … … .0.45fS ±0.02 dB FilterGain StopBand 0.55fS … ..7.455fS –60 dB FilterGroup Delay 22tS s Figure23.Normal x2 InterpolationFilterFrequency Figure24.Normal x2 InterpolationFilterImpulse Response Response Figure25.Normal x2 InterpolationFilterPassband Ripple

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−0.00010 −0.00008 −0.00006 −0.00004 −0.00002 0.00000 0.00002 0.00004 0.00006 0.00008 0.00010 Frequency (x fS) Amplitude (dB) G033 −120 −100 −80 −60 −40 −20 0 1 2 3 4 Frequency (x fS) Amplitude (dB) G011 −0.6 −0.4 −0.2 0.0 0.2 0.4 0.6 0.8 1.0 0 50 100 150 200 250 300 350 400 Samples Amplitude (FFS) G022 PCM5100A,PCM5101A,PCM5102A www.ti.com SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 The low-latencyx8 /x4 /x2 /x1(bypass)Interpolationfilterisprogrammed in256 cycles1 sample time(tS) for sample ratesfrom8kHz to384kHz. Table12.Low latencyx8 InterpolationFilter Parameter Condition Value (Typ) Units FilterGain Pass Band 0 … … .0.45fS ±0.0001 dB FilterGain StopBand 0.55fS … ..7.455fS –52 dB FilterGroup Delay 3.5tS s Figure26.Low latencyx8 InterpolationFilter Figure27.Low latencyx8 InterpolationFilter Frequency Response Impulse Response Figure28.Low latencyx8 InterpolationFilterPassband Ripple Copyright© 2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:PCM5100A PCM5101A PCM5102A

−0.0001 −0.00008 −0.00006 −0.00004 −0.00002 0.00002 0.00004 0.00006 0.00008 0.0001 0.0 0.5 1.0 Frequency (x fS) Amplitude (dB) G030 −120 −100 −80 −60 −40 −20 0 1 2 3 4 Frequency (x fS) Amplitude (dB) G008 −0.6 −0.4 −0.2 0.0 0.2 0.4 0.6 0.8 1.0 0 20 40 60 80 100 120 140 160 180 Samples Amplitude (FFS) G019 PCM5100A,PCM5101A,PCM5102A SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 www.ti.com Table13.Low latencyx4 InterpolationFilter Parameter Condition Value (Typ) Units FilterGain Pass Band 0 … … .0.45fS ±0.0001 dB FilterGain StopBand 0.55fS … ..3.455fS –52 dB FilterGroup Delay 3.5tS s Figure29.Low latencyx4 InterpolationFilter Figure30.Low latencyx4 InterpolationFilter Frequency Response Impulse Response Figure31.Low latencyx4 InterpolationFilterPassband Ripple

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−0.0001 −0.00008 −0.00006 −0.00004 −0.00002 0.00002 0.00004 0.00006 0.00008 0.0001 0.0 0.5 1.0 Frequency (x fS) Amplitude (dB) G030 −120 −100 −80 −60 −40 −20 0 1 2 3 4 Frequency (x fS) Amplitude (dB) G005 −0.4 −0.2 0.0 0.2 0.4 0.6 0.8 1.0 0 10 20 30 40 50 60 70 80 90 100 Samples Amplitude (FFS) G016 PCM5100A,PCM5101A,PCM5102A www.ti.com SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 Table14.Low latencyx2 InterpolationFilter Parameter Condition Value (Typ) Units FilterGain Pass Band 0 … … .0.45fS ±0.0001 dB FilterGain StopBand 0.55fS … ..1.455fS –52 dB FilterGroup Delay 3.5tS s space Figure32.Low latencyx2 InterpolationFilter Figure33.Low latencyx2 InterpolationFilter Frequency Response Impulse Response Figure34.Low latencyx2 InterpolationFilterPassband Ripple Copyright© 2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:PCM5100A PCM5101A PCM5102A

0.9 * DV DD tr tf <20ns <20ns 0.1 * DV DD PCM5100A,PCM5101A,PCM5102A SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 www.ti.com Zero Data Detect The PCM510x A has a zero-datadetectfunction.When thedevicedetectscontinuouszerodata,itentersa full analogmute condition. The PCM510x A countszerodataover1024LRCKs (21ms @ 48kHz)beforesettinganalogmute. Power Save Mode When any kindofclockerror(SCK, BCK, and LRCK) orclockhaltisdetected,thePCM510xA entersStand-by mode automatically.The current-segmentDAC and Linedriverarealsopowered down. When BCK and LRCK haltto a low levelformore than 1 second,the PCM510xA entersPower down mode automatically.Power-down mode includesthenegativechargepump and Bias/Referencecircuitpower-down in additiontostand-by. Whenever expected Audio clocks(SCK, BCK, LRCK) are appliedto the PCM510xA, the devicestartsits powerup sequence automatically. XSMT Pin (SoftMute and SoftUn-Mute) For externaldigitalcontrolof the PCM510xA, the XSMT pinmust be drivenby an externaldigitalhostwitha specific/minimumrisetime(tr)and falltime(tf)forsoftmute and softun-mute.The PCM510xA requirestr/tf times of lessthan 20ns. In the majorityof applications,thisshouldn’t be a problem,however, traceswithhigh capacitancemay have issues. When the XSMT pinisshiftedfrom highto low (3.3Vto 0V),a softdigitalattenuationramp isstarted.–1dB attenuationwillbe appliedevery1tS from0dBFS to–∞.Thisattenuationtakes104 sample times. When theXSMT pinisshiftedfromlowtohigh(0V to3.3V),a softdigital“un-mute”isstarted.1dB gainstepsare appliedeverytS from–∞ to0dBFS. Thisramp-uptakes104 sample times. Figure35. XSMT Timing forSoftMute and SoftUn-Mute Table15.XSMT Timing Parameters Parameters Min Max Unit Risetime(tr) 20 ns Falltime(tf) 20 ns

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0.9 * DVDD 0.1 * DVDD 2.0 V 1.2 V XSMT tf Digital Attenuation Followed by Analog Mute Analog Mute System VDD XSMT 7.25k/c87 2.75k/c87 12V supply PCM5100A,PCM5101A,PCM5102A www.ti.com SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 ExternalPower Sense UndervoltageProtectionmode (supportedonlywhen DVDD = 3.3V) The XSMT pincan alsobe used tomonitora system voltage,such as the24VDC LCD TV backlight,or12VDC systemsupplyusinga potentialdividercreatedwithtwo resistors.(See Figure36 )

  • IftheXSMT pinmakes a transitionfrom1 to0 over6ms ormore,thedevicewillswitchintoexternalunder- voltageprotectionmode. Inthismode, two triggerlevelsareused.
  • When XSMT pinlevelreaches2V,softmute processbegins.
  • When XSMT pinlevelreaches1.2V,analogmute willengage,regardlessofdigitalaudiolevel,and analog shutdown willbegin.(Forexample,DAC circuitrypowers down). A timingdiagramtoshow thisisshown inFigure37. NOTE The XSMT inputpinsvoltagerange isfrom –0.3V toDVDD + 0.3V.Theratioofexternal resistorsmust be consideredwithinthisinputrange.Any increaseinpower supply(such as power supplypositivenoise/ripple)can pulltheXSMT pinhigherthanDVDD+0.3V. For example,ifthe PCM510xA ismonitoringa 12V input,and dividingthe voltageby 4, then the voltageat XSMT duringidealpower supplyconditionswillbe 3V. Ifthevoltagespikesany higherthan14.4V,thenXSMT willsee a voltageinexcessof3.6V(DVDD+0.3),potentiallydamaging thedevice. Providingthedividerissetappropriately,any DC voltagecan be monitored. Figure36. XSMT inExternalUVP Mode Figure37. XSMT Timing forUndervoltageProtection Copyright© 2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:PCM5100A PCM5101A PCM5102A

3.3V XSMT I2S Clocks SCK, BCK, LRCK 150t + 0.2msS VDD High Low High Low Time PCM5100A,PCM5101A,PCM5102A SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 www.ti.com Recommended Powerdown Sequence Withinadequatesystem design,thePCM510xA can exhibitsome pop on power down. Pops arecaused by the devicenothavingenough timetodetectpower lossand startthemutingprocess. The PCM510xA evaluationboard avoidsaudiblepop withan electrolyticdecouplingcapacitor.Thiscapacitor providesenough timebetween datalossfrom USB or S/PDIF and power supplylossforthemutingprocessto takeplace. The PCM510xA has two auto-mutefunctionstomute thedeviceupon power loss(intentionalorunintentional). XSMT = 0 When theXSMT pinispulledlow,theincomingPCM dataisattenuatedto0,closelyfollowedby a hardanalog mute.Thisprocesstakes150 sample times(ts)+ 0.2mS. As thismute timeismainlydominatedby thesamplingfrequency,systemssamplingat192kHz willmute much fasterthana 48kHz system. Clock ErrorDetect When clockerrorisdetectedon theincomingdataclock,thePCM510xA familyswitchestoan internaloscillator, and continuestothedrivetheDAC, whileattenuatingthedatafrom thelastknown value.Once thisprocessis complete,thePCM510xA outputswillbe hardmuted toground. Planned Shutdown These auto-mutingprocessescan be manipulatedby system designstomute beforepower lossinthefollowing ways: 1. AssertXSMT low150tS + 0.2mS beforepower isremoved.

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MCU GPIO “mute” signal 3.3V XSMT I2S Clocks SCK, BCK, LRCK 3msec VDD High Low High Low Time PCM5100A,PCM5101A,PCM5102A www.ti.com SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 2. StopI2S clocks(SCK, BCK, LRCK) 3ms beforepowerdown as shown below: Unplanned Shutdown Many systemsuse a low-noiseregulatortoprovidean AVDD 3.3V supplyfortheDAC. The XSMT Pincan take advantageofsuch a featuretomeasure thepre-regulatedoutputfromthesystemSMPS tomute theDAC before theentireSMPS discharges.Figure38 shows how toconfiguresuch a system touse theXSMT pin.The XSMT pincan alsobe used inparallelwitha GPIO pinfromthesystemmicrocontroller/DSPorPower Supply. Figure38. Using theXSMT Pin Copyright© 2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:PCM5100A PCM5101A PCM5102A

PCM5100A,PCM5101A,PCM5102A SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 www.ti.com TypicalApplicationCircuits Figure39. PCM510x A Standard PCM Audio Operation,3.3V Figure40. PCM510x A Standard PCM Audio Operation,1.8V

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PCM5100A,PCM5101A,PCM5102A www.ti.com SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 Figure41. PCM510x A PLL Operation,3.3V Figure42. PCM510x A PLL Operation,1.8V Copyright© 2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLinks:PCM5100A PCM5101A PCM5102A

470Ω 2.2nF LINE OUT 470Ω 2.2nF Output voltage is 2VRMS With a 10 kΩ Load PCM5100A,PCM5101A,PCM5102A SLAS859A –MAY 2012–REVISED SEPTEMBER 2012 www.ti.com Recommended Output FilterforthePCM510xA The diagraminFigure43 shows therecommended outputfilterforthePCM510xA. The new PCM510xA next generationcurrentsegment architectureoffersexcellentoutofband noise,making a traditional20kHz low pass filtera thingofthepast. The RC settingsbelow offera –3dB filterpointat 153kHz (approx),givingthe DAC the abilityto reproduce virtuallyallfrequenciesthroughtoit’s maximum samplingrateof384kHz. Figure43. Recommended Output Lowpass Filterfor10kΩ Operation

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www.ti.com 11-Apr-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Op Temp (°C) Top-Side Markings (4) Samples PCM5100APW ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 PCM5100A PCM5100APWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 PCM5100A PCM5101APW ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 PCM5101A PCM5101APWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 PCM5101A PCM5102APW ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 PCM5102A PCM5102APWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 PCM5102A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.

www.ti.com 11-Apr-2013 Addendum-Page 2 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) PCM5100APWR TSSOP PW 20 2000 367.0 367.0 38.0 PCM5101APWR TSSOP PW 20 2000 367.0 367.0 38.0 PCM5102APWR TSSOP PW 20 2000 367.0 367.0 38.0 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 Pack Materials-Page 2

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