PCM4204

PCM4204 BURR-BROWN | Alldatasheet

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Technical content

SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004 /C0072/C0105/C0103/C0104/C0262/C0080/C0101/C0114/C0102/C0111/C0114/C0109/C0097/C0110/C0099/C0101 /C0050/C0052/C0262/C0066/C0105/C0116/C0044 /C0050/C0049/C0054/C0107/C0072/C0122 /C0083/C0097/C0109/C0112/C0108/C0105/C0110/C0103 /C0070/C0111/C0117/C0114/C0262/C0067/C0104/C0097/C0110/C0110/C0101/C0108 /C0065/C0117/C0100/C0105/C0111 /C0065/C0110/C0097/C0108/C0111/C0103/C0262/C0116/C0111/C0262/C0068/C0105/C0103/C0105/C0116/C0097/C0108/C0032/C0067/C0111/C0110/C0118/C0101/C0114/C0116/C0101/C0114 /C0080/C0067/C0077/C0052/C0050/C0048/C0052

FEATURES

/C0068Four High-Performance Delta-Sigma Analog-to-Digital Converters − 24-Bit Linear PCM or 1-Bit Direct Stream Digital (DSD) Output Data − Supports PCM Output Sampling Rates up to 216kHz − Supports 64fS and 128fS DSD Output Data Rates /C0068Dynamic Performance: PCM Output − Dynamic Range: 118dB − THD+N: −105dB /C0068Dynamic Performance: DSD Output − Dynamic Range: 115dB − THD+N: −103dB /C0068Audio Serial Port − 24-Bit Linear PCM Output Data − Master or Slave Mode Operation − Supports Left-Justified, Right-Justified, I 2S, and TDM Data Formats /C0068DSD Data Port − Supports DSD Output or Input for All Four Channels Simultaneously − Input Mode Provides 1-Bit DSD to 24-Bit PCM Data Format Conversion /C0068Additional PCM Output Features − Linear-Phase Digital Decimation Filter − Digital High-Pass Filter for DC Removal − Clipping Flag Output for Each Channel /C0068Power Supplies: +5V Analog and +3.3V Digital /C0068Power Dissipation: − fS = 48kHz: 600mW typical − fS = 96kHz: 640mW typical − fS = 192kHz: 615mW typical /C0068Power-Down Mode /C0068Available in a Thermally-Enhanced HTQFP-64 Package

APPLICATIONS

/C0068Digital Recorders and Mixing Desks /C0068Digital Audio Effects Processors /C0068Broadcast Studio Equipment /C0068Surround Sound Encoders /C0068High-End A/V Receivers

DESCRIPTION

The PCM4204 is a high-performance, four-channel analog-to-digital (A/D) converter designed for professional and broadcast audio applications. The PCM4204 architecture utilizes a 1-bit delta-sigma modulator per channel incorporating a novel density modulated dither scheme for improved dynamic performance. The PCM4204 supports 24-bit linear PCM output data, with sampling frequencies up to 216kHz. The PCM4204 can also be configured to output either 64x or 128x oversampled, 1-bit direct stream digital (DSD) data for each channel. In addition, the PCM4204 supports a DSD input mode, allowing 1-bit DSD to 24-bit PCM data format conversion utilizing the on-chip digital decimation filter. These features make the PCM4204 suitable for a variety of digital audio recording and processing applications. The PCM4204 includes a flexible audio serial port inter- face, which supports standard PCM audio data formats, as well as time division multiplexed (TDM) PCM data formats. Multiple format support allows the system designer to choose the interface format that best suits the end applica- tion. Audio data format selection, sampling mode configu- ration, and high-pass filter functions are all programmed using dedicated control pins. The PCM4204 operates from a +5V analog power supply and a +3.3V digital power supply. The digital I/O pins are compatible with +3.3V logic families. The PCM4204 is available in a thermally-enhanced HTQFP-64 PowerPAD  package. PowerPAD is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners. /C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 www.ti.com Copyright  2004, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

/C0080/C0067/C0077/C0052/C0050/C0048/C0052 SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted(1) PCM4204 UNIT Supply voltage VCC 1, VCC 2 +6.0 V Supply voltage VDD 1, VDD 2, VDD 3 +3.6 V Ground voltage differences (any AGND to DGND or BGND) ±0.1 V Digital input voltage FMT0, FMT1, FMT2, S/M, FS0, FS1, FS2, SCKI, RST, HPFD, SUB, BCK, LRCK, DSDCLK, DSD1, DSD2, DSD3, DSD4, TEST −0.3 to (VDD + 0.3) V Analog input voltage VIN1−4+, VIN1−4− −0.3 to (VCC + 0.3) V Input current (any pin except supplies) ±10mA V Operating temperature range −10 to +70 °C Storage temperature range, TSTG −65 to +150 °C (1)Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. PACKAGE/ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum located at the end of this datasheet.

/C0080/C0067/C0077/C0052/C0050/C0048/C0052 SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004 www.ti.com

ELECTRICAL CHARACTERISTICS

Unless otherwise noted, all characteristics specified with TA = +25°C, VCC = +5V, VDD = +3.3V, system clock (SCKI) is 512fS for Single Rate Sampling, 256fS for Dual Rate Sampling, or 128fS for Quad Rate Sampling. The device is operated in Master mode for all dynamic performance measurements. PCM4204 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT RESOLUTION 24 Bits DATA FORMAT Audio Data Formats (PCM) Left and Right Justified, I2S, TDM Audio Data Word Length (PCM) 24 Bits Binary Data Format (PCM) Two’s Complement Binary, MSB First DSD Output Format and Word Length 1-Bit Data Bits DIGITAL INPUT/OUTPUT Input Logic Level VIH 0.7 x VDD VDD VVIL 0 0.3 x VDD V Output Logic Level VOH IOH = −2mA 0.8 x VDD VDD VVOL IOH = +2mA 0 0.2 x VDD V Input Leakage Current(1) IIH VIN = VDD +1 +10 µA IIL VIN = 0V −1 −10 µA Input Leakage Current(2) IIH VIN = VDD +35 +100 µA IIL VIN = 0V −35 −100 µA CLOCK FREQUENCIES System Clock Frequency, fSCKI Single Rate Sampling Mode 6.144 38.4 MHz Dual Rate Sampling Mode 12.8 38.4 MHz Quad Rate Sampling Mode 12.8 38.4 MHz Sampling Frequency, fS Single Rate Sampling Mode 24 54 kHz Dual Rate Sampling Mode 54 108 kHz Quad Rate Sampling Mode 108 216 kHz ANALOG INPUTS Full Scale Input Voltage Differential Input 6.0 VPP Average Input Impedance 3 kΩ Common-mode Rejection 85 dB DC SPECIFICATIONS VCOM 12, VCOM 34 Output Voltage +2.5 V VCOM 12, VCOM 34 Output Current 200 µA (1)Applies to the FMT0, FMT1, FMT2, S/M, FS0, FS1, FS2, HPFD, BCK, LRCK, SUB, DSDCLK, DSD1, DSD2, DSD3, DSD4, and SCKI pins. (2)Applies to the TEST and RST pins. (3)Typical performance is measured using an Audio Precision System Two Cascade or Cascade Plus test system. The measurement bandwidth is limited using the Audio Precision 22Hz high-pass filter in combination with either a 20kHz low-pass filter for fS = 48kHz or a 40kHz low-pass filter for fS = 96kHz and 192kHz. All A-weighted measurements are performed using the A-weighting filter in combination with the band limiting filters already mentioned. The measurements are made with the RMS detector selected. (4)A 256fS system clock is used at final production test for fS = 48kHz measurements. (5)Typical DSD performance is measured using an Audio Precision System Two Cascade or Cascade Plus test system. The measurement bandwidth is limited using the Audio Precision 22Hz high-pass filter in combination with a 20kHz low-pass filter. All A-weighted measurements are performed using the A-weighting filter in combination with the band limiting filter already mentioned. The measurements are made with the RMS detector selected. The 1-bit DSD data is converted to 24-bit linear PCM data for measurement using a PCM4204 configured for DSD input mode.

/C0080/C0067/C0077/C0052/C0050/C0048/C0052 SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Unless otherwise noted, all characteristics specified with TA = +25°C, VCC = +5V, VDD = +3.3V, system clock (SCKI) is 512fS for Single Rate Sampling, 256fS for Dual Rate Sampling, or 128fS for Quad Rate Sampling. The device is operated in Master mode for all dynamic performance measurements. PCM4204 PARAMETER UNITMAXTYPMINTEST CONDITIONS DYNAMIC PERFORMANCE (PCM Output) (3) fS = 48kHz(4) THD+N VIN = −0.5dBFS, fIN = 1kHz −105 −96 dB VIN = −60dBFS, fIN = 1kHz −56 dB Dynamic Range VIN = −60dBFS, fIN = 1kHz, A-weighted 112 118 dB Channel Separation 105 120 dB fS = 96kHz THD+N VIN = −0.5dBFS, fIN = 1kHz, BW = 20Hz to 40kHz −103 dB VIN = −60dBFS, fIN = 1kHz, BW = 20Hz to 40kHz −52 dB Dynamic Range VIN = −60dBFS, fIN = 1kHz, A-weighted 118 dB Channel Separation 120 dB fS = 192kHz THD+N VIN = −0.5dBFS, fIN = 1kHz, BW = 20Hz to 40kHz −103 dB Dynamic Range VIN = 0V, Unweighted, BW = 20Hz to 40kHz 108 dB VIN = 0V, A-weighted 117 dB Channel Separation 120 dB DYNAMIC PERFORMANCE (DSD Output) (5) 64fS Output Rate DSDBCK = 2.8224MHz, BW = 20Hz to 20kHz THD+N VIN = −0.5dBFS, fIN = 1kHz −103 dB VIN = −60dBFS, fIN = 1kHz −52 dB Dynamic Range VIN = −60dBFS, fIN = 1kHz, A-weighted 115 dB 128fS Output Rate DSDBCK = 5.6448MHz, BW = 20Hz to 20kHz THD+N VIN = −0.5dBFS, fIN = 1kHz −105 dB VIN = −60dBFS, fIN = 1kHz −56 dB Dynamic Range VIN = −60dBFS, fIN = 1kHz, A-weighted 118 dB DIGITAL DECIMATION FILTER Single and Dual Rate Sampling Modes Passband Edge −0.005dB 0.453fS Hz Passband Ripple ±0.005 dB Stop Band Edge 0.547fS Hz Stop Band Attenuation −100 dB Group Delay 37/fS sec (1)Applies to the FMT0, FMT1, FMT2, S/M, FS0, FS1, FS2, HPFD, BCK, LRCK, SUB, DSDCLK, DSD1, DSD2, DSD3, DSD4, and SCKI pins. (2)Applies to the TEST and RST pins. (3)Typical performance is measured using an Audio Precision System Two Cascade or Cascade Plus test system. The measurement bandwidth is limited using the Audio Precision 22Hz high-pass filter in combination with either a 20kHz low-pass filter for fS = 48kHz or a 40kHz low-pass filter for fS = 96kHz and 192kHz. All A-weighted measurements are performed using the A-weighting filter in combination with the band limiting filters already mentioned. The measurements are made with the RMS detector selected. (4)A 256fS system clock is used at final production test for fS = 48kHz measurements. (5)Typical DSD performance is measured using an Audio Precision System Two Cascade or Cascade Plus test system. The measurement bandwidth is limited using the Audio Precision 22Hz high-pass filter in combination with a 20kHz low-pass filter. All A-weighted measurements are performed using the A-weighting filter in combination with the band limiting filter already mentioned. The measurements are made with the RMS detector selected. The 1-bit DSD data is converted to 24-bit linear PCM data for measurement using a PCM4204 configured for DSD input mode.

/C0080/C0067/C0077/C0052/C0050/C0048/C0052 SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Unless otherwise noted, all characteristics specified with TA = +25°C, VCC = +5V, VDD = +3.3V, system clock (SCKI) is 512fS for Single Rate Sampling, 256fS for Dual Rate Sampling, or 128fS for Quad Rate Sampling. The device is operated in Master mode for all dynamic performance measurements. PCM4204 PARAMETER UNITMAXTYPMINTEST CONDITIONS DIGITAL DECIMATION FILTER (continued) Quad Rate Sampling Mode Passband Edge −0.005dB 0.375fS Hz −3dB 0.490fS Hz Passband Ripple ±0.005 dB Stop Band Edge 0.770fS Hz Stop Band Attenuation −135 dB Group Delay 9.5/fS sec DIGITAL HIGH PASS FILTER Frequency Response (−3dB) fS/48000 Hz POWER SUPPLY Voltage Range VCC 1, VCC 2 +4.75 +5.0 +5.25 VDC VDD 1, VDD 2, VDD 3 +3.0 +3.3 +3.6 VDC Power Down Supply Current VCC = +5V, VDD = +3.3V, RST = Low ICC 1 + ICC 2 10 mA IDD 1 + IDD 2 + IDD 3 2 mA Quiescent Current ICC 1 + ICC 2 VCC = +5.0V fS = 48kHz(4) 108 130 mA fS = 96kHz 108 130 mA fS = 192kHz 108 130 mA IDD 1 + IDD 2 + IDD 3 VDD = +3.3V fS = 48kHz(4) 18 23 mA fS = 96kHz 30 44 mA fS = 192kHz 23 26 mA Total Power Dissipation VCC = +5V, VDD = +3.3V fS = 48kHz(4) 600 726 mW fS = 96kHz 640 795 mW fS = 192kHz 615 736 mW (1)Applies to the FMT0, FMT1, FMT2, S/M, FS0, FS1, FS2, HPFD, BCK, LRCK, SUB, DSDCLK, DSD1, DSD2, DSD3, DSD4, and SCKI pins. (2)Applies to the TEST and RST pins. (3)Typical performance is measured using an Audio Precision System Two Cascade or Cascade Plus test system. The measurement bandwidth is limited using the Audio Precision 22Hz high-pass filter in combination with either a 20kHz low-pass filter for fS = 48kHz or a 40kHz low-pass filter for fS = 96kHz and 192kHz. All A-weighted measurements are performed using the A-weighting filter in combination with the band limiting filters already mentioned. The measurements are made with the RMS detector selected. (4)A 256fS system clock is used at final production test for fS = 48kHz measurements. (5)Typical DSD performance is measured using an Audio Precision System Two Cascade or Cascade Plus test system. The measurement bandwidth is limited using the Audio Precision 22Hz high-pass filter in combination with a 20kHz low-pass filter. All A-weighted measurements are performed using the A-weighting filter in combination with the band limiting filter already mentioned. The measurements are made with the RMS detector selected. The 1-bit DSD data is converted to 24-bit linear PCM data for measurement using a PCM4204 configured for DSD input mode.

/C0080/C0067/C0077/C0052/C0050/C0048/C0052 SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004 www.ti.com PIN ASSIGNMENT VIN4+ VIN4− NC NC V CC 2 AGND2 BGND4 DGND3 V DD 3 SUB HPFD CLIP4 CLIP3 CLIP2 CLIP1 BGND3 VIN1− VIN1+ NC NC VCC 1 AGND1 BGND1 DGND1 V DD 1 RST TEST FS0 FS1 FS2 SCKI BGND2 VREF 12+ VREF 12− AGND4 V COM 12 NC V IN2+ VIN2− NC NC V IN3+ VIN3− NC V COM 34 AGND3 V REF 34− VREF 34+ S/M FMT0 FMT1 FMT2 NC DGND2 V DD 2 DSDCLK DSD1 DSD2 DSD3 DSD4 BCK LRCK SDOUT1 SDOUT2 64 63 62 61 60 59 58 57 56 55 54 17 18 19 20 21 22 23 24 25 26 27 53 52 51 50 49 28 29 30 31 32 PCM4204

/C0080/C0067/C0077/C0052/C0050/C0048/C0052 SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004 www.ti.com Terminal Functions TERMINAL PIN NO. NAME I/O DESCRIPTION

1 VIN1− Input Channel 1 Analog Input, Inverting

2 VIN1+ Input Channel 1 Analog Input, Non-inverting

3 NC — No Internal Connection

4 NC — No Internal Connection

5 VCC 1 Power Analog Supply, +5V Nominal

6 AGND1 Ground Analog Ground

7 BGND1 Ground Substrate Ground

8 DGND1 Ground Digital Ground

9 VDD 1 Power Digital Supply, +3.3V Nominal

10 RST Input Reset/Power Down (Active Low with internal pull-up to VDD 1)

11 TEST Input Test Pin (Active High with internal pull-down to DGND)

12 FS0 Input Sampling Mode

13 FS1 Input Sampling Mode

14 FS2 Input Sampling Mode

15 SCKI Input System Clock

16 BGND2 Ground Substrate Ground

17 S/M Input Audio Serial Port Slave/Master Mode (0 = Master, 1 = Slave)

18 FMT0 Input Audio Data Format

19 FMT1 Input Audio Data Format

20 FMT2 Input Audio Data Format

21 NC — No Internal Connection

22 DGND2 Ground Digital Ground

23 VDD 2 Power Digital Supply, +3.3V Nominal

24 DSDCLK I/O DSD Data Clock

25 DSD1 I/O Channel 1 DSD Data

26 DSD2 I/O Channel 2 DSD Data

27 DSD3 I/O Channel 3 DSD Data

28 DSD4 I/O Channel 4 DSD Data

29 BCK I/O Audio Serial Port Bit Clock

30 LRCK I/O Audio Serial Port Left/Right (or Word) Clock

31 SDOUT1 Output PCM Data for Channels 1 and 2(1)

32 SDOUT2 Output PCM Data for Channels 3 and 4(1)

33 BGND3 Ground Substrate Ground

34 CLIP1 Output Channel 1 Clipping Flag (Active High)

35 CLIP2 Output Channel 2 Clipping Flag (Active High)

36 CLIP3 Output Channel 3 Clipping Flag (Active High)

37 CLIP4 Output Channel 4 Clipping Flag (Active High)

38 HPFD Input High-Pass Filter Disable (Active High)

39 SUB Input TDM Sub-Frame Assignment (0 = SF 0, 1 = SF 1)

40 VDD 3 Power Digital Supply, +3.3V Nominal (1)For TDM formats, SDOUT1 carries data for all four channels, while SDOUT2 is driven low.

/C0080/C0067/C0077/C0052/C0050/C0048/C0052 SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004 www.ti.com Terminal Functions (continued) TERMINAL PIN NO. DESCRIPTIONI/ONAME

41 DGND3 Ground Digital Ground

42 BGND4 Ground Substrate Ground

43 AGND2 Ground Analog Ground

44 VCC 2 Power Analog Supply, +5V Nominal

45 NC — No Internal Connection

46 NC — No Internal Connection

47 VIN4− Input Channel 4 Analog Input, Inverting

48 VIN4+ Input Channel 4 Analog Input, Non-inverting

49 VREF 34+ Output Voltage Reference De-Coupling for Channels 3 and 4

50 VREF 34− Output Reference Ground for Channels 3 and 4, connect to AGND

51 AGND3 Output Analog Ground

52 VCOM 34 Output Common-mode Voltage for Channels 3 and 4, +2.5V Nominal

53 NC — No Internal Connection

54 VIN3− Input Channel 3 Analog Input, Inverting

55 VIN3+ Input Channel 3 Analog Input, Non-inverting

56 NC — No Internal Connection

57 NC — No Internal Connection

58 VIN2− Input Channel 2 Analog Input, Inverting

59 VIN2+ Input Channel 2 analog Input, Non-inverting

60 NC — No Internal Connection

61 VCOM 12 Output Common-mode Voltage for Channels 1 and 2, +2.5V Nominal

62 AGND4 Ground Analog Ground

63 VREF 12− Output Reference Ground for Channels 1 and 2, connect to AGND

64 VREF 12+ Output Voltage Reference De-Coupling for Channels 1 and 2

(1)For TDM formats, SDOUT1 carries data for all four channels, while SDOUT2 is driven low.

/C0080/C0067/C0077/C0052/C0050/C0048/C0052 SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004 www.ti.com TYPICAL CHARACTERISTICS At TA = +25°C with VCC = +5V, VDD = +3.3V, and a measurement bandwidth from 20Hz to 20kHz, unless otherwise noted. OVERALL CHARACTERISTICS SINGLE RATE FILTER −200 −150 −100 −50 Normalized Frequency (fS) Amplitude (dB) fS =4 8k H z STOP BAND ATTENUATION CHARACTERISTICS SINGLE RATE FILTER −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 0 0.25 0.5 0.75 1 Normalized Frequency (fS) Normalized Frequency (fS ) fS =4 8k H z PASSBAND RIPPLE CHARACTERISTICS SINGLE RATE FILTER 0.02 −0.02 −0.04 −0.06 −0.08 −0.1 Normalized Frequency (fS) Amplitude (dB) fS =4 8 k H z TRANSIENT BAND CHARACTERISTICS SINGLE RATE FILTER Normalized Frequency (fS) fS =4 8 k H z Amplitude (dB) −10 OVERALL CHARACTERISTICS DUAL RATE FILTER Normalized Frequency (fS ) Amplitude (dB) −50 −100 −150 −200 fS = 96kHz STOP BAND ATTENUATION CHARACTERISTICS DUAL RATE FILTER 0 0.25 0.5 0.75 1 Normalized Frequency (fS) Amplitude (dB) fS =9 6 k H z −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150

/C0080/C0067/C0077/C0052/C0050/C0048/C0052 SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C with VCC = +5V, VDD = +3.3V, and a measurement bandwidth from 20Hz to 20kHz, unless otherwise noted. PASSBAND RIPPLE CHARACTERISTICS DUAL RATE FILTER 0.02 −0.02 −0.04 −0.06 −0.08 −0.1 Normalized Frequency (fS ) Amplitude (dB) fS =9 6 k H z TRANSIENT BAND CHARACTERISTICS DUAL RATE FILTER Normalized Frequency (fS) fS = 96kHz Amplitude (dB) −10 OVERALL CHARACTERISTICS QUAD RATE FILTER Normalized Frequency (fS) −50 −100 −150 −200 fS = 192kHz Amplitude (dB) STOP BAND ATTENUATION CHARACTERISTICS QUAD RATE FILTER 0 0.25 0.5 0.75 1 Normalized Frequency (fS) Amplitude (dB) fS = 192kHz −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 PASSBAND RIPPLE CHARACTERISTICS QUAD RATE FILTER 0.02 −0.02 −0.04 −0.06 −0.08 −0.1 Normalized Frequency (fS ) Amplitude (dB) fS =1 9 2 k H z TRANSIENT BAND CHARACTERISTICS QUAD RATE FILTER Normalized Frequency (fS) Amplitude (dB) −10 fS = 192kHz −3.90dB at 0.5fS

/C0080/C0067/C0077/C0052/C0050/C0048/C0052 SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C with VCC = +5V, VDD = +3.3V, and a measurement bandwidth from 20Hz to 20kHz, unless otherwise noted. HIGH PASS FILTER STOP BAND CHARACTERISTICS Normalized Frequency (fS/1000) Amplitude (dB) −20 −40 −60 −80 −100 0.1 0.2 0.3 0.40 HIGH PASS FILTER PASSBAND CHARACTERISTICS 0.02 −0.02 −0.04 −0.06 −0.08 −0.1 Normalized Frequency (fS /1000) Amplitude (dB) 00 . 511 . 522 . 533 . 54 FFT PLOT (fS =4 8 k H z ,fIN = 997Hz at−20dB) Frequency (Hz) Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 −180 1k10020 10k 20k FFT PLOT (fS =4 8 k H z ,fIN = 997Hz at−60dB) Frequency (Hz) Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 −180 1k10020 10k 20k FFT PLOT (fS = 48kHz, No Input [Idle]) Frequency (Hz) Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 −180 1k10020 10k 20k FFT PLOT (fS =9 6 k H z ,fIN = 997Hz at−20dB) Frequency (Hz) Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 −180 1k10020 10k 40k

/C0080/C0067/C0077/C0052/C0050/C0048/C0052 SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C with VCC = +5V, VDD = +3.3V, and a measurement bandwidth from 20Hz to 20kHz, unless otherwise noted. FFT PLOT (fS =9 6 k H z ,fIN =9 9 7 H za t−60dB) Frequency (Hz) Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 −180 1k10020 10k 40k FFT PLOT (fS = 96kHz, No Input [Idle]) Frequency (Hz) Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 −180 1k10020 10k 40k FFT PLOT (fS =1 9 2 k H z ,fIN = 997Hz at−20dB) Frequency (Hz) Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 −180 1k10020 10k 100k FFT PLOT (fS = 192kHz, fIN =9 9 7 H za t−60dB) Frequency (Hz) Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 −180 1k10020 10k 100k FFT PLOT (fS = 192kHz, No Input [Idle]) Frequency (Hz) Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 −180 1k10020 10k 100k THD+N vs AMPLITUDE (fS =4 8 k H z ,fIN = 1kHz, BW = 20Hz to 20kHz) Input Amplitude (dB) THD+N (dB) −90 −92 −94 −96 −98 −100 −102 −104 −106 −108 −110 −112 −114 −116 −118 −120

/C0080/C0067/C0077/C0052/C0050/C0048/C0052 SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C with VCC = +5V, VDD = +3.3V, and a measurement bandwidth from 20Hz to 20kHz, unless otherwise noted. THD+N vs FREQUENCY (fS = 48kHz, Input Amplitude =−1dB, BW = 20Hz to 20kHz) Input Frequency (Hz) THD+N (dB) −90 −92 −94 −96 −98 −100 −102 −104 −106 −108 −110 −112 −114 −116 −118 −120 1k10020 10k 20k THD+N vs AMPLITUDE (fS =9 6 k H z ,fIN = 1kHz, BW = 20Hz to 40kHz) Input Amplitude (dB) THD+N (dB) −90 −92 −94 −96 −98 −100 −102 −104 −106 −108 −110 −112 −114 −116 −118 −120 THD+N vs FREQUENCY (fS = 96kHz, Input Amplitude =−1dB, BW = 20Hz to 40kHz) Input Frequency (Hz) THD+N (dB) −70 −75 −80 −85 −90 −95 −100 −105 −110 −115 −120 1k10020 10k 40k THD+N vs AMPLITUDE (fS = 192kHz, fIN =1 k H z ,B W=2 0 H zt o4 0 k H z ) Input Amplitude (dB) THD+N (dB) −90 −92 −94 −96 −98 −100 −102 −104 −106 −108 −110 −112 −114 −116 −118 −120 THD+N vs FREQUENCY (fS = 192kHz, Input Amplitude =−1dB, BW = 20Hz to 40kHz) Input Frequency (Hz) THD+N (dB) −70 −75 −80 −85 −90 −95 −100 −105 −110 −115 −120 1k10020 10k 80k

of audio recording and processing applications. modulators, providing excellent common-mode rejection. bias voltage outputs for use with external input circuitry. of −100dB for all sampling modes. Figure 1. PCM4204 Functional Block Diagram

or VCC 2 (pin 44) power supplies by more than 300mV. the absolute maximum ratings of the PCM4204. an example input buffer circuit. electrolytic) for de-coupling purposes. driving multiple external nodes. the common-mode bias voltage outputs. the system clock are shown in Figure 2. Table 1. System Clock Frequencies for Common Output Sampling and Data Rates

Figure 2. System Clock Timing Requirements sampling modes, or at one of two DSD output data rates. times the desired output sampling rate. equal to 32 times the desired output sampling rate. decimation filter for either 1/64 or 1/128 operation. well as the DSD Output and Input mode operation. Table 2. Sampling Mode Selection for PCM Table 3. Sampling Mode Selection for PCM Slave

Table 4. Sampling Mode Selection for DSD Table 5. Sampling Mode Selection for DSD Input linear PCM output data, as well as 1-bit DSD output data. mode and the corresponding audio data format. corresponding Slave mode data format selections. DSD data formats supported by the PCM4204. Table 6. Slave Mode Audio Data Format Selection Table 7. Master Mode Audio Data Format

Figure 3. PCM Data Formats: Left-Justified, Right-Justified, and Philips I2S

waits for the system clock input (SCKI) to become active. power-on reset sequence timing. PCM4204 before, during and after the reset operations.

1024 System Clock Periods

Figure 11. Power-On Reset Sequence

Figure 12. External Reset Sequence Figure 13. ADC Digital Output State for Reset Operations

A1 through A4 are analog input buffers. Refer to Figure 16 for an example circuit. All capacitor values are in microfarads (µF). The 0.1µF caps are X7R ceramic chip type. X7R multi− layer ceramic chip type. Figure 15. Typical Connection Diagram

Figure 20. Thermal Pad Etch and Via Pattern for the 64-Lead HTQFP Package

www.ti.com PowerPAD is a trademark of Texas Instruments PAP (S−PQFP−G64) THERMAL INFORMATION /C0084/C0072/C0069/C0082/C0077/C0065/C0076 /C0080/C0065/C0068 /C0077/C0069/C0067/C0072/C0065/C0078/C0073/C0067/C0065/C0076 /C0068/C0065/C0084/C0065 48 33 116 This PowerPAD/C0116 package incorporates an exposed thermal pad that is designed to be attached directly to an external heatsink. When the thermal pad is soldered directly to the printed circuit board (PCB), the PCB can be used as a heatsink. In addition, through the use of thermal vias, the thermal pad can be attached directly to a ground plane or special heatsink structure designed into the PCB. This design optimizes the heat transfer from the integrated circuit (IC). The exposed thermal pad dimensions for this package are shown in the following illustration. For additional information on the PowerPAD package and how to take advantage of its heat dissipating abilities, refer to Technical Brief, PowerPAD Thermally Enhanced Package, Texas Instruments Literature No. SLMA002 and Application Brief, PowerPAD Made Easy , Texas Instruments Literature No. SLMA004. Both documents are available at www.ti.com. Exposed Thermal Pad Dimensions NOTE: All linear dimensions are in millimeters Top View PPTD012 Exposed Thermal Pad 6,50 5,29 6,50 5,29

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) PCM4204PAPR ACTIVE HTQFP PAP 64 1500 Pb-Free (RoHS) CU NIPDAU Level-3-260C-168 HR PCM4204PAPT ACTIVE HTQFP PAP 64 250 Pb-Free (RoHS) CU NIPDAU Level-3-260C-168 HR (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 30-Mar-2005 Addendum-Page 1

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