PCM4201PWR

PCM4201 TI | Alldatasheet

Document overview

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Technical content

SBAS342B − DECEMBER 2004 − REVISED APRIL 2006 Low Power, 24-Bit, Single Channel Audio Analog-to-Digital Converter /C0080/C0067/C0077/C0052/C0050/C0048/C0049

FEATURES

/C0068High Performance Delta-Sigma Analog-to-Digital Converter /C0068Differential Voltage Inputs /C0068Dynamic Performance: − Dynamic Range (A-Weighted): Up to 112dB − THD+N: As low as −105dB /C0068Three Sampling Modes: − Supports Output Sampling Rates Up to 108kHz − Choose from Low Power, High Performance, or Double Speed Modes /C0068Audio Serial Port Interface: − Master or Slave Mode Operation − 24-Bit Linear PCM Output Data − Left-Justified/DSP-Compatible Data Format /C0068Digital High-Pass Filter for DC Removal: − Includes a High-Pass Filter Disable Pin /C0068Power Supplies: − Requires a +5V Analog Power Supply − Supports a +1.8V to +3.3V Digital Power Supply Range /C0068Low Power Dissipation − 49mW Typical (Low Power Mode with VDD = +3.3V) − 39mW Typical (Low Power Mode with VDD = +1.8V) /C0068Power Down Mode − Less than 50µW total power dissipation /C0068Available in a small TSSOP-16 Package

APPLICATIONS

/C0068Digital Wireless Microphones /C0068Battery-Powered Audio Recording and Processing Equipment

DESCRIPTION

The PCM4201 is designed for digital audio applications that require a combination of high dynamic range, low distortion, and low power consumption. The primary applications for the PCM4201 include digital wireless microphones and battery-operated audio recording or processing equipment. The PCM4201 outputs 24-bit linear PCM audio data at sampling rates up to 108kHz. Three sampling modes allow the user to trade off power for performance, dependent upon the intended system requirements. An on-chip voltage reference reduces the number of external components needed for operation. The PCM4201 includes dedicated control pins for configuration of all programmable functions. The device requires a +5.0V analog power supply, in addition to a digital supply operating from +1.8V to +3.3V. The PCM4201 is available in a small TSSOP-16 package. I2S is a registered trademark of Royal Philips Electronics B.V., The Netherlands. All other trademarks are the property of their respective owners. www.ti.com Copyright  2004−2006, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. /C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046

/C0080/C0067/C0077/C0052/C0050/C0048/C0049 SBAS342B − DECEMBER 2004 − REVISED APRIL 2006 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted(1) PCM4201 UNIT Supply voltage VCC +6.0 V Supply voltage VDD +3.6 V Ground voltage differences AGND to DGND ±0.1 V Digital input voltage RATE, S/M, RST, HPFD SCKI, BCK, FSYNC −0.3 to (VDD + 0.3) V Analog input voltage VIN+, VIN− −0.3 to (VCC + 0.3) V Input current (any pin except supplies) ±10mA mA Operating temperature range −10 to +70 °C Storage temperature range, TSTG −65 to +150 °C (1)Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. PACKAGE/ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum located at the end of this datasheet, or see the TI website at www.ti.com.

/C0080/C0067/C0077/C0052/C0050/C0048/C0049 SBAS342B − DECEMBER 2004 − REVISED APRIL 2006 www.ti.com

ELECTRICAL CHARACTERISTICS

Unless otherwise specified, all characteristics are measured with TA = +25°C, VCC = +5V, and VDD = +3.3V. System clock frequency is set to 24.576 MHz. Device is operated in Slave mode. PCM4201 PARAMETER CONDITIONS MIN TYP MAX UNITS RESOLUTION 24 Bits AUDIO DATA FORMAT Format Two’s complement, MSB first data Left-Justified / DSP Compatible Word length 24 Bits DIGITAL I/O Input logic level VIH 0.7 x VDD VDD V Input logic level VIL 0 0.3 x VDD V Output logic level VOH IOH = −2mA 0.8 x VDD V Output logic level VOL IOL = +2mA 0.2 x VDD V Input current IIH VIN = VDD +10 µA Input current IIL VIN = 0V −10 µA Input current(1) IIH VIN = VDD +25 µA Input current(1) IIL VIN = 0V −25 µA DIGITAL SWITCHING Normal speed, low power 8 54 kHz Output sampling frequency fS Normal speed, high performance 8 54 kHzOutput sampling frequency fS Double speed 54 108 kHz System clock duty cycle 45 50 55 % System clock frequency 2.048 27.65 MHz AUDIO SERIAL-PORT TIMING Delay from FSYNC rising to BCK risingtDBK 5 ns Delay from BCK rising to FSYNC risingtDLK 5 ns BCK high pulse width tBCKH 72 ns BCK low pulse width tBCKL 72 ns Data setup time tS 10 ns Data hold time tH 10 ns ANALOG INPUTS Input voltage, full-scale range (FSR) Differential input 5.0 VPP Input impedance Per analog input pin 15 kΩ Common-mode rejection 100 dB DC PERFORMANCE Output offset error High-pass filter disabled ±4 % of FSR Gain error ±4 % of FSR (1)Applies to RATE (pin 5) and S/M (pin 6) inputs. (2)All typical dynamic performance specifications were measured using an Audio Precision System Two Cascade or Cascade Plus test system and a PCM4201EVM evaluation module. For Normal Speed operation, the measurement bandwidth is limited using the Audio Precision 22Hz high-pass filter and 20kHz low-pass filter. For Double Speed mode, the measurement bandwidth is limited using the Audio Precision 22Hz high-pass filter and a user-defined 40kHz low-pass filter (the fS/2 low pass filter may be utilized with similar results). All A-weighted measurements are made using the Audio Precision A-weighting filter in combination with the filters previously noted here. Minimum and maximum dynamic performance limits are based upon the capability of the production test solution.

/C0080/C0067/C0077/C0052/C0050/C0048/C0049 SBAS342B − DECEMBER 2004 − REVISED APRIL 2006 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Unless otherwise specified, all characteristics are measured with TA = +25°C, VCC = +5V, and VDD = +3.3V. System clock frequency is set to 24.576 MHz. Device is operated in Slave mode. PCM4201 PARAMETER UNITSMAXTYPMINCONDITIONS DYNAMIC PERFORMANCE (2) with VCC = +5V and VDD = +1.8V Normal Speed, Low Power, fS = 48kHz, BW = 22Hz to 20kHz Total harmonic distortion + noise THD+N VIN = −0.5dB, fIN = 1kHz −103 −100 dB Dynamic range VIN = −60dB, fIN = 1kHz, A-weighted 104 109 dB Dynamic range, no weighting VIN = −60dB, fIN = 1kHz 106 dB Normal Speed, High Performance, fS = 48kHz, BW = 22Hz to 20kHz Total harmonic distortion + noise THD+N VIN = −0.5dB, fIN = 1kHz −105 −100 dB Dynamic range VIN = −60dB, fIN = 1kHz, A-weighted 105 112 dB Dynamic range, no weighting VIN = −60dB, fIN = 1kHz 110 dB Double Speed, fS = 96kHz, BW = 22Hz to 40kHz Total harmonic distortion + noise THD+N VIN = −0.5dB, fIN = 1kHz −103 −100 dB Dynamic range VIN = −60dB, fIN = 1kHz, A-weighted 105 112 dB Dynamic range, no weighting VIN = −60dB, fIN = 1kHz 106 dB DYNAMIC PERFORMANCE (2) with VCC = +5V and VDD = +3.3V Normal Speed, Low Power, fS = 48kHz, BW = 22Hz to 20kHz Total harmonic distortion + noise THD+N VIN = −0.5dB, fIN = 1kHz −102 −100 dB Dynamic range VIN = −60dB, fIN = 1kHz, A-weighted 104 106 dB Dynamic range, no weighting VIN = −60dB, fIN = 1kHz 104 dB Normal Speed, High Performance, fS = 48kHz, BW = 22Hz to 20kHz Total harmonic distortion + noise THD+N VIN = −0.5dB, fIN = 1kHz −105 −100 dB Dynamic range VIN = −60dB, fIN = 1kHz, A-weighted 105 112 dB Dynamic range, no weighting VIN = −60dB, fIN = 1kHz 109 dB Double Speed, fS = 96kHz, BW = 22Hz to 40kHz Total harmonic distortion + noise THD+N VIN = −0.5dB, fIN = 1kHz −103 −100 dB Dynamic range VIN = −60dB, fIN = 1kHz, A-weighted 105 111 dB Dynamic range, no weighting VIN = −60dB, fIN = 1kHz 106 dB DIGITAL DECIMATION FILTER Passband edge 0.453fS Hz Passband ripple ±0.005 dB Stop band edge 0.547fS Hz Stop band attenuation −100 dB Group delay 37/fS sec (1)Applies to RATE (pin 5) and S/M (pin 6) inputs. (2)All typical dynamic performance specifications were measured using an Audio Precision System Two Cascade or Cascade Plus test system and a PCM4201EVM evaluation module. For Normal Speed operation, the measurement bandwidth is limited using the Audio Precision 22Hz high-pass filter and 20kHz low-pass filter. For Double Speed mode, the measurement bandwidth is limited using the Audio Precision 22Hz high-pass filter and a user-defined 40kHz low-pass filter (the fS/2 low pass filter may be utilized with similar results). All A-weighted measurements are made using the Audio Precision A-weighting filter in combination with the filters previously noted here. Minimum and maximum dynamic performance limits are based upon the capability of the production test solution.

/C0080/C0067/C0077/C0052/C0050/C0048/C0049 SBAS342B − DECEMBER 2004 − REVISED APRIL 2006 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Unless otherwise specified, all characteristics are measured with TA = +25°C, VCC = +5V, and VDD = +3.3V. System clock frequency is set to 24.576 MHz. Device is operated in Slave mode. PCM4201 PARAMETER UNITSMAXTYPMINCONDITIONS DIGITAL HIGH PASS FILTER Frequency response (−3dB) fS/48000 Hz POWER SUPPLY Supply voltage range Supply voltage range Normal speed, low power 7 8.2 mA ICC Normal speed, high performance 13 15 mA Operating supply current ICC Double speed 13 16 mAOperating supply current with VCC = +5V, VDD = +1.8V Normal speed, low power 2 3.2 mACC DD IDD Normal speed, high performance 2.5 4.5 mAIDD Double speed 3.5 6.0 mA Normal speed, low power 7 8.2 mA ICC Normal speed, high performance 13 15 mA Operating supply current ICC Double speed 13 16 mAOperating supply current with VCC = +5V, VDD = +3.3V Normal speed, low power 4 6.0 mACC DD IDD Normal speed, high performance 5 8.5 mAIDD Double speed 7.5 10.5 mA Power-Down mode current ICC 5 µAPower-Down mode current with VCC = +5V , VDD = +1.8V or +3.3V IDD 5 µA Total power dissipation Normal speed, low power 49 61 mW Total power dissipation with VCC = +5V, VDD = +3.3V Normal speed, high performance 82 103 mWwith VCC = +5V, VDD = +3.3V Double speed 90 115 mW Total power dissipation Normal speed, low power 39 47 mW Total power dissipation with VCC = +5V, VDD = +1.8V Normal speed, high performance 70 83 mWwith VCC = +5V, VDD = +1.8V Double speed 72 91 mW (1)Applies to RATE (pin 5) and S/M (pin 6) inputs. (2)All typical dynamic performance specifications were measured using an Audio Precision System Two Cascade or Cascade Plus test system and a PCM4201EVM evaluation module. For Normal Speed operation, the measurement bandwidth is limited using the Audio Precision 22Hz high-pass filter and 20kHz low-pass filter. For Double Speed mode, the measurement bandwidth is limited using the Audio Precision 22Hz high-pass filter and a user-defined 40kHz low-pass filter (the fS/2 low pass filter may be utilized with similar results). All A-weighted measurements are made using the Audio Precision A-weighting filter in combination with the filters previously noted here. Minimum and maximum dynamic performance limits are based upon the capability of the production test solution.

/C0080/C0067/C0077/C0052/C0050/C0048/C0049 SBAS342B − DECEMBER 2004 − REVISED APRIL 2006 www.ti.com PIN ASSIGNMENT VIN+ VIN− AGND VCC RATE S/M RST HPFD VREF + VREF − DGND VDD SCKI BCK FSYNC DATA PCM4201 PW PACKAGE TSSOP-16 (TOP VIEW) Terminal Functions TERMINAL PIN NO. NAME I/O DESCRIPTION

1 VIN+ Input Noninverting Analog Input

2 VIN− Input Inverting Analog Input

3 AGND Ground Analog Ground

4 VCC Power Analog Supply, +5V

5 RATE Input Sampling Mode Configuration (Tri-Level Input): 0 = Double Speed;

1 = Normal Speed, Low Power; Z = Normal Speed, High Performance. Maximum external capacitive load is 100pF.

6 S/M Input Audio Serial Port Slave/Master Mode (0 = Master, 1 = Slave)

7 RST Input Reset/Power Down (Active Low)

8 HPFD Input High Pass Filter Disable (Active High)

9 DATA Output Audio Serial Port Data

10 FSYNC I/O Audio Serial Port Frame Synchronization Clock

11 BCK I/O Audio Serial Port Bit (or Data) Clock

12 SCKI Input System Clock

13 VDD Power Digital Supply, +3.3V Typical(1)

14 DGND Ground Digital Ground

15 VREF − Output Voltage Reference Low Output, Connect to AGND

16 VREF + Output Voltage Reference High Output, De-Coupling Only(2)

(1)The VDD supply may be operated from +1.8V to +3.6V. (2)Unbuffered output. Do not use to drive external circuitry.

/C0080/C0067/C0077/C0052/C0050/C0048/C0049 SBAS342B − DECEMBER 2004 − REVISED APRIL 2006 www.ti.com TYPICAL CHARACTERISTICS At TA = 25°C, VDD = 1.8V, VCC = 5.0V, Master Mode, SCKI = 24.576MHz, unless otherwise noted. HIGH−PERFORMANCE FFT PLOT (fS =4 8 k H z ,fIN =9 9 7 H za t−1dB) Frequency (Hz) Amplitude (dB) 24k20 100 1k 10k −20 −40 −60 −80 −100 −120 −140 −160 HIGH−PERFORMANCE FFT PLOT (fS = 48kHz, fIN =9 9 7 H za t−20dB) Frequency (Hz) 24k20 100 1k 10k Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 HIGH−PERFORMANCE FFT PLOT (fS = 48kHz, fIN = 997Hz at−60dB) Frequency (Hz) 24k20 100 1k 10k Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 LOW−POWER FFT PLOT (fS = 48kHz, fIN =9 9 7 H za t−1dB) Frequency (Hz) 24k20 100 1k 10k Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 LOW−POWER FFT PLOT (fS = 48kHz, fIN = 997Hz at−20dB) Frequency (Hz) 24k20 100 1k 10k Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 LOW−POWER FFT PLOT (fS = 48kHz, fIN = 997Hz at−60dB) Frequency (Hz) 24k20 100 1k 10k Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160

/C0080/C0067/C0077/C0052/C0050/C0048/C0049 SBAS342B − DECEMBER 2004 − REVISED APRIL 2006 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VDD = 1.8V, VCC = 5.0V, Master Mode, SCKI = 24.576MHz, unless otherwise noted. DOUBLE−SPEED FFT PLOT (fS =9 6 k H z ,fIN =9 9 7 H za t−1dB) Frequency (Hz) 48k20 100 1k 10k Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 DOUBLE−SPEED FFT PLOT (fS = 96kHz, fIN =9 9 7 H za t−20dB) Frequency (Hz) 48k20 100 1k 10k Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 DOUBLE−SPEED FFT PLOT (fS = 96kHz, fIN = 997Hz at−60dB) Frequency (Hz) 48k20 100 1k 10k Amplitude (dB) −20 −40 −60 −80 −100 −120 −140 −160 THD+N vs AMPLITUDE, HIGH PERFORMANCE (fS =4 8 k H z ,fIN = 997Hz, BW = 20Hz to 20kHz) Amplitude (dB) THD+N (dB) −100 −102 −104 −106 −108 −110 −112 −114 −116 −118 −120 VDD =3 . 3 V VDD =1 . 8 V THD+N vs AMPLITUDE, LOW POWER (fS =4 8 k H z ,fIN = 997Hz, BW = 20Hz to 20kHz) Amplitude (dB) THD+N (dB) −100 −102 −104 −106 −108 −110 −112 −114 −116 −118 −120 VDD =3 . 3 V VDD =1 . 8 V THD+N vs AMPLITUDE, DOUBLE SPEED (fS =9 6 k H z ,fIN = 997Hz, BW = 20Hz to 40kHz) Amplitude (dB) THD+N (dB) −100 −102 −104 −106 −108 −110 −112 −114 −116 −118 −120 VDD =3 . 3 V VDD =1 . 8 V

/C0080/C0067/C0077/C0052/C0050/C0048/C0049 SBAS342B − DECEMBER 2004 − REVISED APRIL 2006 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = 25°C, VDD = 1.8V, VCC = 5.0V, Master Mode, SCKI = 24.576MHz, unless otherwise noted. THD+N vs FREQUENCY , HIGH PERFORMANCE (fS = 48kHz, Input Level =−1dB, BW = 20Hz to 20kHz) Frequency (Hz) THD+N (dB) 20k20 100 1k 10k −90.0 −92.5 −95.0 −97.5 −100.0 −102.5 −105.0 −107.5 −110.0 −112.5 −115.0 −117.5 −120.0 VDD =3 . 3 V VDD =1 . 8 V THD+N vs FREQUENCY, LOW POWER (fS = 48kHz, Input Level =−1dB, BW = 20Hz to 20kHz) Frequency (Hz) THD+N (dB) 20k20 100 1k 10k −90.0 −92.5 −95.0 −97.5 −100.0 −102.5 −105.0 −107.5 −110.0 −112.5 −115.0 −117.5 −120.0 VDD =3 . 3 V VDD =1 . 8 V THD+N vs FREQUENCY , DOUBLE SPEED (fS = 96kHz, Input Level =−1dB, BW = 20Hz to 40kHz) Frequency (Hz) THD+N (dB) 40k20 100 1k 10k −90.0 −92.5 −95.0 −97.5 −100.0 −102.5 −105.0 −107.5 −110.0 −112.5 −115.0 −117.5 −120.0 VDD =3 . 3 V VDD =1 . 8 V

sampling rates may be required. A digital high-pass filter is included for DC removal. functional block diagram for the PCM4201. Figure 1. PCM4201 Functional Block Diagram

THD+N when compared to Low Power mode. detect low, high, and floating (or high-impedance) states. disabled, setting the output to a high-impedance state. Table 3. Sampling Mode Configuration

0 Double Speed

1 Normal Speed, Low Power

audio serial port interface. NOTES: (1) One Frame = 128 BCK clock cycles for Normal Speed modes and 64 BCK clock cycles for Double Speed mode. (2) If BCK = 128fS when Normal Speed, Low Power sampling is enabled, then the frame will begin on the falling edge of the FSYNC clock input. T h eF S Y N Cc l o c ki si n v e r t e df o rt h i sc a s e . period must be at least one BCK clock cycle in length. Best performance is achieved when the FSYNC duty cycle is 50%. w i t ht h eM S Bb e i n gt h ef i r s td a t ab i ti nt h ef r a m e . (5) For Master mode operation, the FSYNC clock duty cycle is equal to 50%. Figure 3. Audio Serial-Port Frame Format Figure 4. Audio Serial-Port Timing

1024 System Clock Periods

(1) VDD nominal range is +1.8V to +3.6V. Figure 7. Power-On Reset Sequence Figure 8. External Reset Sequence Figure 9. ADC Digital Output State for Reset Operation

mode, the system and audio clocks should be restarted. high, which initiates a reset initialization sequence. before, during, and upon exiting the power-down state.

1024 SCKI Periods

Figure 10. ADC Digital Output State for Power-Down Operation

The PCM4201 is in Master mode, while the DIT4096 is in Slave mode. Both operate from the same Master clock source. The data format for the DIT4096 is configured for Left−Justified mode. Figure 14. Digital Interface Microphone Example

/C0080/C0067/C0077/C0052/C0050/C0048/C0049 SBAS342B − DECEMBER 2004 − REVISED APRIL 2006 www.ti.com

Revision History

DATE REV PAGE SECTION DESCRIPTION

12 Product Overview

Added new Note (2) to Figure 3. Changed order of notes in Figure 3 to accommodate new Note (2). 4/12/06 B

13 Product Overview

Replaced last sentence of first paragraph, left column to clarify BCK rate. Several sentences used to replace original sentence. Changed last sentence of second paragraph, left column to clarify BCK rate. Several sentences used to replace original sentence. NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) PCM4201PW Active Production TSSOP (PW) | 16 90 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -10 to 70 PCM 4201 PCM4201PW.B Active Production TSSOP (PW) | 16 90 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -10 to 70 PCM 4201 PCM4201PWR Active Production TSSOP (PW) | 16 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -10 to 70 PCM 4201 PCM4201PWR.B Active Production TSSOP (PW) | 16 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -10 to 70 PCM 4201 PCM4201PWRG4 Active Production TSSOP (PW) | 16 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -10 to 70 PCM 4201 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1

www.ti.com 23-May-2025 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) PCM4201PWR TSSOP PW 16 2500 350.0 350.0 43.0 Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) PCM4201PW PW TSSOP 16 90 530 10.2 3600 3.5 PCM4201PW.B PW TSSOP 16 90 530 10.2 3600 3.5 Pack Materials-Page 3

www.ti.com PACKAGE OUTLINE C 14X 0.65 4.55 16X 0.30 0.19 TYP6.6 6.2

1.2 MAX

0.15 0.05 0.25 GAGE PLANE -80 B NOTE 4 4.5 4.3 A NOTE 3 5.1 4.9 0.75 0.50 (0.15) TYP TSSOP - 1.2 mm max heightPW0016A SMALL OUTLINE PACKAGE 4220204/A 02/2017

0.1 C A B

0.1 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153. SEATING PLANE A 20 DETAIL A TYPICAL SCALE 2.500

www.ti.com EXAMPLE BOARD LAYOUT

0.05 MAX

0.05 MIN

16X (1.5) 16X (0.45) 14X (0.65) (5.8) (R0.05) TYP TSSOP - 1.2 mm max heightPW0016A SMALL OUTLINE PACKAGE 4220204/A 02/2017 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SYMM SYMM 8 9 15.000 METALSOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METALEXPOSED METAL SOLDER MASK DETAILS NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN 16X (1.5) 16X (0.45) 14X (0.65) (5.8) (R0.05) TYP TSSOP - 1.2 mm max heightPW0016A SMALL OUTLINE PACKAGE 4220204/A 02/2017 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X SYMM SYMM 8 9

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