PCA2001 NXP | Alldatasheet

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Technical content

  1. General description The PCA2000 and PCA2001 are CMOS integrated circuits for battery operated wrist watches with a 32 kHz quartz crystal as timing element and a bipolar 1 Hz stepping motor. The quartz crystal oscillator and the frequency divider are optimized for minimum power consumption. A timing accuracy of 1 ppm is achieved with a programmable, digital frequency adjustment. To obtain the minimum overall power consumption for the watch, an automatic motor pulse adaptation function is provided. The circuit supplies only the minimum drive current, which is necessary to ensure a correct motor step. Changing the drive current of the motor is achieved by chopping the motor pulse with a variable duty cycle. The pulse width and the range of the variable duty cycle can be programmed to suit different types of motors. The automatic pulse adaptation scheme is based on a safe dynamic detection of successful motor steps. A pad RESET is provided (used for stopping the motor) for accurate time setting and for accelerated testing of the watch. The PCA2000 has a battery End Of Life (EOL) warning function. If the battery voltage drops below the EOL threshold voltage (which can be programmed for silver oxide or lithium batteries), the motor steps change from one pulse per second to a burst of four pulses every 4 seconds. The PCA2001 uses the same circuit as the PCA2000, but without the EOL function. 2. Features n Amplitude-regulated 32 kHz quartz crystal oscillator, with excellent frequency stability and high immunity to leakage currents n Electrically programmable time calibration with 1 ppm resolution stored in One Time Programmable (OTP) memory n The quartz crystal is the only external component connected n Very low power consumption, typical 90 nA n One second output pulses for bipolar stepping motor n Minimum power consumption for the entire watch, due to self adaptation of the motor drive according to the required torque n Reliable step detection circuit n Motor pulse width, pulse modulation, and pulse adaptation range programmable in a wide range, stored in OTP memory n Stop function for accurate time setting and power saving during shelf life PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse Rev. 05 — 11 November 2008 Product data sheet

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Table 1. Ordering information

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 11 November 2008 3 of 28 NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse 5. Block diagram 6. Pinning information

6.1 Pinning

Fig 1. Block diagram mgw567 MOT2MOT1 RESET4 VDD VSS VOLTAGE DETECTOR, OTP-CONTROLLER MOTOR CONTROL WITH ADAPTIVE PULSE MODULATION STEP DETECTION EOL PCA2000 only PCA2000 PCA2001 DIVIDER RESET reset 32 Hz 1 Hz 8 kHz OSCILLATOR OSCIN OSCOUT i.c. OTP-MEMORY TIMING ADJUSTMENT, INHIBITION Top view. For mechanical details, see Figure13. Top view. For mechanical details, see Figure14. Fig 2. Pad and bump configuration of PCA2000 and PCA2001 001aai177 PCA200xU 1VSS 8 RESET 2i.c. 7 MOT2 3OSCIN 6 MOT1 4OSCOUT 5 V DD x y 001aai176 PCA200xCX 1VSS 8 RESET 2i.c. 7 MOT2 3OSCIN 6 MOT1 4OSCOUT 5 V DD x y

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved.

6.2 Pin description

7.1 Motor pulse

is monitored, in order to check whether the motor has turned correctly or not. driving level. Every 4 minutes, the driving level is lowered again by one stage. driving stage, which is not followed by a detection phase, is programmed separately. Table 2. Pin description

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 11 November 2008 5 of 28 NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse Therefore it is possible to program a larger energy gap between the pulses with step detection and the strongest, not monitored, pulse. This might be necessary to ensure a reliable and stable operation under adverse conditions (magnetic fields and vibrations). If the watch works in the highest driving stage, the driving level jumps after the 4-minute period directly to the lowest stage, and not just one stage lower. To optimize the performance for different motors, the following parameters can be programmed:

  • Pulse width: 0.98 ms to 7.8 ms in steps of 0.98 ms
  • Duty cycle of lowest driving level: 37.5 % to 56.25 % in steps of 6.25 %
  • Number of driving levels (including the highest driving level): 3 to 6
  • Duty cycle of the highest driving level: 75 % or 100 %
  • Enlargement pulse for the highest driving level: on or off The enlargement pulse has a duty cycle of 25 % and a pulse width which is twice the programmed motor pulse width. The repetition period for the chopping pattern is 0.98 ms. Figure4 shows an example of a 3.9 ms pulse.

7.2 Step detection

Figure5 shows a simplified diagram of the motor driving and step detection circuit, and Figure6 shows the step detection sequence and corresponding sampling current. Between the motor driving pulses, the switches P1 and P2 are closed, which means the motor is short-circuited. For a pulse in one direction, P1 and N2 are open, and P2 and N1 are closed with the appropriate duty cycle; for a pulse in the opposite direction, P2 and N1 are open, and P1 and N2 closed. Fig 4. Possible modulations for a 3.9 ms motor pulse 43.75 % 37.5 % DUTY CYCLE 50 % 56.25 % 62.5 % 68.75 % 75 % 81.25 % 100 % mgw351 0.244 ms 0.122 ms 0.98 ms0.98 ms0.98 ms 0.98 ms

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 11 November 2008 6 of 28 NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse The step detection phase is initiated after the motor driving pulse. In phase 1 P1 and P2 are first closed for 0.98 ms and then in phase 2 all four drive switches (P1, N1, P2 and N2) are opened for 0.98 ms. As a result, the energy stored in the motor inductance is reduced as fast as possible. The induced current caused by the residual motor movement is then sampled in phase 3 (closing P3 and P2) and in phase 4 (closing P1 and P4). For step detection in the opposite direction P1 and P4 are closed during phase 3 and P2 and P3 during phase 4 (see Figure6). Fig 5. Simplified diagram of motor driving and step detection circuit Fig 6. Step detection sequence and corresponding sampling voltage mgw352 VDD VSS MOTOR MOT1 R D P4P3 MOT2 mgw569 tp td = 0.98 ms 0.98 ms (motor shorted) sampling voltage Imotor phase 1 phase 2 phase 3 phase 4 sampling voltage positive detection level negative detection level programmable time limit OTP C4 to C6 sampling positive detection negative detection sampling results motor shorted sampling 61 µs 0.49 ms t t t

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. start of the motor driving pulse.

7.3 Time calibration

with the frequency of is provided. programmed calibration period, which originates from the time calibration.

7.4 Reset

At pad RESET an output signal with a frequency of is provided. mechanical function of the watch. duty cycle and with the opposite polarity to the last pulse before stopping. The debounce time for the RESET function is between 31 ms and 62 ms. Table 3. Time calibration

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved.

7.5 Programming possibilities

Table 4. Words and bits Table 5. Description of word A bits Table 6. Description of word B bits

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. [1] Including the highest driving stage, which one has no motor step detection. second highest level must be smaller than the highest driving level. [1] Between positive and negative detection pulses. Table 7. Description of word C bits

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved.

7.6 Type recognition

7.7 Programming procedure

an 8-bit word in one step and acts as a data pointer for checking the OTP content.

  • State 1: measurement of the quartz crystal oscillator frequency (divided by 1024)
  • State 2: measurement of the inhibition time
  • State 3: write/check word A
  • State 4: write/check word B
  • State 5: write/check word C
  • State 6: check word D (type recognition) Each instruction state is switched on with a pulse to VP(prog)(start). After this large pulse, an initial waiting time of t0 is required. The programming instructions are then entered by modulating the supply voltage with small pulses (amplitude VP(mod) and pulse width tmod ). The first small pulse defines the start time, the following pulses perform three different functions, depending on the time delay (t d) from the preceding pulse (seeFigure7,Figure8,Figure11 and Figure12):
  • td =t1 (0.7 ms); increments the instruction counter
  • td =t2 (1.7 ms); clocks the shift register with data = logic 0
  • td =t3 (2.7 ms); clocks the shift register with data = logic 1 The programming procedure requires a stable oscillator. This means that a waiting time, determined by the start-up time of the oscillator is necessary after power-up of the circuit. After the VP(prog)(start)pulse, the instruction counter is in state 1 and the data shift register is cleared.

Table 8. Description of word D bits

1000 PCA2000

0100 PCA2001

1100 PCA2003

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 11 November 2008 11 of 28 NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse The instruction state ends with a second pulse to VP(prog)(stop) or with a pulse to Vstore. In any case, the instruction states are terminated automatically 2 seconds after the last supply modulation pulse.

7.8 Programming the memory cells

Applying the two-stage programming pulse (seeFigure7) transfers the stored data in the shift register to the OTP cells. Perform the following to program a memory word: 1. Starting with a VP(prog)(start) pulse wait for the time period t0 then set the instruction counter to the word to be written (td = t1). 2. Enter the data to be stored in the shift register (td =t2 or t3). LSB first (bit 8) and the MSB last (bit 1). 3. Applying the two-stage programming pulse Vprestorefollowed by Vstorestores the word. The delay between the last data bit and the prestore pulse Vprestoreis td =t4. Store the word by raising the supply voltage to Vstore; the delay between the last data bit and the store pulse is td. The example shown inFigure7 performs the following functions:

  • Start
  • Setting instruction counter to state 4 (word B)
  • Entering data word 110101 into the shift register (sequence: LSB first and MSB last)
  • Writing to the OTP cells for word B The example shows the programming of B = 110101 (the sequence is LSB first and MSB last). Fig 7. Supply voltage modulation for programming mgw356 VDD(nom) VP(mod) VDD VSS VP(prog)(start) tp(start) t0 t1 t1 t1 t3 t2 t3 t2 t3 t3 t4 tw(store) Vstore Vprestore tw(prestore)

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 11 November 2008 12 of 28 NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse

7.9 Checking memory content

The stored data of the OTP array can be checked bit wise by measuring the supply current. The array word is selected by the instruction state and the bit is addressed by the shift register. To read a word, the word is first selected (t d =t1), and a logic 1 is written into the first cell of the shift register (td =t3). This logic 1 is then shifted through the entire shift register (td =t2), so that it points with each clock pulse to the next bit. If the addressed OTP cell contains a logic 1, a 30 kΩ resistor is connected between VDD and VSS , which increases the supply current accordingly. Figure8 shows the supply voltage modulation for reading word B, with the corresponding supply current variation for word B = 110101 (sequence: first MSB and last LSB). (1) Fig 8. Supply voltage modulation and corresponding supply current variation for reading word B VDD(nom) VDD VP(mod) (1) VSS mgw357 IDD t1 t1 t3 t2t1 t2 t2 t2 t2 VP(prog)(start) tp(start) VP(prog)(stop) tp(stop) Δ IDD V DD

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 11 November 2008 13 of 28 NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse

7.10 Frequency tuning of assembled watch

Figure9 shows the test set-up for frequency tuning the assembled watch.

7.11 Measurement of oscillator frequency and inhibition time

The output of the two measuring states can either be monitored directly at pad RESET or as a modulation of the supply voltage (a modulating resistor of 30 kΩ is connected between VDD and VSS when the signal at pad RESET is at HIGH-level). The supply voltage modulation must be followed as shown inFigure10 in order to guarantee the correct start-up of the circuit during production and testing. Measuring states:

  • State 1: quartz crystal oscillator frequency divided by 1024; state 1 starts with a pulse to Vp and ends with a second pulse to Vp Fig 9. Frequency tuning at assembled watch mgw568 FREQUENCY COUNTER PROGRAMMABLE DC POWER SUPPLY PC INTERFACE PC M motor 32 kHz PCA200x battery Fig 10. Supply voltage at start-up during production and testing VDD VP(prog)(stop) td(start) > 500 ms VSS VDD(nom) 001aac503 tp(stop)

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 11 November 2008 14 of 28 NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse

  • State 2: inhibition time has a value of n× 0.122 ms. A signal with periodicity of 31.25 ms + n× 0.122 ms appears at pad RESET and as current modulation at pad VDD (seeFigure11 and Figure12)

7.12 Customer testing

Connecting pad RESET to VSS activates the test mode. In this test mode, the motor output frequency is 8 Hz; the duty cycle reduction and battery check occurs every second, instead of every 4 minutes. If the supply voltage drops below the EOL threshold voltage, the motor output frequency is 32 Hz with the highest driving level.

7.13 EOL of battery

The supply voltage is checked every 4 minutes. If it drops below the EOL threshold voltage (1.38 V for silver-oxide, 2.5 V for lithium batteries), the motor steps change from one pulse per second to a burst of four pulses every 4 seconds. The step detection is switched off, and the motor is driven with the highest pulse level. Only the PCA2000 has an EOL function. Fig 11. Output waveform at pad RESET for instruction state 2 Fig 12. Supply voltage modulation for starting and stopping of instruction state 2 mgw355 VDD VSS 31.25 ms + inhibition time VO(dif) VDD VP(prog)(start) VP(mod) VP(prog)(stop) tp(start) VSS VDD(nom) mgu719 tp(stop)

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. [1] When writing to the OTP cells, the supply voltage (VDD ) can be raised to a maximum of 12 V for a period of 1 s. [3] HBM: Human Body Model, according to JESD22-A114. [4] MM: Machine Model, according to JESD22-A115. [5] Latch-up testing, according to JESD78. Table 9. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. [2] R L and CL are a load resistor and load capacitor, externally connected to pad RESET. Table 10. Characteristics

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved.

  1. OTP programming characteristics

[1] Program each word once only. Table 11. Specifications for OTP programming See Figure7,Figure8 andFigure12.

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 11 November 2008 18 of 28 NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse 11. Bare die outline Fig 13. Bare die outline PCA2000U and PCA2001U REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA PCA200xU Wire bond die; 8 bonding pads; 1.16 x 0.86 x 0.22 mm PCA200xU UNIT mm max nom min 0.22 0.20 0.18 1.16 0.17 0.32 0.96 0.099 0.096 0.093 0.099 0.096 0.093 A DIMENSIONS (mm are the original dimensions) 0 0.5 1 mm scale D E 0.86 e1 e2 eD P1 P2 0.089 0.086 0.083 0.089 0.086 0.083 A X D eD e2 E detail X P4 P3 08-05-09 08-05-21

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. [1] All coordinates are referenced, inµm, to the center of the die (seeFigure2,Figure13 andFigure14). pull-down resistance to VSS . Table 12. Bonding pad and solder bump locations

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 11 November 2008 20 of 28 NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse 12. Packing information

12.1 Tray information

Fig 15. Tray details The orientation of the IC in a pocket is indicated by the position of the IC type name on the surface of the die, with respect to the cut corner on the upper left of the tray. Fig 16. Tray alignment mgu653 D F E x y A G H 1,1 x,12,1 1,2 1,3 1,y x,y 2,2 3,1 C B M J AA SECTION A-A mgu652 PCA2000 PCA2001

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Table 13. Tray dimensions

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 11 November 2008 22 of 28 NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse

12.2 Unsawn wafer information

The die are grouped in arrays of 2× 6 devices. Each array is edged with a metal path. All this metal paths have to be cut while dicing. Fig 17. Wafer layout of PCA2000CX and PCA2001CX Straight edge of the wafer XY Saw lane 84 mm 84 mm ~18 mm (1) (1) detail X Saw lane 84 mm detail Y 001aai236

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 11 November 2008 23 of 28 NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application NoteAN10365 “Surface mount reflow soldering description”.

13.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both the mechanical and the electrical connection. There is no single soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization.

13.2 Wave and reflow soldering

Wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. The wave soldering process is suitable for the following:

  • Through-hole components
  • Leaded or leadless SMDs, which are glued to the surface of the printed circuit board Not all SMDs can be wave soldered. Packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. Also, leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. The reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. Leaded packages, packages with solder balls, and leadless packages are all reflow solderable. Key characteristics in both wave and reflow soldering are:
  • Board specifications, including the board finish, solder masks and vias
  • Package footprints, including solder thieves and orientation
  • The moisture sensitivity level of the packages
  • Package placement
  • Inspection and repair
  • Lead-free soldering versus SnPb soldering

13.3 Wave soldering

Key characteristics in wave soldering are:

  • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave
  • Solder bath specifications, including temperature and impurities

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved.

13.4 Reflow soldering

  • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (seeFigure18) than a SnPb process, thus reducing the process window
  • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board
  • Reflow temperature profile; this profile includes preheat, reflow (in which the board is heated to the peak temperature) and cooling down. It is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). In addition, the peak temperature must be low enough that the packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table14 and15 Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, seeFigure18.

Table 14. SnPb eutectic process (from J-STD-020C) Table 15. Lead-free process (from J-STD-020C)

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 11 November 2008 25 of 28 NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse For further information on temperature profiles, refer to Application NoteAN10365 “Surface mount reflow soldering description”. MSL: Moisture Sensitivity Level Fig 18. Temperature profiles for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = MSL limit, damage level peak temperature

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Table 16. Revision history

  • The format of this data sheet has been redesigned to comply with the new presentation and information standard of NXP
  • Implemented new drawings and wafer information
  • Added new bare die outline drawing PCA2000_2001_4 20050908 Product data sheet - PCA2000_2001_3 PCA2000_2001_3 20031217 Product data sheet - PCA2000_2001_2 PCA2000_2001_2 20030204 Objective specification - PCA2000_2001_1 PCA2000_2001_1 20020517 Preliminary specification - -

PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 11 November 2008 27 of 28 NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse 15. Legal information

15.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

15.2 Definitions

Draft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

15.3 Disclaimers

General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes —NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use —NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Bare die —All die are tested on compliance with their related technical specifications as stated in this data sheet up to the point of wafer sawing and are handled in accordance with the NXP Semiconductors storage and transportation conditions. If there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. There are no post-packing tests performed on individual die or wafers. NXP Semiconductors has no control of third party procedures in the sawing, handling, packing or assembly of the die. Accordingly, NXP Semiconductors assumes no liability for device functionality or performance of the die or systems after third party sawing, handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify their application in which the die is used. All die sales are conditioned upon and subject to the customer entering into a written die sale agreement with NXP Semiconductors through its legal department. Limiting values —Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale —NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

15.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit:http://www.nxp.com For sales office addresses, please send an email to:salesaddresses@nxp.com Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.

NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 11 November 2008 Document identifier: PCA2000_2001_5 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 17. Contents

7.11 Measurement of oscillator frequency and