PC33991DH/R2

MC33991 MOTOROLA | Alldatasheet

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Y MOTOROLA SEMICONDUCTOR TECHNICAL DATA

33991 Simplified Application Schematic

This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice. © Motorola, Inc. 2002 Document order number: MC33991/D Rev. 0, 10/2002 33991 Preliminary Information Gauge Driver Integrated Circuit The 33991device is a single packaged, Serial Peripheral Interface (SPI) controlled, dual stepper motor gauge driver Integrated Circuit (IC). This monolithic IC consists of four dual output H-Bridge coil drivers and the associated control logic. Each pair of H-Bridge drivers is used to automatically control the speed, direction and magnitude of current through the two coils of a 2-phase instrumentation stepper motor, similar to an MMT licensed AFIC 6405. This device is ideal for use in automotive instrumentation systems requiring distributed and flexible stepper motor gauge driving. The device also eases the transition to stepper motors from air core motors by emulating the air core pointer movement with little additional processor bandwidth utilization. The device has many attractive features including:

• MMT-licensed two-phase stepper motor compatible  Minimal processor overhead required  Fully integrated pointer movement and position state machine with air core movement emulation  4096 possible steady state pointer positions 3 4 0 ° maximum pointer sweep  Linear 4500 ° 2  Max pointer velocity of 400 °  Analog micro stepping (12 steps/degree of pointer movement)  Pointer calibration and return to zero  SPI controlled 16-bit word  Calibratable Internal Clock  Low Sleep mode current DW SUFFIX PLASTIC PACKAGE CASE 751E-04 SOICW

ORDERING INFORMATION

Range (TA) Package PC33991DH/R2 -40 to 125°C SOICW COS1- COS0- COS1+ COS0+ SIN0+ SIN1- SIN1+ SIN0- MC33991 GDIC GND SCLK SI SO CSB RSTB VDD BATTERY REG MCU TYPICAL APPLICATION MOTOR 0 MOTOR 1 RTZ 0.1 0.1 33991 GDIC MCU GAUGE DRIVER INTEGRATED CIRCUIT Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

33991 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA

Figure 1. 33991 Block Diagram Freescale Semiconductor, Inc.

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33991 Pin Functions Pin Number Pin Name Description 1 COS0+ H-Bridge Output. This is the output pin of a half bridge, designed to source or sink current. The H-Bridge pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant operation. 2 COS0- H-Bridge Output. This is the output pin of a half bridge, designed to source or sink current. The H-Bridge pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant operation. 3 SIN0+ H-Bridge Output. This is the output pin of a half bridge, designed to source or sink current. The H-Bridge pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant operation. 4 SIN0- H-Bridge Output. This is the output pin of a half bridge, designed to source or sink current. The H-Bridge pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant operation. 5-8 GND Ground. These pins serve as the ground for the source of the low-side output transistors as well as the logic portion of the device. They also help dissipate heat from the device. 9 CS Chip Select. This pin is connected to a chip select output of a LSI IC. This IC controls which device is addressed by pulling the CS pin of the desired device low, enabling the SPI com munication with the device, while other devices on the serial link keep their serial outputs tri-stated. This input has an internal active pull-up and requires CMOS logic levels. This pin is also used to calibrate the internal clock. 10 SCLK Serial Clock. This pin is connected to the SCLK pin of the master device and acts as a bit clock for the SPI port. It transitions one time per bit transferred at an operating frequency, fSPI, defined in the Coil Output Timing Table. It is idle between command transfers. The pin is 50 percent duty cycle, with CMOS logic levels. This signal is used to shift data to and from the device. 11 SO Serial Output. This pin is connected to the SPI Serial Data Input pin of the master device, or to the SI pin of the next device in a daisy chain. This output will remain tri-stated unless the device is selected by a low CS signal. The output signal generated will have CMOS logic levels and the output data will transition on the rising edges of SCLK. The serial output data provides status feedback and fault information for each output and is returned MSB first when the device is addressed. 12 SI Serial Input. This pin is connected to the SPI Serial Data Output pin of the master device from which it receives output command data. This input has an internal active pull-down requiring CMOS logic levels. The serial data transmitted on this line is a 16-bit control command sent MSB first, controling the gauge functions. The master ensures data is available on the falling edge of SCLK. 13 RTZ Multiplexed Output. This multiplexed output pin of the non-driven coil during an RTZ event. 14 VDD Voltage. This SPI and logic power supply input will work with 5.0 V supplies. COS1+ GND GND GND GND VPWR RST VDD RTZ COS1- SIN1+ SIN1- COS0+ GND GND GND GND CS SCLK SI COS0- SIN0+ SIN0- SO

24 Wide Body SOIC

Thermally Enhanced Lead Frame RJ-LEAD =1 5C / W Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

15 RST Reset. If the master decides to reset the device, or place it into a sleep state, the RST p i ni sd r i v e nt oal o g i c0 . A logic 0 on the RST pin will force all internal logic to the known default state. This input has an internal active pull-up. 16 VPWR Battery Voltage. Power supply. 17-20 GND Ground. These pins serve as the ground for the source of the low-side output transistors as well as the logic portion of the device. They also help dissipate heat from the device. 21 SIN1- H-Bridge Output. This pin is the output of a half bridge, designed to source or sink current. The H-Bridge pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant operation. 22 SIN1+ H-Bridge Output. This pin is the output of a half bridge, designed to source or sink current. The H-Bridge pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant operation. 23 COS1- H-Bridge Output. This pin is the output of a half bridge, designed to source or sink current. The H-Bridge pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant operation. 24 COS1+ H-Bridge Output. This pin is the output of a half bridge, designed to source or sink current. The H-Bridge pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant operation. Pin Functions Pin Number Pin Name Description Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33991 STATIC ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 4.75 V < VDD < 5.25 V, -40° C < TJ < 150° C, unless otherwise noted) Characteristic Symbol Min Nom Max Unit Power Input Supply Voltage Range Fully Operational VPWR 6.5 — 26.0 V VPWR Supply Current (Gauge 1 & 2 outputs On, no output loads) IPWR(on) — 4.0 6.0 mA VPWR Supply Current (all Outputs Disabled) (Reset = logic 0, VDD =5V ) (Reset = logic 0, VDD =0V ) IPWRslp1 IPWRslp2 — 42 µA Over voltage Detection Level (Note1) VPWROV 26 32 38 V Under voltage Detection Level (Note2) VPWRUV 5.0 5.6 6.2 V Logic Supply Voltage Range (5 V nominal supply) VDD 4.5 5.0 5.5 V Under VDD Logic Reset VDDUV — — 4.5 V VDD Supply Current (Sleep: Reset logic 0) IDD(off) — 40 65 µA VDD Supply Current (Outputs Enabled) IDD(on) — 1 1.8 mA Notes: 1. Outputs will disable and must be re-enabled via the PECR command. 2. Outputs remain active; however, the reduction in dr ive voltage may result in a loss of position control. Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

Characteristic Symbol Min Norm Max Unit Power Outputs Microstep Output (measured across coil outputs) Sin0,1,+/- (Cos0,1,+/-) (see Pin Functions) Rout = 200 Ω Steps 6,18 (0,12) Steps 0,12 (6,18) Vst6 Vst5 Vst4 Vst3 Vst2 Vst1 Vst0 4.9 0.94xVst6 0.84xVst6 0.69xVst6 0.47xVst6 0.23xVst6 -0.1 5.3 0.97xVst6 0.87xVst6 0.71xVst6 0.50xVst6 0.26xVst6 6.0 1.00xVst6 0.94xVst6 0.79xVst6 0.57xVst6 0.31xVst6 0.1 V Full step Active Output (measured across coil outputs) Sin0,1, ± (Cos0,1, ±) (see 5-4) Steps 1,3 (0,2) VFS 4.9 5.3 6.0 V Microstep, Full Step Output (measured from coil low side to ground) Sin0,1, ± (Cos0,1, ±) IOUT =3 0 m A VLS 0 0.1 0.3 V Output Flyback Clamp (Note3) VFB — Vst1+0.5 Vst1+1.0 V Output Current Limit (Out=Vstp6) ILIM 40 100 170 mA Over temperature Shutdown OTSD 155 — 180 °C Over temperature Hysteresis (Note3) OTHYS 8 — 16 °C Notes: 3. Not 100 percent tested. STATIC ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 4.75 V < VDD < 5.25 V, -40° C < TJ < 150° C, unless otherwise noted) Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33991 Characteristic Symbol Min Typ Max Unit Control I/O Input Logic High Voltage (Note4) VIH 2.0 — — V Input Logic Low Voltage (Note4) VIL — — 0.8 V Input Logic Voltage Hysteresis (Note5) Vin(hyst) — 100 — mV Input Logic Pull Down Current (SI, SCLK) Idwn 3 — 20 µA Input Logic Pull-Up Current (CS,R S T) Iup 5 — 20 µA SO High State Output Voltage (IOH = 1.0 mA) VSOH 0.8VDD — — V SO Low State Output Voltage (IOL = -1.6 mA) VSOL — 0.2 0.4 V SO Tri-State Leakage Current (CS ≥ 3.5 V) SOLK -5 0 5 µA Input Capacitance (Note6) Cin — 4 12 pF SO Tri-State Capacitance (Note6) CSO — — 20 pF Notes: 4. V DD =5 V 5. Not Production Tested; guaranteed by design. 6. Capacitance not measured; guaranteed by design. STATIC ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 4.75 V < VDD < 5.25 V, -40° C < TJ < 150° C, unless otherwise noted) Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

Characteristic Symbol Min Typ Max Unit Power Output and Clock Timings SIN, COS Output Turn ON delay Time (time from rising CS enabling outputs to steady state coil voltages and currents) (Note7) TDHY(ON) — — 1 ms SIN, COS Output Turn OFF delay Time (time from rising CS disables outputs to steady state coil voltages and currents) (Note7) TDHY(OFF) — — 1 ms Uncalibrated Oscillator Cycle Time TCLU 0.65 1.0 1.7 µs Calibrated Oscillator Cycle Time (Cal pulse = 8 µs, PECR D4 is logic 0) TCLO 1.0 1.1 1.2 µs Calibrated Oscillator Cycle Time (Cal pulse = 8 µs, PECR D4 is logic 1) TCLO 0.9 1.0 1.1 µs Maximum Pointer Speed (Note8) VMAX — — 400 deg/s Maximum Pointer Acceleration (Note8) AMAX — — 4500 deg/s2 Notes: 7. Maximum specified time for the 33991 is the minimum guaranteed time needed from the micro. 8. The minimum and maximum value will vary proportionally to th e internal clock tolerance. These are not 100 percent tested. STATIC ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 4.75 V < VDD < 5.25 V, -40° C < TJ < 150° C, unless otherwise noted) Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33991 Characteristic Symbol Min Typ Max Unit SPI Timing Interface Recommended Frequency of SPI Operation fSPI — 1 3 MHz Falling edge of CS to Rising Edge of SCLK Required Setup Time) (Note9) TLEAD — 50 167 ns Falling edge of SCLK to Rising Edge of CS (Required Setup Time)(Note9) TLAG — 50 167 ns SI to Falling Edge of SCLK (Required Setup Time) (Note9) TSLSU — 25 83 ns Falling Edge of SCLK to SI (Required Hold Time) (Note9) TSI(HOLD) — 25 83 ns SO Rise Time (CL = 200 pF) TrSO — 25 50 ns SO Fall Time (CL = 200 pF) TfSO — 25 50 ns SI, CS, SCLK, Incoming Signal Rise Time (Note10) TrSI — — 50 ns SI, CS, SCLK, Incoming Signal Fall Time (Note10) TfSI — — 50 ns Falling Edge of RST to Rising Edge of RST (Required Setup Time) (Note9) TwRST — — 3 µs Rising Edge of CS to Falling Edge of CS (Required Setup Time) (Note9) (Note11) TCS — — 5 µs Rising Edge of RST to Falling Edge of CS (Required Setup Time) (Note9) TEN — — 5 µs Time from Falling Edge of CS to SO Low Impedance (Note12) TSO(EN) — — 145 ns Time from Rising Edge of CS to SO High Impedance (Note13) TSO(DIS) — 1.3 4 µs Time from Rising Edge of SCLK to SO Data Valid (Note14) 0.2 VDD <=S O >=0 . 8V DD, CL = 200 pF TVALID — 65 105 ns Notes: 9. The maximum setup times specified for the 33991 is the minimum time needed from the microcontroller to guarantee correct operation. 10. Rise and Fall time of incoming SI, CS , and SCLK signals suggested for design consideration to prevent the occurrence of double pulsing. 11. This value is for a 1 MHz calibrated internal clock; it will change proportionally as the internal clock frequency changes. 12. Time required for output status data to be available for use at SO. 1 K Ω load on SO. 13. Time required for output status data to be terminated at SO. 1 K Ω load on SO. 14. Time required to obtain valid data out from SO following the rise of SCLK. The device shall meet all SPI interface-timing requirements specified in the SPI Interface Timing, over the temperature range specified in the environmental requirements section. Digital Inte rface timing is based on a symmetrical 50 percent duty cycle SCLK Clock Period of 333 ns. The device shall be fully functional for slower clock speeds. STATIC ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 4.75 V < VDD < 5.25 V, -40° C < TJ < 150° C, unless otherwise noted) Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

(All voltages are with respect to ground unless otherwise noted) Rating Symbol Value Limit Power Supply Voltage Steady State VPWR(sus) -0.3 to 41 V Input Pin Voltage (Note15) VIN -0.3 to 7.0 V SIN+/- COS +/- Continuous Per Output Current (Note16) IOUTMAX 40 mA Storage Temperature Tstg - 5 5t o1 5 0 °C Operating Junction Temperature TJunc - 4 0t o1 5 0 °C Thermal Resistance (C/W) Ambient Junction to Lead qJA qJL °C/W °C/W ESD Voltage Human Body Model (Note17) Machine Model (Note18) VESD1 VESD2 2000 200 V V Notes: 15. Exceeding voltage limits on Input pins may cause permanent damage to the device. 16. Output continuous output rating so long as maximum junction temperature is not exceeded. Operation at 125 ° C ambient temperature will require maximum output current computat ion using package thermal resistances 17. V ESD1 testing is performed in accordance with the Human Body Model (Czap = 100pF, Rzap = 1500 Ω) 18. V ESD2 testing is performed in accordance with the Machine Model (Czap = 100pF, Rzap = 0 Ω) Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

Figure 2. Input Timing Switching Characteristics Figure 3. Valid Data Delay Time and Valid Time Waveforms

0.7 VDD

0.2 VDD

Freescale Semiconductor, Inc.

registers to the addressed registers on the rising edge of CS. The output driver on the SO pin is enabled when CSis logic [0]. to the pin as specified in the Control I/O table. SCLK clocks the internal shift registers of the 33991device. Transfer Timing diagrams in s 2 and 3. This pin is the input of the Serial Peripheral Interface (SPI). Serial Input (SI) information is read on the falling edge of SCLK. i g n o r e dw h e nC Sis in a logic high state. impedance state until the CS pin is put into a logic low state. timing diagrams illustrated in Figures 4 and 5. Table 1. Data Transfer Timing Freescale Semiconductor, Inc.

disable the output drivers of the two gauge controllers. 33991device into a low current consumption mode. Standby mode, the internal clock will remain on. frequency is centered at 1MHz if bit D4 is logic [1]. description should be the case for 1 MHz if D2 is left logic [0]. Table 2. Module Memory Map

000 Power, Enable, and Calibration Register PECR

001 Maximum Velocity Register VELR

010 Gauge 0 Position Register POS0R

011 Gauge 1 Position Register POS1R

100 Return to Zero Register RTZR

101 Return to Zero Configuration Register RTZCR

110 Not Used

111 Reserved for Test

Freescale Semiconductor, Inc.

to set a maximum velocity for each gauge. See Table 4. logic [0] for valid VELR commands. maximum of the intended gauge until changed by command. writing when communicating the desired pointer positions. when communicating the desired pointer positions. the desired pointer positions. must be at logic [0] for valid POS0R and POS1R commands. Table 3. Power, Enable and Calibration Register (PECR) Table 4. Maximum Velocity Register (VELR) Freescale Semiconductor, Inc.

P011—P0 0 Desired pointer position of Gauge 0. P011—P0 0 Desired pointer position of Gauge 1. c a nb er e a de i g h tb i t sa tat i m e . 0w h e nD 0i sl o g i c[ 0 ] ,a n dG a u g e1w h e nD 0i s1 ,r e s p e c t i v e l y . w h i l ei nt h eR T Zm o d e . monitor the RTZ information regardless the size of the signal. Bits D12:D5 must be at logic [0] for valid RTZR commands. The register bits in Table 7 are write-only. Table 5. Gauge 0 Position Register (POS0R) Table 6. Gauge 1 Position Register (POS1R) Table 7. Return to Zero Register (RTZR) Freescale Semiconductor, Inc.

RZ4—This bit is used to enable an unconditional RTZ event. return the pointer to zero position. Table 9. It is written to modify the step time, or rate, the pointer is used to adjust the threshold of the RTZ integration register. moving the RTZ pointer speed away from these frequencies. movement, the pointer speed is: 1/(FS×2) degrees. when D4 is logic [0], or 768 µs when D4 is logic [1]. pointer, thereby resulting in the cessation of the RTZ event. integrator and accumulator are initialized after each full step. integration time. A stalled pointer results in a negative value. (11111111)provided in Table 11. illustrated in Table 10. The default time is 21.25 ms (0101). Table 8. RTZ Accumulator Bit Select Table 9. RTZCR SI Register Assignment Freescale Semiconductor, Inc.

Table 10. RTZCR Full Step Time Table 11. RTZCR Accumulator Offset Freescale Semiconductor, Inc.

message length is greater than 0 bits and a multiple of 16 bits. representative of the initial message bits clocked into the SI pin. That is due to the CS pin first being transitioned to a logic [0]. in the SPI Interface Timing table. over voltage event automatically disables the driver outputs. operate properly as long as VDD is within the normal range. confirm the pointer is moving as commanded. ST4—Gauge 0—Movement since last SPI communication. the pointer is moving as commanded. commanded off using the RTZ message. commanded off, using the RTZ message. logic [1] until the gauge is enabled. Table 12. Status Output Register Freescale Semiconductor, Inc.

ST0–Gauge 0—Junction over temperature. A logic [1] on this bit indicates coil drive circuitry dedicated to drive Gauge 0 has exceeded the maximum allowable junction temperature since the last SPI communication. Additionally, the same indication signals the circuitry Gauge 0 is disabled. It is recommended the pointer be re-calibrated using the RTZ command after re- enabling the gauge, using the PECR command. This bit remains logic [1] until the gauge is re-enabled.  0 = Temperature within range  1 = Gauge 0 maximum allowable junction temperature condition has been reached DEVICE FUNCTIONAL DESCRIPTION State Machine Operation The two-phase stepper motor is defined as maximum velocity and acceleration, and deceleration. It is the purpose of the stepper motor state machine to drive the motor with maximum performance while remaining within the motor’s velocity and acceleration constraints. When commanded, the motor should accelerate constantly to its maximum velocity then decelerate and stop at the desired position. During the deceleration phase, the motor should not exceed the maximum deceleration. A required function of the state machine is to ensure the deceleration phase begins at the correct time, or position. During normal operation, both stepper motor rotors are microstepped with 24 steps per electrical revolution. See Figure 6. A complete electrical revolution results in 2 degrees of pointer movement. There is a second, and smaller state, m a c h i n ei nt h eI Cc o n t r o l l i n gt h e s em i c r o s t e p s .T h i ss t a t e machine receives clockwise or counter-clockwise index commands at intervals, stepping the motor in the appropriate direction by adjusting the current in each coil. Normalized values can be seen in Table 13. Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

and the changing time defines the motor acceleration. are in steps/second, and steps/second². the time step actually used. Table 13. Coil Step Value Notes: * Denotes Normalized values. Freescale Semiconductor, Inc.

generated giving the time step ∆t at an index position n. motor must begin decelerating. Table 14. This motor’s maximum speed is 4800 microsteps/s 54000 microsteps/s². The table is quantized to a 1 MHz clock. Table 14. Velocity Ramp Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

area required for trim pads and the associated trim procedure. would be to require the use of an additional crystal or resonator. result to generate a desired maximum or nominal frequency. Freescale Semiconductor, Inc.

moving, indicated by status bits ST4 and ST5. Figure 7. Gauge Enable and Clock Calibration Example frequency is centered at 1 MHz if bit D4 is logic [1]. sweep range increases from approximately 340° to over 500°. in choppy movements when compared to air core movements. example is illustrated in Figure 8. Figure 8. Deceleration Waveshaping Freescale Semiconductor, Inc.

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33991 Return to Zero Calibration Many stepper motor applications require the integrated circuit (IC) detect when the motor is stalled after commanded to return to the zero position for calibration purposes. Stalling occurs when the pointer hits the end stop on the gauge bezel, usually at the zero position. It is important when the pointer reaches the end stop it immediately stops without bouncing away from the stop. The 33991device provides the ability to automatically and independently return each of the two pointers to the zero position via the RTZR and RTZCR SPI commands. During an RTZ event, all commands related to the gauge being returned are ignored, except when the RTZR bit D1 is used to disable the event, or when the RTZR bits D3 and D2 are changed in order to look at different RTZ accumulator bits. Once an RTZ event is initiated, the device will report back via the SO pin, indicating an RTZ is underway. The RTZCR command is used to set the RTZ pointer speed, choose an appropriate blanking time and preload the integration accumulator with an appropriate offset. Reaching the end stop, the device reports the RTZ success to the microcontroller via the SO pin. The RTZ automatically disables allowing other commands to be valid. In the event the master determines an RTZ sequence is not working properly, for example the RTZ taking too long, it can disable the command via the RTZR bit D1. RTZCR bits D12:D5 are written to preload the accumulator with a predetermined value assuring an accurate pointer stall detection. This preloaded value is determined during application development by disabling the automatic shutdown feature of the device with the RTZR bit D4. This operating mode allows the master to monitor the RTZ event using the accumulator information available in the SO status bits D15:D8. Once the optimal value is determined, the RTZ event can be turned off using the RTZR bit D1. During an RTZ event, the pointer is returned counter-clock- wise (CCW) using full steps at a constant speed determined by the RTZCR D3:D0 bits during RTZ configuration. See Figure 9. Full steps are used because only one coil of the motor is being driven at any time. The coil not being driven is used to determine whether the pointer is moving. If the pointer is moving, a back EMF signal can be processed and detected in the non-driven coil. This is achieved by integrating the signal present on an opened end of the non-driven coil while grounding the opposite end. The IC automatically prepares the non-driven coil at each step, waits for a predetermined blanking time, then processes the signal for the duration of the full step. When the pointer reaches the stop and no longer moves, the dissipating back EMF is detected. The processed results are placed in the RTZ accumulator, then compared to a decision threshold. If the signal exceeds the decision threshold, the pointer is assumed to be moving. When the threshold value is not exceeded, the drive sequence is stopped when RTZR bit D4 is logic [0]. If bit D4 is logic [1], the RTZ movement will continue indefinitely until the RTZR bit D1 is used to stop the RTZ event. A pointer not on a full step location, or in magnetic alignment prior to the RTZ event, may result in a false RTZ detection. More specifically, an RTZ event beginning from a non-full step position may result in an abbreviated integration, interpreted as a stalled pointer. Similarly, if the magnetic fields of the energized coils and the rotor are not aligned prior to initiating the RTZ, the integration results may mistakenly indicate the pointer has stopped moving. Advancing the pointer by at least 24 microsteps clock-wise (CW) to the nearest full step position, e.g., 24,30, 36, 42, 48 ...prior to initiating an RTZ, ensures the magnetic fields are aligned. Doing that increases the chances of a successful pointer stall detection. It is important the pointer be in a static, or commanded position before starting the RTZ event. Since the time duration and the number of steps the pointer moves prior to reaching the commanded position can vary depending on its status at the time a position change is communicated, the master should assure sufficient time has elapsed prior to starting an RTZ. If an RTZ is desired after first enabling the outputs, or after forcing a reset of the device, the pointer should first be commanded to move 24 microstep steps clock-wise (CW) to the nearest full step location. Because the pointer was in a static position at default, the master could determine the number of microsteps the device took by monitoring and counting the ST4 (ST5) status bit transitions, confirming the pointer is again in a static position. Only one gauge at a time can be returned to the zero position. An RTZ should not begin until the gauge to be calibrated is at a static position and its pointer is at a full step position. An attempt to calibrate a gauge while the other is in the process of an RTZ event, will be ignored by the device. In most applications of the RTZR command, it is possible to avoid a visually obvious sequential calibration by first bringing the pointer back to the previous zero position and then re- calibrating the pointers. After completion of a RTZ, the 33991 automatically assigns the zero step position to the full step position at the end stop location. Because the actual zero position could lie anywhere within the full step where the zero was detected, the assigned zero position could be within a window of ± 0.5°.A nR T Zc a nb e used to detect stall, even if the pointer already rests on the end stop when an RTZ sequence is initiated; however, it is recommended the pointer should be advanced by at least 24 microsteps to the nearest full step prior to initiating the RTZ. Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

Figure 9. Full Steps (CCW) gauge(s) are enabled or disabled. should be routinely enabled following the transition to logic [0] of ST6. Freescale Semiconductor, Inc.

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33991 Over Current Fault Requirements: Output currents are limited to safe levels, then the device will rely on Thermal Shutdown to protect itself. Under Voltage Fault Requirements Severe under voltage VPWR conditions may result in uncertain pointer positions; therefore, recalibration of the pointer position may be advisable. During an under voltage event, the state machine and outputs continues to operate, although the outputs may be unable to reach the higher voltage levels. The master is notified of an under voltage event via the SO pin. Under voltage detection occurs regardless whether the gauge(s) are enabled, or disabled. Note: There is no way to distinguish between over voltage and under voltage faults from the status bits. If there is no external means for the microcontroller to determine the fault type, the gauges should be routinely enabled following the transition to logic [0] of ST6. Electrical Requirements All voltages specified are measured relative to the device ground pins, unless otherwise noted. Current flowing into 33991is positive, while current flowing out of the device is negative. Resets (Sleep Mode) The device can reset internally or externally. If the VDD level falls below the VDDUV level, specified in the Static Electrical Characteristics, the device resets and powers up in the Default mode. Similarly, If the RSTpin is driven to a logic [0], the device will reset to its default state. The device will consume the least amount of current (Idd and Ipwr) when the RST pin is logic [0]. This is also referred to as the Sleep mode.

APPLICATION INFORMATION

The 33991is an extremely versatile device, used in a variety of applications. Table 15, and the following sample code, provides a step-by-step example of configuring using many of the features designed into the IC. This example is intended to give a generic overview of how the device could be used. Further, it is intended to familiarize users with some of its capabilities. In Steps 1-9, the gauges are enabled, the clock is calibrated, the device is configured for RTZ, and the pointers are calibrated with the RTZ command. Steps 1-9 are representative of the first steps after power-up. Maximum velocity is set in Step 10, if necessary. In Steps 11 and 12, pointers are commanded to the desired positions by the master. These steps are the most frequently used during normal operation. Steps 13 -15 place the pointer close to the zero position prior to the initiation of the RTZ commands in Steps 16- 19. Step 20 disables the gauges, placing them into a Low Quiescent Current mode. Table 15. GDIC SETUP, CONFIGURATION, & USAGE EXAMPLE

1 PECR

• Bit PE3: enables calibration procedure.
• Bit PE4: set clock f =1 MHz maximum or nominal.

Send 8 µs pulse on CS to calibrate 1 MHz clock.

2 RTZCR

Check SO for an Out of Range Clock Calibration. Freescale Semiconductor, Inc.

4 POS1R

Check SO to see if Gauge 0 has moved.

5 PECR

Send null command to see if gauges have moved.

• Is bit ST4 (ST5) logic level 1?If so, Gauge 0 (Gauge 1) has moved another microstep.

position, then RTZ. Otherwise repeat steps a) and b).

6 RTZ

gauge bit RZ1 is used to enable or disable an RTZ.

• Bits RZ3:RZ2 are used to select the RTZ accumulator bits clocking out on the SO pin.

used if characterizing the RTZ.

• Bits RZ3: RZ2 are used to select the bits.

7 PECR

9 PECR

10 VELR

11 POS0R

• Bit ST6 logic level 1. Ifs o ,R T Za f t e rv a l i dVPWR.

reestablish the zero reference by RTZ command.

12 POS1R

Check SO for Out of Range VPWR bit ST6 logic level 1. If so, RTZ after valid VPWR. continues to indicate over temperature, shut down Gauge 1. If ST1 returns to normal, reestablish the zero reference by RTZ command.

13 POS0R

b. Move pointer position at least 24 microsteps CW to the nearest full step prior to RTZ. Table 15. GDIC SETUP, CONFIGURATION, & USAGE EXAMPLE (continued) Freescale Semiconductor, Inc.

14 POS1R

Check SO to see if Gauge 0 has moved.

15 PECR

Send null command to see if gauges have moved. Check SO to see if Gauge 0 (Gauge 1) has moved.

• Is bit ST4 (ST5) logic level 1?If so, Gauge 0 (Gauge 1) has moved another microstep.

position, then RTZ. Otherwise repeat steps a) and b).

16 RTZ

the gauge bit RZ1 used to enable or disable an RTZ.

• Bits RZ3:RZ2 are used to select the RTZ accumulator bits clocking out on the SO pin.

be used if characterizing the RTZ.

• Bits RZ3:RZ2 are used to select the bits.

17 PECR

Table 3Put the device to sleep. -R S Tpin is pulled to logic 0. Freescale Semiconductor, Inc.

/* The following example code demonstrates a typical set up configuration for a M68HC912B32. */ /* This code is intended for instructional use only. Motorola assumes no liability for use or */ /* modification of this code. It is the responsibility of t he user to verify all parameters, variables,*/ /* timings, etc. */ void InitGauges(void) /* Step 1 */ Command_Gauge(0x00,0x03); /* Enable Gauges */ Command_Gauge(0x00,0x08); /* Clock Cal bit set */ /* 8 uSec calibration */ PORTS = 0x00; /* Enable GDIC CS pin - PORTS2 */ For (cnt = 0; cnt < 5; cnt++) { /* Wait for 8 uSec calibration */ NOP; PORTS = 0x04; /* Disable GDIC CS pin - PORTS2 */ /* Step 2 */ Command_Gauge(0xA0,0x21); /* Send RTZCR values */ Command_Gauge(0x10,0x00); /* Null Read to get SO status */ /*Check SO bits for Out of Range Clock Calibration */ If ((status & 0x80) != 0) /*If Clock is out of range then recalibrate 8 uSec pulse */ /* Step 3 */ Command_Gauge(0x40,0x18); /* Send position to gauge0 */ /* Step 4 */ Command_Gauge(0x60,0x18); /* Send position to gauge1 */ /* Check SO bit ST4 to see if Gauge 0 has moved */ If((status & 0x10) != 0) /* If ST4 is logic 1 then Gauge 0 has moved to the first microstep */ /* Step 5 */ Command_Gauge(0x10,0x00); /* Null Read to get SO status */ /* Check SO bit ST4 to see if Gauge 0 has moved */ If((status & 0x10) != 0) /* If it has moved, then keep track of position */ /* Wait until 24 steps are finished then send a RTZ command (Step 7) */ /* Step 6 */ Command_Gauge(0x80,0x02); /* Send RTZ to Gauge 0 */ /* Step 7 */ Command_Gauge(0x10,0x00); /* Null Read to get status */ /* Read Status until RTZ is done */ While ((status & 0x04) != 0) {Command_Gauge(0x10,0x00);} Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33991 /* Step 8 */ Command_Gauge(0x80,0x03); /* Send RTZ to Gauge 1 */ /* Step 9 */ Command_Gauge(0x10,0x00); /* Null Read to get status */ /* Read Status until RTZ is done */ While ((status & 0x08) != 0) {Command_Gauge(0x10,0x00);} /* Step 10 */ Command_Gauge(0x23,0xFF); /* Send velocity */ /* Step 11 */ Command_Gauge(0x4F,0xFF); /* Send position to gauge0 */ /*Check SO bits for Out of Range Vpwr and Overtemperature */ If((status & 0x40) != 0) /* If bit ST6 is logic 1 then RTZ after valid Vpwr */ If((status & 0x01) != 0) /* If bit ST0 is logic 1 then enable driver again. /* If ST0 continues to indicate over temperature, then shut down Gauge 0. */ /* If ST2 returns to normal, then reestablish the zero reference by RTZ command. */ /* Step 12 */ Command_Gauge(0x6F,0xFF); /* Send position to gauge1 */ /*Check SO bits for Out of Range Vpwr and Over-Temperature */ If((status & 0x40) != 0) /* If bit ST6 is logic 1 then RTZ after valid Vpwr */ If((status & 0x01) != 0) /* If bit ST0 is logic 1 then enable driver again. /* If ST0 continues to indicate Over-Temperature, then shut down Gauge 1. */ /* If ST2 returns to normal, then reestablish the zero reference by RTZ command. */ /* Step 13 */ Command_Gauge(0x40,0x00); /* Send position to Gauge 0 */ /* Return the pointers close to zero position */ Command_Gauge(0x40,0x18); /* Send position to Gauge 0 */ /* Move the pointer at least 24 microsteps CW to the nearest full step */ /* Step 14 */ Command_Gauge(0x60,0x00); /* Send position to Gauge 1 */ /* Return the pointers close to zero position */ Command_Gauge(0x60,0x18); /* Send position to Gauge 1 */ /* Move the pointer at least 24 microsteps CW to the nearest full step */ /* Check SO bit ST4 to see if Gauge 0 has moved */ If((status & 0x10) != 0) /* If ST4 is logic 1 then Gauge 0 has moved to the first microstep */ Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

/*S t e p1 5*/ Command_Gauge(0x10,0x00); /* Null Read to get status */ /* Check SO bit ST4 to see if Gauge 0 has moved */ If((status & 0x10) != 0) /* If it has moved, then keep track of position */ /* Wait until 24 steps are finished then send a RTZ command (Step 17) */ /* Step 16 */ Command_Gauge(0x80,0x02); /* Send RTZ to Gauge 0 */ /* Step 17 */ Command_Gauge(0x10,0x00); /* Null Read to get status */ /* Read Status until RTZ is done */ While ((status & 0x04) != 0) {Command_Gauge(0x10,0x00);} /* Step 18 */ Command_Gauge(0x80,0x03); /* Send RTZ to Gauge 1 */ /* Step 19 */ Command_Gauge(0x10,0x00); /* Null Read to get status */ /* Read Status until RTZ is done */ While ((status & 0x08) != 0) {Command_Gauge(0x01,0x00);} /* Step 20 */ Command_Gauge(0x00,0x00); /* Disable Gauges and go into Standby */ /* Put device to sleep by setting RSTB to logic 0 */ void Command_Gauge(char MSB, char LSB) /*This subroutine sends the GDIC commands on the SPI port */ PORTS = 0x00; /* Chip select low (active) */ SP0DR = MSB; /* send first byte of gauge command */ While ((SP0SR & 0x80) == 0); /* wait for Rxflag (first byte) */ RTZdata = SP0DR; /* Read status MSB */ SP0DR = LSB; /* send second byte of command */ While ((SP0SR & 0x80) == 0); /* wait for Rxflag (second byte) */ status = SP0DR; /* read status LSB */ PORTS = 0x04; /* Chip select high (deactivated) */ /* Motorola Semiconductor Products Sector */ /* October 4, 2002 */ Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33991 PACKAGE DRAWING NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOW ABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION -A- -B- P12X D24X 1324 M0.010 (0.25) B M SAM0.010 (0.25) B ST -T- G22X SEATING PLANE K C R X4 5° M F J DIM MILLIMETERS INCHES MIN MAX MIN MAX A 15.25 15.54 0.601 0.612 B 7.40 7.60 0.292 0.299 C 2.35 2.65 0.093 0.104 D 0.35 0.49 0.014 0.019 F 0.41 0.90 0.016 0.035 G 1.27 BSC 0.050 BSC J 0.23 0.32 0.009 0.013 K 0.13 0.29 0.005 0.011 M 0° 8° 0° 8° P 10.05 10.55 0.395 0.415 R 0.25 0.75 0.010 0.029 DW SUFFIX PLASTIC PACKAGE CASE 751E-04 SOICW Issue E Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

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