PBSS4032SPN NXP | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 20
Technical content
1.1 General description
medium power Surface-Mounted Device (SMD) plastic package.
1.2 Features and benefits
1.3 Applications
1.4 Quick reference data
30 V NPN/PNP low VCEsat (BISS) transistor
Table 1. Product overview Table 2. Quick reference data
Table 2. Quick reference data …continued Table 3. Pinning Table 4. Ordering information Table 5. Marking codes
[1] Device mounted on an FR4 PCB, single-si ded copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper , tin-plated, mounting pad for collector 1 cm2. [3] Device mounted on a ceramic PCB, Al 2O3, standard footprint. Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
[1] Device mounted on an FR4 PCB, single-si ded copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper , tin-plated, mounting pad for collector 1 cm2. [3] Device mounted on a ceramic PCB, Al 2O3, standard footprint. Table 7. Thermal characteristics
Product data sheet Rev. 1 — 14 July 2010 5 of 20 NXP Semiconductors PBSS4032SPN FR4 PCB, standard footprint Fig 2. Per transistor: Transient therma l impedance from junction to ambient as a function of pulse duration; typical values FR4 PCB, mounting pad for collector 1 cm2 Fig 3. Per transistor: Transient therma l impedance from junction to ambient as a function of pulse duration; typical values 006aac303 102 103 Zth(j-a) (K/W) 10−1 10−5 1010−210−4 10210−1 tp (s) 10−3 1031 duty cycle = 1 0.01 0.02 0.05 0.1 0.2 0.33 0.5 0.75 006aac304 102 103 Zth(j-a) (K/W) 10−1 10−5 1010−210−4 10210−1 tp (s) 10−3 1031 duty cycle = 1 0.01 0.02 0.05 0.1 0.2 0.33 0.5 0.75
Product data sheet Rev. 1 — 14 July 2010 6 of 20 NXP Semiconductors PBSS4032SPN Ceramic PCB, Al2O3, standard footprint Fig 4. Per transistor: Transient therma l impedance from junction to ambient as a function of pulse duration; typical values 006aac305 10−5 1010−210−4 10210−1 tp (s) 10−3 1031 102 Zth(j-a) (K/W) 10−1 duty cycle = 1 0.010.02 0.05 0.1 0.2 0.33 0.5 0.75
Table 8. Characteristics Tamb =2 5 °C unless otherwise specified.
Table 8. Characteristics …continued Tamb =2 5 °C unless otherwise specified.
Product data sheet Rev. 1 — 14 July 2010 9 of 20 NXP Semiconductors PBSS4032SPN VCE =2V (1) T amb = 100 °C (2) T amb =2 5 °C (3) T amb = −55 °C Tamb =2 5 °C Fig 5. TR1 (NPN): DC current gain as a function of collector current; typical values Fig 6. TR1 (NPN): Collector cu rrent as a function of collector-emitter voltage; typical values VCE =2V (1) T amb = −55 °C (2) T amb =2 5 °C (3) T amb = 100 °C IC/IB =2 0 (1) T amb = −55 °C (2) T amb =2 5 °C (3) T amb = 100 °C Fig 7. TR1 (NPN): Base-emitte r voltage as a function of collector current; typical values Fig 8. TR1 (NPN): Base-emitter saturation voltage as a function of collector current; typical values 006aac306 400 600 200 800 1000 hFE IC (mA) 10−1 10410311 0 210 (1) (2) (3) VCE (V) 006aac307 4.0 8.0 12.0 IC (A) 0.0 IB (mA) = 70 006aac308 0.4 0.8 1.2 V BE (V) 0.0 IC (mA) 10−1 10410311 0 210 (1) (2) (3) 006aac309 0.6 0.8 0.4 1.0 1.2 VBEsat (V) 0.2 IC (mA) 10−1 10410311 0 210 (1) (2) (3)
Product data sheet Rev. 1 — 14 July 2010 10 of 20 NXP Semiconductors PBSS4032SPN IC/IB =2 0 (1) T amb = 100 °C (2) T amb =2 5 °C (3) T amb = −55 °C Tamb =2 5 °C (1) I C/IB = 100 (2) I C/IB =5 0 (3) I C/IB =1 0 Fig 9. TR1 (NPN): Collec tor-emitter saturation voltage as a function of collector current; typical values Fig 10. TR1 (NPN): Collector-emitter saturation voltage as a function of collector current; typical values IC/IB =2 0 (1) T amb = 100 °C (2) T amb =2 5 °C (3) T amb = −55 °C Tamb =2 5 °C (1) I C/IB = 100 (2) I C/IB =5 0 (3) I C/IB =1 0 Fig 11. TR1 (NPN): Collec tor-emitter saturation resistance as a function of collector current; typical values Fig 12. TR1 (NPN): Collector-emitter saturation resistance as a function of collector current; typical values 006aac310 IC (mA) 10−1 10410311 0 210 10−1 VCEsat (V) 10−2 (1) (2) (3) 006aac311 IC (mA) 10−1 10410311 0 210 10−1 VCEsat (V) 10−2 (1) (3) (2) IC (mA) 10−1 10410311 0 210 006aac312 10−1 102 103 RCEsat (Ω) 10−2 (3) (1) (2) IC (mA) 10−1 10410311 0 210 006aac313 10−1 102 103 RCEsat (Ω) 10−2 (3) (1) (2)
Product data sheet Rev. 1 — 14 July 2010 11 of 20 NXP Semiconductors PBSS4032SPN VCE = −2V (1) T amb = 100 °C (2) T amb =2 5 °C (3) T amb = −55 °C Tamb =2 5 °C Fig 13. TR2 (PNP): DC current gain as a function of collector current; typical values Fig 14. TR2 (PNP): Collector current as a function of collector-emitter voltage; typical values VCE = −2V (1) T amb = −55 °C (2) T amb =2 5 °C (3) T amb = 100 °C IC/IB =2 0 (1) T amb = −55 °C (2) T amb =2 5 °C (3) T amb = 100 °C Fig 15. TR2 (PNP): Base-emitter voltage as a function of collector current; typical values Fig 16. TR2 (PNP): Base-emitter saturation voltage as a function of collector current; typical values 006aac314 400 200 600 800 hFE IC (mA) (1) (3) (2) VCE (V) 006aac315 −4.0 −8.0 −12.0 IC (A) 0.0 IB (mA) = −600 −60 −540 −420−480 −360 −300 −240 −180 −120 006aac316 −0.6 −1.0 −1.4 VBE (V) −0.2 IC (mA) (1) (3) (2) 006aac317 −0.6 −1.0 −1.4 VBEsat (V) −0.2 IC (mA) (1) (3) (2)
Product data sheet Rev. 1 — 14 July 2010 12 of 20 NXP Semiconductors PBSS4032SPN IC/IB =2 0 (1) T amb = 100 °C (2) T amb =2 5 °C (3) T amb = −55 °C Tamb =2 5 °C (1) I C/IB = 100 (2) I C/IB =5 0 (3) I C/IB =1 0 Fig 17. TR2 (PNP): Collec tor-emitter saturation voltage as a function of collector current; typical values Fig 18. TR2 (PNP): Collecto r-emitter saturation voltage as a function of collector current; typical values IC/IB =2 0 (1) T amb = 100 °C (2) T amb =2 5 °C (3) T amb = −55 °C Tamb =2 5 °C (1) I C/IB = 100 (2) I C/IB =5 0 (3) I C/IB =1 0 Fig 19. TR2 (PNP): Collec tor-emitter saturation resistance as a function of collector current; typical values Fig 20. TR2 (PNP): Collecto r-emitter saturation resistance as a function of collector current; typical values 006aac318 IC (mA) −10−1 VCEsat (V) −10−2 (1) (3) (2) 006aac319 IC (mA) −10−1 VCEsat (V) −10−2 (1) (3) (2) IC (mA) 006aac320 10−1 102 103 RCEsat (Ω) 10−2 (3) (1) (2) IC (mA) 006aac321 10−1 102 103 RCEsat (Ω) 10−2 (3) (1) (2)
Product data sheet Rev. 1 — 14 July 2010 13 of 20 NXP Semiconductors PBSS4032SPN
- Test information Fig 21. TR1 (NPN): BISS transist or switching time definition VCC = 12.5 V; IC =1A ; IBon = 0.05 A; IBoff = −0.05 A Fig 22. TR1 (NPN): Test circuit for switching times 006aaa003 IBon (100 %) IB input pulse (idealized waveform) IBoff 90 % 10 % IC (100 %) IC td ton 90 % 10 % tr output pulse (idealized waveform) tf t ts toff RC DUT mlb826 Vo RB (probe) 450 Ω (probe) 450 Ωoscilloscope oscilloscope VBB VI VCC
Product data sheet Rev. 1 — 14 July 2010 14 of 20 NXP Semiconductors PBSS4032SPN Fig 23. TR2 (PNP): BISS transist or switching time definition VCC = −12.5 V; IC = −1A ; IBon = −0.05 A; IBoff =0 . 0 5A Fig 24. TR2 (PNP): Test circuit for switching times 006aaa266 −IBon (100 %) −IB input pulse (idealized waveform) −IBoff 90 % 10 % −IC (100 %) −IC td ton 90 % 10 % tr output pulse (idealized waveform) tf t ts toff RC DUT mgd624 Vo RB (probe) 450 Ω (probe) 450 Ωoscilloscope oscilloscope VBB VI VCC
[1] For further information and the avai lability of packing methods, see Section 14. Table 9. Packing methods
Product data sheet Rev. 1 — 14 July 2010 16 of 20 NXP Semiconductors PBSS4032SPN
- Soldering Fig 26. Reflow soldering footprint SOT96-1 (SO8) Fig 27. Wave soldering footprint SOT96-1 (SO8) sot096-1_froccupied area solder lands Dimensions in mmplacement accuracy ± 0.25 1.30 0.60 (8×) 1.27 (6×) 4.00 6.60 5.50 7.00 sot096-1_fw solder resist occupied area solder lands Dimensions in mm board direction placement accurracy ± 0.25 4.00 5.50 1.30 0.3 (2×)0.60 (6×) 1.20 (2×) 1.27 (6×) 7.006.60 enlarged solder land
Table 10. Revision history
Product data sheet Rev. 1 — 14 July 2010 18 of 20 NXP Semiconductors PBSS4032SPN
- Legal information
13.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
13.3 Disclaimers
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This docu ment contains the product specification.
Product data sheet Rev. 1 — 14 July 2010 19 of 20 NXP Semiconductors PBSS4032SPN Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors PBSS4032SPN © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 14 July 2010 Document identifier: PBSS4032SPN Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 15. Contents