PA3212L-N24-T

PA3212_15 UTC | Alldatasheet

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UNISONIC TECHNOLOGIES CO., LTD PA3212 CMOS IC www.unisonic.com.tw 1 of 9 Copyright © 2009 Unisonic Technologies Co., Ltd QW-R502-310.A 2.6W STEREO AUDIO AMPLIFIER WITH FOUR SELECTABLE GAIN SETTINGS AND MUX CONTROL „ DESCRIPTION As operating on a single 5V supply, the UTC PA3212 is capable of delivering 2.6W of output power per channel into 3 Ω loads. In Bridge-Tied Load (BTL) mode the UTC PA3212 has less than 1% THD+N, and it also has less than 0.65% THD+N across its specified frequency range when driving 1 W into 8-Ω speakers. Way of two terminals (GAIN0 and GAIN1) can configure and control the amplifier gain. It also provides BTL gain settings of 2, 6, 12 and 24 V/V. Other features included that the SHDN mode is provided to disable UTC PA3212 for the low current consumption applications and the current consumption can be reduced to typically 150µA. „ FEATURES * Output power at 0.65% THD+N, VDD=5V(TYP) –2.6W/CH (typical) into a 3Ω load –1.0W/CH (typical) into a 8Ω load * Bridge-tied load (BTL) supported * Gain control internally * Differential Input fully * Depop circuitry Inside * Shutdown protection * Stereo input Lead-free: PA3212L Halogen-free: PA3212G „ ORDERING INFORMATION Ordering Number Normal Lead Free Halogen Free Package Packing PA3212-N24-R PA3212L-N24-R PA3212G-N24-R HTSSOP-24 Tape Reel PA3212-N24-T PA3212L-N24-T PA3212G-N24-T HTSSOP-24 Tube

UNISONIC TECHNOLOGIES CO., LTD 2 of 9 www.unisonic.com.tw Q W - R 5 0 2 - 3 1 0 . A „ PIN CONFIGURATION „ PIN DESCRIPTION PIN NO. PIN NAME I/O DESCRIPTION 1,12,13,24 GND Ground.

11 BYPASS Connected to voltage divider

2 GAIN0 I For gain control: Bit 0

3 GAIN1 I For gain control: Bit 1

5 LLINEIN I Line input for Left channel, available when pin15 is held low. 6 LHPIN I Headphone input Left channel, available when pin15 is held high. 7,18 PV DD I Power supply voltage. 8 RIN I Differential input for right channel. And for single-ended inputs is also AC ground. 10 LIN I Differential input for Left channel. And for single-ended inputs is also AC ground. 14 PC-BEEP I PC-BEEP mode input. When at least eight continuous >1-VPP square waves is input to this pin, PC-BEEP is enabled. 17 HP/ LINE I Input of MUX control. Being high to select the inputs of Pin6, 20, and low to select inputs of PIN 5, 23. 15 SE/ BTL I Low for BTL mode, high for SE mode.

19 V DD I Analog V DD supply voltage

20 RHPIN I Right channel headphone input, selected when pin17 is held high. 23 RLINEIN I Headphone input right channel, available when pin17 is held low. 22 SHUTDOWN I In shutdown mode when held low, expect PC-BEEP remains active.

4 L OUT+ O In BTL mode: left channel + output; In SE mode: left channel + output

9 L OUT- O In BTL mode: left channel - output; In SE mode: high impedance

16 R OUT- O In BTL mode: right channel + output; In SE mode: right channel + output

21 R OUT+ O In BTL mode: right channel - output; In SE mode: high impedance

UNISONIC TECHNOLOGIES CO., LTD 3 of 9 www.unisonic.com.tw Q W - R 5 0 2 - 3 1 0 . A „ BLOCK DIAGRAM R MUX Volume Control PC Beep MUX Control L MUX Depop Circuitry Power Management Volume Control Volume Control Volume Control RHPIN RLINEIN GAIN0 GAIN1 RIN PC-BEEP SE/BEL HP/LINE LHPIN LLINEIN LIN ROUT+ ROUT– PVDD VDD BYPASS SHUTDOWN GND LOUT+ LOUT–

UNISONIC TECHNOLOGIES CO., LTD 4 of 9 www.unisonic.com.tw Q W - R 5 0 2 - 3 1 0 . A „ ABSOLUTE MAXIMUM RATING PARAMETER SYMBOL RATINGS UNIT Supply Voltage V DD 6 V Input Voltage V IN -0.3 ~ V DD ~ +0.3 V Junction Temperature T J +150 ° С Operating Temperature T OPR -40 ~ +85 ° С Storage Temperature T STG -65 ~ +85 ° С Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. „ ELECTRICAL CHARACTERISTICS (Ta= 25°С, unless otherwise specified.) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT DC ELECTRICAL CHARACTERISTICS Supply Voltage V DD 4.5 5 5.5 V SHUTDOWN 2 V High-Level Input voltage V IH SE/BTL, HP/LINE, GAIN0, GAIN1 0.8×VDD V SHUTDOWN 0.8 V GAIN0, GAIN1 0.4×VDD V Low-Level Input voltage V IL SE/ BTL , HP/ LINE 0.6×VDD V DC Differential Output Voltage V OUT(DIFF) VIN=0V,Gain=2V/V 25 mV BTL Mode 6 8 mASupply Current in Mute Mode I DD SE Mode 3 4 mA Supply Current, Shutdown Mode I DD(SD) V DD=5V 150 300 µA High-Level Input Current |I IH| V DD=5.5V, VIN=VDD 900 nA Low-Level Input Current |I IL| V DD=5.5V, VIN=0V 900 nA Operating Free-Air Temperature T a -40 85 ° С AC ELECTRICAL CHARACTERISTICS (VDD = 5.0V, RL = 8Ω, unless otherwise noted ) THD=1%, BTL, RL=3Ω, G=2V/V 2.05 W Output Power P OUT THD=10%, BTL, RL=3Ω, G=2V/V 2.6 Total Harmonic Distortion Plus Noise THD+N 0.65 % Max Output Power Bandwidth B OM POUT=1W, BTL, RL= 8Ω, G=2V/V THD= 5% 15 kHz Power Supply Ripple Rejection PSRR f=1kHz, BTL, G=2V/V, CBYP=0.47µF 72 dB CBYP=0.47µF,BTL, G=2V/V 20 µV RMS Output Noise Voltage eN CBYP=0.47µF, SE, G=2V/V 18 µV RMS Signal-to-Noise Ratio SNR 105 dB Note: Output power is measured at the output terminals of the IC at 1kHz.

UNISONIC TECHNOLOGIES CO., LTD 5 of 9 www.unisonic.com.tw Q W - R 5 0 2 - 3 1 0 . A „ TYPICAL APPLICATION CIRCUITS

UNISONIC TECHNOLOGIES CO., LTD 6 of 9 www.unisonic.com.tw Q W - R 5 0 2 - 3 1 0 . A „ TYPICAL APPLICATION CIRCUITS(Cont.)

UNISONIC TECHNOLOGIES CO., LTD 7 of 9 www.unisonic.com.tw Q W - R 5 0 2 - 3 1 0 . A „ APPLICATION INFORMATION Shutdown Mode Operating INPUT AMPLIFIER HP/ LINE SE/ BTL SHUTDOWN INPUT OUTPUT X X L X MUTE L L H LINE BTL L H H LINE SE H L H HEADPHONE BTL H H H HEADPHONE SE X: Don’t care L: Low H: High CI (Input Capacitor) The value of CI is important to consider as it directly affects the bass performance of the application circuit. When CI is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation, it’s value can be calculate by this equation: C I=1/(2πRIFC) RI: Input Impedance FC: High-pass Filter’s Frequency The low leakage tantalum or ceramic capacitors are suggested to be used as the input coupling capacitors, because of the small leakage current of the input capacitors will cause the dc offset voltage at the input to the amplifier that reduces the operation headroom, especially at the high gain applications. It is important to let the positive side connecting to the higher dc level of the application when using the polarized capacitors. Gain setting (VS Gain0, Gain1 and R Gain setting is determined by GAIN0 and GAIN1. The gains listed in the next table are realized by changing the taps on the input resistors inside the amplifier which will cause the internal input impedance(R I) to be dependent on the gain setting as we can see listed in the next table. GAIN0 GAIN1 R I(kΩ) A V(V/V) SE/ BTL 0 0 91 2 0 0 1 45.5 6 0 1 0 26 12 0 1 1 14 24 0 X X 1 1

UNISONIC TECHNOLOGIES CO., LTD 8 of 9 www.unisonic.com.tw Q W - R 5 0 2 - 3 1 0 . A „ TYPICAL CHARACTERISTICS PC-Beep Input Voltage(mV) Negative Output Voltage(mV) Positive Output Voltage(mV) Left Channel Output Voltage(V) Right Channel Output Voltage(V) Left Channel Output Voltage(V) Right Channel Output Voltage(V) Left Channel Output Voltage(V) Right Channel Output Voltage(V) Left Channel Output Voltage(V) Right Channel Output Voltage(V) Gain(dB) Phase(°)

UNISONIC TECHNOLOGIES CO., LTD 9 of 9 www.unisonic.com.tw Q W - R 5 0 2 - 3 1 0 . A UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.