P8006EVG ETC2 | Alldatasheet

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P-Channel Logic Level Enhancement Mode Field Effect Transistor P8006EVG SOP-8 Lead-Free NIKO-SEM SEP-30-2004 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS Drain-Source Voltage V DS -55 V Gate-Source Voltage V GS ±20 V TC = 25 °C -4.5 Continuous Drain Current TC = 70 °C ID -3.5 Pulsed Drain Current1 I DM -20 A TC = 25 °C 2.5 Power Dissipation TC = 70 °C PD 1.3 W Operating Junction & Storage Temperature Range T j, Tstg -55 to 150 Lead Temperature (1/16” from case for 10 sec.) T L 275 THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNITS Junction-to-Ambient RθJA 50 °C / W 1Pulse width limited by maximum junction temperature. 2Duty cycle ≤ 1% ELECTRICAL CHARACTERISTICS (T C = 25 °C, Unless Otherwise Noted) LIMITS PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT STATIC Drain-Source Breakdown Voltage V (BR)DSS VGS = 0V, ID = -250µA -55 Gate Threshold Voltage V GS(th) VDS = VGS, ID = -250µA -1 -1.5 -2.5 V Gate-Body Leakage I GSS V DS = 0V, VGS = ±20V ±250 nA VDS = -44V, VGS = 0V 1 Zero Gate Voltage Drain Current I DSS VDS = -36V, VGS = 0V, TJ = 125 °C 10 µA On-State Drain Current1 I D(ON) V DS = -5V, VGS = -10V -20 A VGS = -4.5V, ID = -3.5A 90 150Drain-Source On-State Resistance1 RDS(ON) VGS = -10V, ID = -4.5A 60 80 mƸ Forward Transconductance1 g fs V DS = -10V, ID = -4.5A 9 S PRODUCT SUMMARY V(BR)DSS R DS(ON) I D -55V 80mƸ -4.5A G S D 4 : G A T E 5,6,7,8 :DRAIN 1,2,3 :SOURCE

P-Channel Logic Level Enhancement Mode Field Effect Transistor P8006EVG SOP-8 Lead-Free NIKO-SEM SEP-30-2004 DYNAMIC Input Capacitance C iss 760 Output Capacitance C oss 90 Reverse Transfer Capacitance C rss VGS = 0V, VDS = -30V, f = 1MHz pF Total Gate Charge2 Q g 15 Gate-Source Charge2 Q gs 2.5 Gate-Drain Charge2 Q gd VDS = 0.5V(BR)DSS, VGS = -10V, ID = -4.5A 3.0 nC Turn-On Delay Time2 t d(on) 7 14 Rise Time2 t r V DS = -20V, 10 20 Turn-Off Delay Time2 t d(off) ID ≅ -1A, VGS = -10V, RGS = 6Ƹ 19 34 Fall Time2 t f 12 22 nS SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C) Continuous Current I S -1.3 Pulsed Current3 I SM -2.6 A Forward Voltage1 V SD I F = IS, VGS = 0V -1 V Reverse Recovery Time t rr IF = -3.5 A, dlF/dt = 100A / µS 15.5 nS Reverse Recovery Charge Q rr 7.9 nC 1Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2Ĉ. 2Independent of operating temperature. 3Pulse width limited by maximum junction temperature. REMARK: THE PRODUCT MARKED WITH “P8006EVG”, DATE CODE or LOT # Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name.

P-Channel Logic Level Enhancement Mode Field Effect Transistor P8006EVG SOP-8 Lead-Free NIKO-SEM SEP-30-2004 TYPICAL PERFORMANCE CHARACTERISTICS Body Diode Forward Voltage Variation with Source Current and Temperature T = 125° C -V - Body Diode Forward Voltage(V) -Is - Reverse Drain Current(A) 0.001 0.01 0.1 0.4 SD 0.2 0.6 25° C V = 0V 100 A GS 1.00.8 1.2 -55° C 1.4

P-Channel Logic Level Enhancement Mode Field Effect Transistor P8006EVG SOP-8 Lead-Free NIKO-SEM SEP-30-2004

P-Channel Logic Level Enhancement Mode Field Effect Transistor P8006EVG SOP-8 Lead-Free NIKO-SEM SEP-30-2004 SOIC-8(D) MECHANICAL DATA mm mm Dimension Min. Typ. Max. Dimension Min. Typ. Max. C 5.8 6.0 6.2 J 0.22 D 0.38 0.445 0.51 K 0 ° 4 ° 8 ° E 1.27 L F 1.35 1.55 1.75 M G 0.1 0.175 0.25 N