P6N60FI

STP6N60FI STMICROELECTRONICS | Alldatasheet

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N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR n TYPICAL RDS(on) =1 Ω n AVALANCHE RUGGED TECHNOLOGY n 100% AVALANCHE TESTED n REPETITIVE AVALANCHE DATA AT 100 oC n APPLICATION ORIENTED CHARACTERIZATION

APPLICATIONS

n HIGH CURRENT, HIGH SPEED SWITCHING n SWITCH MODE POWER SUPPLIES (SMPS) n CHOPPER REGULATORS, CONVERTERS, MOTOR CONTROL, LIGHTING FOR INDUSTRIAL AND CONSUMER ENVIRONMENT INTERNAL SCHEMATIC DIAGRAM TYPE V DSS R DS(on) ID STP6N60FI 600 V < 1.2 Ω 3.8 A ISOWATT220 May 1993 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V DS Drain-source Voltage (VGS = 0) 600 V V DG R Drain- gate Voltage (RGS =2 0k Ω ) 600 V V GS Gate-source Voltage ± 20 V ID Drain Current (continuous) at Tc =2 5 oC3 . 8 A ID Drain Current (continuous) at Tc =1 0 0oC2 . 4 A IDM (•) Drain Current (pulsed) 24 A P tot Total Dissipation at Tc =2 5 oC4 0 W Derating Factor 0.32 W/ oC V ISO Insulation Withstand Voltage (DC) 2000 V Tstg Storage Temperature -65 to 150 oC Tj Max. Operating Junction Temperature 150 oC (•) Pulse width limited by safe operating area

Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose 3.12 62.5 0.5 300 oC/W oC/W oC/W oC AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max, δ <1 % ) E AS Single Pulse Avalanche Energy (starting Tj =2 5 oC, ID =I AR ,V DD =2 5V ) 370 mJ E AR Repetitive Avalanche Energy (pulse width limited by Tj max, δ <1 % ) 17 mJ IAR Avalanche Current, Repetitive or Not-Repetitive (Tc = 100 oC, pulse width limited by Tj max, δ <1 % ) 3.7 A ELECTRICAL CHARACTERISTICS (Tcase =2 5oC unless otherwise specified) OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID =2 5 0µAV GS = 0 600 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) V DS =M a xR a t i n g V DS = Max Rating x 0.8 Tc =1 2 5oC 250 1000 µA µA IGSS Gate-body Leakage Current (VDS =0 ) V GS = ± 20 V ± 100 nA ON (∗) Symbol Parameter Test Conditions Min. Typ. Max. Unit V GS (th) Gate Threshold Voltage VDS =V GS ID =2 5 0µ A2 3 4 V R DS(on) Static Drain-source On Resistance V GS =1 0 V ID =3A V GS =1 0 V ID =3A T c =1 0 0oC 11 . 2 2.4 Ω Ω ID(on) On State Drain Current VDS >I D(on) xR DS(on)max V GS =1 0V DYNAMIC Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (∗)F o r w a r d Transconductance V DS >I D(on) xR DS(on)max ID =3A 2 4 . 8 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS =2 5V f=1M H z V GS = 0 1150 160 1500 240 110 pF pF pF STP6N60FI

ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Time Rise Time V DD =3 0 0V I D =3A R G =5 0 Ω VGS =1 0V (see test circuit, figure 3) 140 175 ns ns (di/dt)on Turn-on Current Slope V DD =4 8 0V I D =6A R G =5 0 Ω VGS =1 0V (see test circuit, figure 5)

240 A/ µs

V DD = 480 V I D =6A V GS =1 0V 7 8 98 nC nC nC SWITCHING OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time V DD =4 8 0V I D =6A R G =5 0 Ω VGS =1 0V (see test circuit, figure 5) 100 145 125 180 ns ns ns SOURCE DRAIN DIODE Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) 3.8 A A V SD (∗) Forward On Voltage I SD =6A V GS =0 2 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD =6A d i / d t=1 0 0A /µs V DD = 100 V T j =1 5 0oC (see test circuit, figure 5) 750 13.5 ns µC A (∗) Pulsed: Pulse duration = 300µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance STP6N60FI

Static Drain-source On Resistance Output Characteristics Transconductance Gate Charge vs Gate-source Voltage STP6N60FI

Capacitance Variations Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Turn-on Current Slope Cross-over TimeTurn-off Drain-source Voltage Slope STP6N60FI

Switching Safe Operating Area Accidental Overload Area Source-drain Diode Forward Characteristics Fig. 1:Unclamped Inductive Load Test CircuitsFig. 2:Unclamped Inductive Waveforms STP6N60FI

Fig. 4:Gate Charge Test Circuit Fig. 5:Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 3:Switching Times Test Circuits For Resistive Load STP6N60FI

DIM. mm inch A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.4 0.7 0.015 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 0.385 0.417 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 3.66 Ø 3 3.2 0.118 0.126 A B D E H G Ø F 123 ISOWATT220 MECHANICAL DATA P011G STP6N60FI

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specificationsmentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronicsproducts are not authorized foruse ascritical componentsin life support devices or systems without express written approval of SGS-THOMSON Microelectonics.  1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A STP6N60FI