P2042A PULSECORE | Alldatasheet

Document overview

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Technical content

Features

  • FCC approved method of EMI attenuation.
  • Provides up to 15dB of EMI suppression.
  • Generates a low EMI spread spectrum clock of the input frequency.
  • Input frequency range: 30MHz to 110MHz.
  • Optimized for 32.5MHz, 54MHz, 65MHz and 108MHz pixel clock frequencies.
  • Internal loop filter minimizes external components and board space.
  • Eight selectable high spread ranges up to ± 1.9%.
  • SSON# control pin for spread spectrum enable and disable options.
  • Low cycle-to-cycle jitter.
  • 3.3V ± 0.3V operating range.
  • Low power CMOS design.
  • Supports most mobile graphic accelerator and LCD timing controller specifications.
  • Available in 8-pin SOIC and TSSOP Packages. Product Description The P2042A is a versatile spread spectrum frequency modulator designed specifically for digital flat panel applications. The P2042A reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of down stream clock and data dependent signals. The P2042A allows significant system cost savings by reducing the number of circuit board layers ferrite beads, shielding and other passive components that are traditionally required to pass EMI regulations. The P2042A uses the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary all digital method. The P2042A modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal’s bandwidth is called ‘spread spectrum clock generation’.

Applications

The P2042A is targeted towards digital flat panel applications for notebook PCs, palm-size PCs, office automation equipments and LCD monitors. Block Diagram VSS Frequency Divider Feedback Divider Modulation Phase Detector Loop Filter VCO Output Divider PLL VDD SSON# SR0 CP1 CP0 ModOUT CLKIN

rev 1.4 Notice: The information in this document is subject to change without notice. LCD Panel EMI Reduction IC 2 of 8 CP0 4 5 P2042A CLKIN CP1 VSS SSON# ModOUT SR0 VDD Pin Configuration Pin Description Pin# Pin Name Type Description 1 CLKIN I External reference frequency input. Con nect to externally generated reference signal. 2 CP0 I Digital logic input used to select charge pump current. This pin has an internal pull-up resistor. Refer Modulation Selection Table. 3 CP1 I Digital logic input used to select charge pump current. This pin has an internal pull-up resistor. Refer Modulation Selection Table. 4 VSS P Ground to entire chip. Connect to system ground.

5 SSON# I

Digital logic input used to enable Spread Spectrum function (Active LOW). Spread Spectrum function enabled when LOW, disabled when HIGH. This pin has an internal pull-low resistor. 6 ModOUT O Spread spectrum clock output. 7 SR0 I Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor.

8 VDD P Power supply for the entire chip

Spreading Range (±%) CP0 CP1 SR0 32.5MHz 54MHz 65MHz 81MHz 108MHz Modulation Rate (KHz) (FIN /40) * 62.49 KHz

rev 1.4 Notice: The information in this document is subject to change without notice. LCD Panel EMI Reduction IC 3 of 8 Spread Spectrum Selection The Modulation Selection Table defines the possible spread spectrum options. The optimal setting should minimize system EMI to the fullest without affecting system performance. The spreading is described as a perce ntage deviation of the center frequency. (Note: The center frequency is the frequency of the external reference input on CLKIN, pin1). For example, P2042A is designed for high-resolution, flat pane l applications and is able to s upport an XGA (1024 x 768) flat panel operating at 65MHz (FIN) clock speed. A spreading selection of CP0=0, CP1=1 and SR0=0 provides a percentage deviation of ±1.00% from F IN. This results in the frequency on ModOUT being swept from 65.65 to 64.35MHz at a modulation rate of 101.54KHz. Refer Modulation Selection Table . The example in the following illustration is a common EMI reduction method for a notebook LCD panel and has already been impl emented by most of the leading OEM and mobile graphic accelerator manufacturers. Application Schematic for Mobile LCD Graphics Controllers Modulated 65MHz signal with ±1.00% deviation and modulation rate of 101.54KHz. This signal is connected back to the spread spectrum input pin (SSIN) of the graphics accelerator. CLKIN CP0 CP1 VSS SR0 SSON# ModOUT VDD 65MHz from graphics accelerator +3.3V 0.1µF P2042A Digital control for the SS enable or disable

rev 1.4 Notice: The information in this document is subject to change without notice. LCD Panel EMI Reduction IC 4 of 8 Absolute Maximum Ratings Symbol Parameter Rating Unit VDD, VIN Voltage on any pin with respect to Ground -0.5 to +4.6 V TSTG Storage temperature -65 to +125 °C TA Operating temperature -40 to +85 °C Ts Max. Soldering Temperature (10 sec) 260 °C TJ Junction Temperature 150 °C TDV Static Discharge Voltage (As per JEDEC STD22- A114-B) 2 KV Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Symbol Parameter Min Typ Max Unit VIL Input low voltage VSS - 0.3 – 0.8 V VIH Input high voltage 2.0 – VDD + 0.3 V IIL Input low current (pull-up resistor on inputs CP0, CP1 and SR0) – – -35 µA IIH Input high current (pull-down resistor on input SSON#) – – 35 µA VOL Output low voltage (V DD = 3.3 V, IOL = 20 mA) – – 0.4 V VOH Output high voltage (V DD = 3.3 V, IOL = 20 mA) 2.5 – – V IDD Static supply current standby mode – 0.6 – mA ICC Dynamic supply current (3.3V and 10pF loading) 9 16 22 mA VDD Operating volta ge 3.0 3.3 3.6 V tON Power-up time (first locked cycle after power up) – 0.18 – mS ZOUT Clock output impedance – 50 – Ω Symbol Parameter Min Typ Max Unit fIN Input frequency 30 65 110 MHz fOUT Output frequency 30 65 110 MHz tJC Jitter (cycle to cycle) - - 360 pS tD Output duty cycle 45 50 55 % *tLH and tHL are measured into a capacitive load of 15pF

rev 1.4 Notice: The information in this document is subject to change without notice. LCD Panel EMI Reduction IC 5 of 8

Package Information

D E H D A2 A θ L C B e Dimensions Inches Millimeters Symbol Min Max Min Max A1 0.004 0.010 0.10 0.25 A 0.053 0.069 1.35 1.75 A2 0.049 0.059 1.25 1.50 B 0.012 0.020 0.31 0.51 C 0.007 0.010 0.18 0.25 D 0.193 BSC 4.90 BSC E 0.154 BSC 3.91 BSC e 0.050 BSC 1.27 BSC H 0.236 BSC 6.00 BSC L 0.016 0.050 0.41 1.27 θ 0° 8° 0° 8°

rev 1.4 Notice: The information in this document is subject to change without notice. LCD Panel EMI Reduction IC 6 of 8 E H A D B C L θ e 8-lead TSSOP Dimensions Inches Millimeters Symbol Min Max Min Max A 0.043 1.10 A1 0.002 0.006 0.05 0.15 A2 0.033 0.037 0.85 0.95 B 0.008 0.012 0.19 0.30 c 0.004 0.008 0.09 0.20 D 0.114 0.122 2.90 3.10 E 0.169 0.177 4.30 4.50 e 0.026 BSC 0.65 BSC H 0.252 BSC 6.40 BSC L 0.020 0.028 0.50 0.70 θ 0° 8° 0° 8°

rev 1.4 Notice: The information in this document is subject to change without notice. LCD Panel EMI Reduction IC 7 of 8

Ordering Information

Part Number Marking Package Type Temperature P2042AF-08ST P2042AF 8-Pin SOIC, TUBE, Pb Free Commercial P2042AF-08SR P2042AF 8-Pin SOIC, TAPE & REEL, Pb Free Commercial P2042AF-08TT P2042AF 8-Pin TSSOP, TUBE, Pb Free Commercial P2042AF-08TR P2042AF 8-Pin TSSOP, TAPE & REEL, Pb Free Commercial P2042AG-08ST P2042AG 8-Pin SOIC, TUBE, Green Commercial P2042AG-08SR P2042AG 8-Pin SOIC, TAPE & REEL, Green Commercial P2042AG-08TT P2042AG 8-Pin TSSOP, TUBE, Green Commercial P2042AG-08TR P2042AG 8-Pin TSSOP, TAPE & REEL, Green Commercial I2042AF-08ST I2042AF 8-Pin SOIC, TUBE, Pb Free Industrial I2042AF-08SR I2042AF 8-Pin SOIC, TAPE & REEL, Pb Free Industrial I2042AF-08TT I2042AF 8-Pin TSSOP, TUBE, Pb Free Industrial I2042AF-08TR I2042AF 8-Pin TSSOP, TAPE & REEL, Pb Free Industrial I2042AG-08ST I2042AG 8-Pin SOIC, TUBE, Green Industrial I2042AG-08SR I2042AG 8-Pin SOIC, TAPE & REEL, Green Industrial I2042AG-08TT I2042AG 8-Pin TSSOP, TUBE, Green Industrial I2042AG-08TR I2042AG 8-Pin TSSOP, TAPE & REEL, Green Industrial Device Ordering Information P 2 0 4 2 A F - 8 ST DEVICE NUMBER P = Commercial Temperature Range (0°C to 70°C) I = Industrial Temperature Range (-40°C to 85°C) Pin Count Deviation (%) and Spread option Identifier F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE, LEAD FREE, and RoHS SR - SOIC, T/R TT – TSSOP, TUBE TR - TSSOP, T/R ST – SOIC, TUBE

rev 1.4 Notice: The information in this document is subject to change without notice. LCD Panel EMI Reduction IC 8 of 8 Licensed under U.S Patent Nos 5,488,627 and 5,631,921 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003 © Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents PulseCore’s best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is inte nded to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or us e of PulseCore products including liability or warranties relate d to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in PulseCore’s Terms and Conditions of Sale (which are avai lable from PulseCore). All sales of PulseCore products are made exclusively according to PulseCore’s Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products for use as critic al components in life-supporting systems where a malfunction or failure may reasonably be expected to re sult in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the manufacturer assu mes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use. PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com Copyright © PulseCore Semiconductor All Rights Reserved Preliminary Information Part Number: P2042A Document Version: v1.4