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Document overview

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Technical content

Features

  • FCC Approved Method of EMI Attenuation
  • Provides up to 20 dB of EMI Suppression
  • Generates a Low EMI Spread Spectrum Clock of the Input Frequency
  • Optimized for 10 MHz to 35 MHz Input Frequency Range
  • Internal Loop Filter Minimizes External Components and Board Space
  • 4 Selectable Spread Ranges
  • SSON Control Pin for Spread Spectrum Enable and Disable Options
  • Low Cycle−to−Cycle Jitter
  • Wide Operating Range (3 V to 5 V)
  • 16 mA Output Drives
  • TTL or CMOS Compatible Outputs
  • Low Power CMOS Design
  • Available in 8−pin SOIC and TSSOP Packages
  • These are Pb−Free Devices http://onsemi.com SOIC−8 S SUFFIX CASE 751BD PIN CONFIGURATION (Top View) See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.

ORDERING INFORMATION

TSSOP−8 T SUFFIX CASE 948AL P2010A

Figure 1. Block Diagram Table 1. ABSOLUTE MAXIMUM RATINGS Table 2. DC ELECTRICAL CHARACTERISTICS

Table 3. AC ELECTRICAL CHARACTERISTICS

  1. t LH and tHL are measured into a capacitive load of 15 pF.

Table 4. PIN DESCRIPTION 1 XIN / CLK I Connect to crystal or externally generated clock signal. 2 XOUT I Connect to crystal. No connect if externally generated clock signal is used. 3 FS0 I Digital logic input used to select Input Frequency Range (see Table 5). This pin has an internal pull−up resistor. 4 VSS P Ground Connection. Connect to system ground. function enable when low. This pin has an internal pull−low resistor. 6 ModOUT O Spread Spectrum Clock Output. 7 SR0 I Digital logic input used to select Spreading Range (see Table 5). This pin has an internal pull−up resistor. 8 VDD P Connect to +3.3 V or +5.0 V. Table 5. SPREAD RANGE SELECTION

Table 5 illustrates the possible spread spectrum options. reference input on XIN / CLK, Pin 1). manufacturers and their designs. Figure 2. P2010A Application Schematic for Flat−Bed Scanner

16 MHz Crystal Input

http://onsemi.com PACKAGE DIMENSIONS TSSOP8, 4.4x3 CASE 948AL−01 ISSUE O E1 E e b D cA TOP VIEW SIDE VIEW END VIEW /C01131 L Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. SYMBOL θ MIN NOM MAX A b c D E e 0º 8º L 0.05 0.80 0.19 0.09 0.50 2.90 6.30 4.30

0.65 BSC

1.00 REF

1.20 0.15 1.05 0.30 0.20 0.75 3.10 6.50 4.50 0.90 0.60 3.00 6.40 4.40

http://onsemi.com PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD−01 ISSUE O E1 E A h θ L c e b D PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. SYMBOL MIN NOM MAX θ A b c D E e h 0º 8º 0.10 0.33 0.19 0.25 4.80 5.80 3.80

1.27 BSC

1.75 0.25 0.51 0.25 0.50 5.00 6.20 4.00 L 0.40 1.27 1.35

Table 6. ORDERING INFORMATION arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.