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Technical content

Features

  • FCC Approved Method of EMI Attenuation
  • Provides up to 15 dB of EMI Suppression
  • Generates a 1X or 1/2X low EMI Spread Spectrum Clock of the Input Frequency
  • Input Frequency Range: 8 MHz to 32 MHz
  • Internal Loop Filter Minimizes External Components and Board Space
  • Frequency Deviation:
  • SSON# Control Pin for Spread Spectrum Enable and Disable Options
  • Low Cycle−to−Cycle Jitter
  • 3.3 V or 5 V Operating V oltage Range
  • Ultra−low Power CMOS Design
  • Available in 8−pin SOIC and TSSOP
  • These are Pb−Free Devices This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice. http://onsemi.com SOIC−8 S SUFFIX CASE 751BD PIN CONFIGURATION (Top View) See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.

ORDERING INFORMATION

SSON# SR0 XOUT DIV2 XIN / CLK VSS TSSOP−8 T SUFFIX CASE 948AL

Figure 1. Block Diagram Table 1. ABSOLUTE MAXIMUM RATINGS Table 2. DC ELECTRICAL CHARACTERISTICS

Table 3. AC ELECTRICAL CHARACTERISTICS

  1. t LH and tHL are measured into a capacitive load of 15 pF.

Table 4. PIN DESCRIPTION 1 XIN / CLK I Connect to crystal or clock. low, the output frequency is half the input clock frequency. This pin has an internal pull−up resistor. 4 VSS P Ground to entire chip. Connect to system ground.

5 SR0 I Digital logic input used to select Spreading Range Refer to Modulation Output and Spreading

Range Selection Table. This pin has an internal pull−up resistor. tion enabled when LOW, disabled when HIGH. This pin has an internal pull−low resistor. 7 ModOUT O Spread spectrum clock output. Table 5. OUTPUT FREQUENCY SELECTIONS Table 6. FREQUENCY DEVIATION SELECTIONS AS A FUNCTION OF INPUT FREQUENCY

DIV2=1 or leave it unconnected. Figure 2. P2005A/S Application Schematic

8.832 MHz Crystal

P2005A, P2005S http://onsemi.com PACKAGE DIMENSIONS TSSOP8, 4.4x3 CASE 948AL−01 ISSUE O E1 E e b D cA TOP VIEW SIDE VIEW END VIEW /C01131 L Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. SYMBOL θ MIN NOM MAX A b c D E e 0º 8º L 0.05 0.80 0.19 0.09 0.50 2.90 6.30 4.30

0.65 BSC

1.00 REF

1.20 0.15 1.05 0.30 0.20 0.75 3.10 6.50 4.50 0.90 0.60 3.00 6.40 4.40

P2005A, P2005S http://onsemi.com PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD−01 ISSUE O E1 E A h θ L c e b D PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. SYMBOL MIN NOM MAX θ A b c D E e h 0º 8º 0.10 0.33 0.19 0.25 4.80 5.80 3.80

1.27 BSC

1.75 0.25 0.51 0.25 0.50 5.00 6.20 4.00 L 0.40 1.27 1.35

Table 7. ORDERING INFORMATION (Note 2) arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.