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Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 7

Technical content

Features

  • Input Clock Frequency:

120 Hz − 240 Hz (External Reference Clock)

  • Output Clock Frequency:

60 Hz − 120 Hz

  • 4 Clock Outputs
  • 4 Two Level Controls to Select Sets of Clock Outputs
  • Output Buffer Drive Strength: 8 mA
  • Supply V oltage: 3.8 V − 5.5 V
  • Power Down for Power Save
  • 12−Lead 3mmx3mm WQFN Package
  • Operating Temperature Range: -40°C to +85°C
  • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant Application
  • P1P3800A can be used in applications where Phase Synchronization is needed. VDD GND CLKIN Digital Logic & Divider S [1:4] PD# CLKOUT [1:4]

Figure 1. Block Diagram dimensions section on page 6 of this data sheet.

ORDERING INFORMATION

A = Assembly Location L = Wafer Lot Y = Year W = Work Week /C0071= Pb−Free Package P1P 3800A ALYW/C0071 /C0071 12 11 10 CLKOUT2 GND V CLKOUT1 (Note: Microdot may be in either location) P1P3800A (Top−View) DD

Table 1. PIN DESCRIPTION 2 S1 I Output clock select. Refer Output Clock selection table. Has NO default state.

3 CLKIN I External Reference Clock Input

4 S3 I Output clock select. Refer Output Clock selection table. Has NO default state.

5 GND P Ground to entire chip

6 S4 I Output clock select. Refer Output Clock selection table. Has NO default state. when power down is enabled. Has NO default state.

11 VDD P Supply Voltage

Table 2. OUTPUT CLOCK SELECTION TABLE

http://onsemi.com CLKOUT Diagram LOWCLK#CLK TIMING Diagram For Glitch Free Operation (For Reference) (Transition of outputs from any state to any other state) S4=1, S3=1, S2=1, S1=0 Change Area S4=1, S3=1, S2=0, S1=1 Change Area S4=0, S3=0, S2=1, S1=1 PD# PD#=0 Latency Latency Input Clock CLKOUT1 CLKOUT2 CLKOUT3 CLKOUT4 Note: Transition to new state will happen after a latency of one output clock cycle after completing the present output clock cycle Transition to new state will happen after a latency of up to 3 input clock cycles excluding the input cycle where the transition has occured. Power Up VDD CLKOUT I/P CLK S1~S4 in any stable state Valid Clock according to S1~S4 10/C0109S(min) Note: Transition to new state will happen after a latency of up to 2 input clock cycles excluding the input cycle where the transition has occured.

http://onsemi.com PD# Operation Valid Clock according to S1~S4 10/C0109S(min) PD# I/P CLK S1~S4 in any stable state CLKOUT Note: Transition to new state will happen after a latency of up to 2 input clock cycles excluding the input cycle where the transition has occured.

Table 3. OPERATING CONDITIONS Table 4. ABSOLUTE MAXIMUM RATINGS Table 5. DC ELECTRICAL CHARACTERISTICS **Indicative value, not a recommended operating condition.

  1. Parameter is guaranteed by design and characterization. Not tested in production.

http://onsemi.com Table 6. AC ELECTRICAL CHARACTERISTICS

  1. All parameters are specified with 15 pF loaded output.

Part Number Package Shipping† P1P3800AG12CRTWG 12 pin (3 mm x 3 mm) WQFN 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

http://onsemi.com PACKAGE DIMENSIONS WQFN12 3x3, 0.5P CASE 510AH ISSUE O NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 MM FROM TERMINAL TIP . 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. ÇÇÇ ÇÇÇ ÇÇÇ AD E B C0.10 PIN ONE REFERENCE TOP VIEW SIDE VIEW BOTTOM VIEW L C C0.10 C0.10 C0.10 A1 SEATING PLANE e 12X NOTE 3 b12X 0.10 C 0.05 C A BB DIM MIN MAX MILLIMETERS A 0.65 0.85 A1 0.00 0.05 b 0.20 0.30 D 3.00 BSC D2 1.30 1.50 E 3.00 BSC E2 1.30 1.50 e 0.50 BSC K 0.20 −−− L 0.30 0.50 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT* 0.50 PITCH 1.50 3.30 K DIMENSIONS: MILLIMETERS 0.63 12X NOTE 4 0.30 12X DETAIL A A3 0.22 REF 13X ADETAIL B DETAIL A L ALTERNATE CONSTRUCTIONS ÉÉÇÇ ÇÇ L ÇÇÇÉÉÉ ÉÉÉ DETAIL B MOLD CMPDEXPOSED Cu ALTERNATE CONSTRUCTIONS L1 0.00 0.15 OUTLINE PACKAGE ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. P1P3800A/D PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative