P1727 ONSEMI | Alldatasheet

Document overview

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Technical content

Features

  • FCC approved method of EMI attenuation
  • Generates a low EMI spread spectrum of the input clock frequency
  • Optimized for frequency range: P1727X: 20MHz to 40MHz
  • Internal loop filter minimizes external components and board space
  • 8 different frequency deviations ranging from ±0.625% to –3.50%
  • Low inherent Cycle-to-cycle jitter
  • 3.3V Operating Voltage
  • Supports notebook VGA and other LCD timing controller applications
  • Available in 8-pin SOIC. Product Description The P1727 is a versatile spread spectrum frequency modulator designed specifically for a wide range of clock frequencies. The P1727 reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of down stream (clock and data dependent signals). The P1727 allows significant system cost savings by reducing the number of circuit board layers and shielding that are traditionally required to pass EMI regulations. The P1727 modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, thereby decreasing the peak amplitudes of its harmonics. This result in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most clock generators. Lowering EMI by increasing a signal’s bandwidth is called spread spectrum clock generation. The P1727 uses the most efficient and optimized modulation profile approved by the FCC and is implemented by using a proprietary all-digital method.

Applications

The P1727 is targeted towards notebook LCD displays, other displays using an LVDS interface, PC peripheral devices and embedded systems. Block Diagram CLKIN VSS Loop Filter Modulation VDD Frequency Divider Feedback Divider Phase Detector VCO PLL PDB Output Divider REFOUT ModOUT

Rev. 1 | Page 2 of 6 | www.onsemi.com Pin Configuration Table 1 – Power Down Selection PDB Spread Spectrum ModOUT PLL Mode

0 N/A Disabled Disabled Power Down

1 ON Normal Normal Normal

Table 2 – Frequency Deviation Selection P/ N Deviation P/N Deviation P1727A -1.25% P1727E ±0.625% P1727B -1.75% P1727F ±0.875% P1727C -2.50% P1727G ±1.25% P1727D -3.50% P1727H ±1.75% Pin Description Pin# Pin Name Type Description 1 CLKIN I External reference frequency input. Connect to externally generated reference signal. 2 VDD P Connect to +3.3V. 3 VSS P Ground Connection. Connect to system ground . 4 ModOUT O Spread Spectrum Clock output. 5 REFOUT O Reference output. 6 NC No connect. 7 NC No connect. 8 PDB I Powerdown Pin. Pull low to disable spread s pectrum clock output. NC REFOUT 4 5 P1727 VDD VSS ModOUT NC PDB CLKIN

Rev. 1 | Page 3 of 6 | www.onsemi.com Schematic for notebook VGA application Absolute Maximum Ratings Symbol Parameter Rating Unit VDD, V IN Voltage on any pin with respect to Ground -0.5 to +7 V TSTG Storage temperature -65 to +125 ° C Ts Max. Soldering Temperature (10 sec) 260 ° C TJ Junction Temperature 150 ° C TDV Static Discharge Voltage (As per JEDEC STD22- A114-B) 2 KV Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Operating Conditions Symbol Parameter Min Max Unit VDD Supply Voltage with respect to VSS 3.0 3.6 V TA Operating temperature -40 +85 ° C C L Load Capacitance 15 pF C IN Input Capacitance 7 pF VDD P1727 CLKIN VDD NC REFOUT VSS ModOUT NC 4 5

8 PDB

0.1 µF Tie low to enable Powerdown mode. 27MHz Pixel Clock input ModOut Clock Reference C lock O/P CLKIN

Rev. 1 | Page 4 of 6 | www.onsemi.com Symbol Parameter Min Typ Max Unit VIL Input Low voltage VSS – 0.3 0.8 V VIH Input High voltage 2.0 VDD +0.3 V IIL Input Low current -35 µA IIH Input High current 35 µA VOL Output Low current VDD = 3.3V, I OL = 20mA 0.4 V VOH Output High current VDD = 3.3V, I OH = 20mA 2.5 V IDD Static Supply Current (CLKIN, PDB pulled Low) 2 mA ICC Dynamic Supply Current (No Load) 14 18 mA VDD Operating Voltage 3.0 3.3 3.6 V tON Power up time (first locked clock cycle after power up) 0.18 mS ZOUT Clock Output impedance 50 Ω Symbol Parameter Min Typ Max Unit fIN Input Frequency: P1727X 20 40 MHz fOUT Output Frequency: P1727X 20 40 MHz tLH tHL tJC Jitter (Cycle-to-cycle) 225 325 pS tD Output Duty cycle 45 50 55 % Note: 1. tLH and t HL are measured with a capacitive load of 15pF.

Rev. 1 | Page 5 of 6 | www.onsemi.com

Package Information

8-lead (150-mil) SOIC Package D E H D A 1 A2 A θ L C B e Symbol Dimensions Inches Millimeters Min Max Min Max A1 0.004 0.010 0.10 0.25 A 0.053 0.069 1.35 1.75 A2 0.049 0.059 1.25 1.50 B 0.012 0.020 0.31 0.51 C 0.007 0.010 0.18 0.25 D 0.193 BSC 4.90 BSC E 0.154 BSC 3.91 BSC e 0.050 BSC 1.27 BSC H 0.236 BSC 6.00 BSC L 0.016 0.050 0.41 1.27 θ 0° 8° 0° 8°

Note: This product utilizes US Patent #6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. U.S Patent Pending; Timing-Safe and Active Bead are trademarks of PulseCore Semiconductor, a wholly owned subsidiary of ON Semiconductor. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative

Ordering Information

Part number Marking Package Configuration Temperature Range P1727AF-08SR ABW 8-PIN SOIC, TAPE & REEL, Green 0° C to +70° C A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free. Licensed under US patent #5,488,627, #6,646,463 and #5,631,920.