P1708C ONSEMI | Alldatasheet

Document overview

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Technical content

Features

  • FCC approved method of EMI attenuation.
  • Generates a low EMI spread spectrum clock of the input frequency.
  • Optimized for frequency range from 50 to 110MHz.
  • Internal loop filter minimizes external components and board space.
  • Four selectable spread ranges.
  • Low inherent cycle-to-cycle jitter.
  • 3.3V operating voltage range.
  • TTL or CMOS compatible inputs and outputs.
  • CMOS design. o 8.46mA @ 3.3V, 54MHz o 9.79mA @ 3.3V, 65MHz o 12.06mA @ 3.3V, 81MHz o 16.51mA @ 3.3V, 108MHz
  • Supports notebook VGA and other LCD timing controller applications.
  • Pinout compatible to ICS MK1708 and Cypress CY25560.
  • SSON / SBM pin for Spread Spectrum On/Off and Standby Mode controls.
  • Available in 8-pin SOIC and TSSOP. Product Description The P1708C is a versatile spread spectrum frequency modulator designed specifically for input clock frequencies. The P1708C reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of down stream clock and data dependent signals. The P1708C allows significant system cost savings by reducing the number of circuit board layers, ferrite beads, shielding, and other passive components that are traditionally required to pass EMI regulations. The P1708C modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This result in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal’s bandwidth is called ‘spread spectrum clock generation.’ The P1708C uses the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary all digital method.

Applications

The P1708C is targeted towards notebook LCD displays, and other displays using an LVDS interface, PC peripheral devices, and embedded systems. Block Diagram VSS CLKIN Feedback Divider Modulation Phase Detector Loop Filter VCO Output Divider ModOUT PLL VDD SSON SR0 SR1 Frequency Divider

Rev. 2 | Page 2 of 7 | www.onsemi.com SSON/SBM Pin Configuration Pin Description Pin# Pin Name Type Description

1 CLKIN I

Connect to externally generated clock signal. To put the part into standby mode, disable the input clock signal to this pin and pull SSON / SBM (pin 5) low. Refer to Standby Mode Selection Table. 2 VDD P Connect to +3.3V. 3 VSS P Ground Connection. Connect to system ground . 4 ModOUT O Spread spectrum clock output. 5 SSON / SBM I Spread Spectrum On/Off and standby mode control. Refer to Standby Mode Selection Table. This pin has an internal pull-up resistor. 6 SR1 I Digital logic input used to select Spreading Range. Refer to Spread Spectrum Selection Table. This pin has an internal pull-up resistor. 7 SR0 I Digital logic input used to select Spreading Range. Refer to Spread Spectrum Selection Table. This pin has an internal pull-up resistor. 8 NC - No connect. Standby Mode Selection CLKIN SSON / SBM Spread Spectrum ModOUT PLL Mode Disabled 0 N/A Disabled Disabled Standby Disabled 1 N/A Disabled Free Running Free Running Enabled 0 Off Reference Disabled Buffer out Enabled 1 On Normal Normal Normal 4 5 P1708C CLKIN VDD VSS ModOUT SR1 SR0 NC

Rev. 2 | Page 3 of 7 | www.onsemi.com Spread Range Selection SR1 SR0 Spreading Range Modulation Rate 0 0 ±1.00% (F IN /40) * 62.49KHz 0 1 ±2.00% (F IN /40) * 62.49KHz 1 0 ±0.25% (F IN /40) * 62.49KHz 1 1 ±0.75% (F IN /40) * 62.49KHz Schematic for Notebook VGA Application Note: To set the P1708C to standby mode, disable the input clock (pin 1 CLKIN) and pull SSON (pin 5) low. Refer to Standby Mode Selection Table. Absolute Maximum Ratings Symbol Parameter Rating Unit VDD, V IN Voltage on any pin with respect to Ground -0.5 to +7.0 V TSTG Storage temperature -65 to +125 ° C Ts Max. Soldering Temperature (10 sec) 260 ° C TJ Junction Temperature 150 ° C TDV Static Discharge Voltage (As per JEDEC STD22- A114-B) 2 KV Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Operating Conditions Parameter Description Min Max Unit VDD Supply Voltage 2.7 3.7 V TA Operating Temperature (Ambient Temperature) -40 +85 ° C C L Load Capacitance 15 pF C IN Input Capacitance 7 pF Pin 8 can be tied either high or low, or it can be left unconnected. Tie SR0 and SR1 high / low according to spread range desired. External resistors are not needed to pull these pins high. Pin 5 SSON should be left unconnected to turn on spread spectrum. Pull this pin low to turn spread spectrum OFF and enable stand-by mode. 50MHz to 110MHz pixel clock input from VGA chip. FB VDD 0.1µF CLKIN VDD VSS ModOUT SSON SR1 SR0 NC P1708C 50MHz to 110MHz Pixel Clock Input from VGA Chip.

Rev. 2 | Page 4 of 7 | www.onsemi.com Symbol Parameter Min Typ Max Unit VIL Input low voltage GND-0.3 0.8 V VIH Input high voltage 2.0 V DD +0.3 V IIL Input low current (pull-up resistors on inputs SR0, SR1 and SSON/SBM) -35 µA IIH Input high current 35 µA IXOL X OUT output low current @ 0.4V, V DD = 3.3V 3 mA IXOH X OUT output high current @ 2.5V, V DD = 3.3V 3 mA VOL Output low voltage V DD = 3.3V, I OL = 20mA 0.4 V VOH Output high voltage V DD = 3.3V, I OH = 20mA 2.5 V ICC Dynamic supply current normal mode 3.3V and 10pF loading 7.90 9.79 17.53 f IN -max mA IDD Static supply current standby mode 0.6 mA VDD Operating voltage 2.7 3.3 3.7 V tON Power up time (first locked clock cycle after power up) 0.18 mS ZOUT Clock output impedance 50 Ω Symbol Parameter Min Typ Max Unit fIN Input frequency 50 110 MHz fOUT Output frequency 50 110 MHz tLH

1 Output rise time

1 Output fall time

tJC Jitter (cycle-to-cycle) 360 ps tD Output duty cycle 45 50 55 % Note: 1. tLH and t HL are measured into a capacitive load of 15pF.

Rev. 2 | Page 5 of 7 | www.onsemi.com

Package Information

D E H D A 1 A2 A θ L C B e Symbol Dimensions Inches Millimeters Min Max Min Max A1 0.004 0.010 0.10 0.25 A 0.053 0.069 1.35 1.75 A2 0.049 0.059 1.25 1.50 B 0.012 0.020 0.31 0.51 C 0.007 0.010 0.18 0.25 D 0.193 BSC 4.90 BSC E 0.154 BSC 3.91 BSC e 0.050 BSC 1.27 BSC H 0.236 BSC 6.00 BSC L 0.016 0.050 0.41 1.27 θ 0° 8° 0° 8° Note: Controlling dimensions are millimeters. SOIC: 0.074 grams unit weight.

Rev. 2 | Page 6 of 7 | www.onsemi.com E H A D B C L θ e 8-Pin TSSOP Symbol Dimensions Inches Millimeters Min Max Min Max A 0.043 1.10 A1 0.002 0.006 0.05 0.15 A2 0.033 0.037 0.85 0.95 B 0.008 0.012 0.19 0.30 C 0.004 0.008 0.09 0.20 D 0.114 0.122 2.90 3.10 E 0.169 0.177 4.30 4.50 e 0.026 BSC 0.65 BSC H 0.252 BSC 6.40 BSC L 0.020 0.028 0.50 0.70 θ 0° 8° 0° 8°

Note: This product utilizes US Patent #6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. U.S Patent Pending; Timing-Safe and Active Bead are trademarks of PulseCore Semiconductor, a wholly owned subsidiary of ON Semiconductor. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative Ordering Codes Part number Marking Package Type Temperature P1708CF-08SR AAY 8-Pin SOIC, Tape and Reel, Pb Free 0° C to +70° C P1708CF-08TR AAY 8-Pin TSSOP, Tape and Reel, Pb Fre e 0° C to +70° C A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free Licensed under US Patent #5,488,627 and #5,631,921