P1708C ALSC | Alldatasheet
Document overview
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Technical content
Features
FCC approved method of EMI attenuation. Generates a low EMI spread spectrum clock of the input frequency. Optimized for frequency range from 50 to 110MHz. Internal loop filter minimizes external components and board space. Four selectable spread ranges. Low inherent cycle-to-cycle jitter. 3.3V operating voltage range. TTL or CMOS compatible inputs and outputs. Ultra-low power CMOS design. 8.46 mA @3.3V, 54MHz 9.79 mA @3.3V, 65MHz 12.06 mA @3.3V, 81MHz 16.51 mA @3.3V, 108MHz Supports notebook VGA and other LCD timing controller applications. Pinout compatible to ICS MK1708 and Cypress CY25560. SSON/SBM pin for Spread Spectrum On/Off and Standby Mode controls. Available in 8-pin SOIC and TSSOP. Product Description The P1708C is a versatile spread spectrum frequency modulator designed specifically for input clock frequencies. The P1708C reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of down stream clock and data dependent signals. The P1708C allows significant syst em cost savings by reducing the number of circuit board layers ferrite beads, shielding and other passive components that are traditionally required to pass EMI regulations. The P1708C modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal’s bandwidth is called ‘spread spectrum clock generation’. The P1708C uses the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary all digital method.
Applications
The P1708C is targeted towards notebook LCD displays, and other displays using an LVDS interface, PC peripheral devices, and embedded systems. Block Diagram VSS CLKIN Frequency Divider Feedback Divider Modulation Phase Detector Loop Filter VCO Output Divider ModOUT PLL VDD SSON SR0 SR1
rev 1.1 Low Power Notebook LCD Panel EMI Reduction IC 2 of 10 Notice: The information in this document is subject to change without notice. SSON/SBM 4 5 P1708C CLKIN VDD VSS ModOUT SR1 SR0 NC Pin Configuration Pin Description Pin# Pin Name Type Description
1 CLKIN I
Connect to externally generated clock signal. To put the part into standby mode, disable the input clock signal to this pin and pull SSON/SBM (pin 5) low. Refer Standby Mode Selection Table. 2 VDD P Connect to +3.3V. 3 VSS P Ground Connection. C onnect to system ground. 4 ModOUT O Spread spectrum clock output. 5 SSON/SBM I Spread Spectrum On/Off and standby mode control. Refer Standby Mode Selection Table. This pin has an internal pull-up resistor. 6 SR1 I Digital logic input used to select Spreading Range. Refer Spread Spectrum Selection Table. This pin has an internal pull-up resistor. 7 SR0 I Digital logic input used to select Spreading Range. Refer Spread Spectrum Selection Table. This pin has an internal pull-up resistor. 8 NC - No connect.
rev 1.1 Low Power Notebook LCD Panel EMI Reduction IC 3 of 10 Notice: The information in this document is subject to change without notice. Standby Mode Selection CLKIN SSON/SBM Spread Spectrum ModOUT PLL Mode Disabled 0 N/A Disabled Disabled Standby Disabled 1 N/A Disabled Free Running Free Running Enabled 0 Off Reference Disabled Buffer out Enabled 1 On Normal Normal Normal Spread Range Selection SR1 SR0 Spreading Range Modulation Rate 0 0 ± 1.00% (F IN/40) * 62.49 KHz 0 1 ± 2.00% (F IN/40) * 62.49 KHz 1 0 ± 0.25% (F IN/40) * 62.49 KHz 1 1 ± 0.75% (F IN/40) * 62.49 KHz
rev 1.1 Low Power Notebook LCD Panel EMI Reduction IC 4 of 10 Notice: The information in this document is subject to change without notice. Schematic for Notebook VGA Application Note: To set the P1708C to standby mode, disable the input clock (pin 1 CLKIN) and pull SSON (pin 5) low. Refer Standby Mode Selection Table. Pin 8 can be tied either high or low, or it can be left unconnected. Tie SR0 and SR1 high/low according to spread range desired. External resistors are not needed to pull these pins high. Pin 5 SSON should be left unconnected to turn on spread spectrum. Pull this pin low to turn spread spectrum OFF and enable stand-by mode. 50MHz to 110MHz pixel clock input from VGA chip FB VDD 0.1µF CLKIN VDD VSS ModOUT SSON SR1 SR0 NC P1708C 50MHz – 110MHz Pixel Clock Input from VGA Chip
rev 1.1 Low Power Notebook LCD Panel EMI Reduction IC 5 of 10 Notice: The information in this document is subject to change without notice. Absolute Maximum Ratings Symbol Parameter Rating Unit VDD, VIN Voltage on any pin with respect to GND -0.5 to + 7.0 V TSTG Storage temperature -65 to +125 °C TA Operating temperature 0 to 70 °C Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. Symbol Parameter Min Typ Max Unit VIL Input low voltage GND – 0.3 - 0.8 V VIH Input high voltage 2.0 - V DD + 0.3 V IIL Input low current (pull-up resistors on inputs SR0, SR1 and SSON/SBM) - - -35 µA IIH Input high current - - 35 µA IXOL X OUT output low current @ 0.4V, VDD = 3.3V - 3 - mA IXOH X OUT output high current @ 2.5V, VDD = 3.3V - 3 - mA VOL Output low voltage V DD = 3.3V, IOL = 20mA - - 0.4 V VOH Output high voltage V DD = 3.3V, IOH = 20mA 2.5 - - V ICC Dynamic supply current normal mode 3.3V and 10pF loading 7.90 9.79 17.53 fIN -max mA IDD Static supply current standby mode - 0.6 - mA VDD Operating voltage 2.7 3.3 3.7 V tON Power up time (first locked cloc k cycle after power up) - 0.18 - mS ZOUT Clock output impedance - 50 - Ω
rev 1.1 Low Power Notebook LCD Panel EMI Reduction IC 6 of 10 Notice: The information in this document is subject to change without notice. Symbol Parameter Min Typ Max Unit fIN Input frequency 50 - 110 MHz fOUT Output frequency 50 - 110 MHz tLH* Output rise time tHL* Output fall time tJC Jitter (cycle to cycle) - - 360 ps tD Output duty cycle 45 50 55 % *tLH and tHL are measured into a capacitive load of 15pF
rev 1.1 Low Power Notebook LCD Panel EMI Reduction IC 7 of 10 Notice: The information in this document is subject to change without notice. D E H D A2 A θ L C B e
Package Information
Mechanical Package Outline 8-Pin SOIC Symbol Dimensions in inches Dimensions in millimeters Min Max Min Max A 0.057 0.071 1.45 1.80 A1 0.004 0.010 0.10 0.25 A2 0.053 0.069 1.35 1.75 B 0.012 0.020 0.31 0.51 C 0.004 0.01 0.10 0.25 D 0.186 0.202 4.72 5.12 E 0.148 0.164 3.75 4.15 e 0.050 BSC 1.27 BSC H 0.224 0.248 5.70 6.30 L 0.012 0.028 0.30 0.70 θ 0° 8° 0° 8° Note: Controlling dimensions are millimeters SOIC – 0.074 grams unit weight
rev 1.1 Low Power Notebook LCD Panel EMI Reduction IC 8 of 10 Notice: The information in this document is subject to change without notice. E H A D B C L θ e Mechanical Package Outline 8-Pin TSSOP Dimensions in inches Dimensions in millimeters Symbol Min Max Min Max A 0.047 1.10 A1 0.002 0.006 0.05 0.15 A2 0.031 0.041 0.80 1.05 B 0.007 0.012 0.19 0.30 C 0.004 0.008 0.09 0.20 D 0.114 0.122 2.90 3.10 E 0.169 0.177 4.30 4.50 e 0.026 BSC 0.65 BSC H 0.244 0.260 6.20 6.60 L 0.018 0.030 0.45 0.75 θ 0° 8° 0° 8° Note: Controlling dimensions are millimeters TSSOP – 0.034 grams unit weight
rev 1.1 Low Power Notebook LCD Panel EMI Reduction IC 9 of 10 Notice: The information in this document is subject to change without notice. Ordering Codes Part Number Marking Package Type Qty per reel Temperature (°C) P1708C-08ST P1708C 8-pin SOIC, tube 0 to 70 P1708C-08SR P1708C 8-pin SOIC, tape & reel 2500 0 to 70 P1708C-08TT P1708C 8-pin TSSOP, tube 0 to 70 P1708C-08TR P1708C 8-pin TSSOP, tape and reel 2500 0 to 70 P1708CF-08ST P1708CF 8-pin SOIC, tube 0 to 70 P1708CF-08SR P1708CF 8-pin SOIC, tape & reel 2500 0 to 70 P1708CF-08TT P1708CF 8-pin TSSOP, tube 0 to 70 P1708CF-08TR P1708CF 8-pin TSSOP, tape and reel 2500 0 to 70 Device Ordering Information P1708CF-08XX Licensed under US patent #5,488,627, #6,646,463 and #5,631,920. OR - SOT23/T/R SR - SOIC, T/R TT – TSSOP, TUBE QR – QFN, T/R TR - TSSOP, T/R QT - QFN, TUBE VT – TVSOP, TUBE BT - BGA, TUBE VR – TVSOP, T/R BR – BGA, T/R ST – SOIC, TUBE DEVICE NUMBER Flow: P = Commercial Temperature Range (0°C to 70°C) I = Industrial Temperature Range (-25°C to 85°C) Pin Count Pb FREE
rev 1.1 Low Power Notebook LCD Panel EMI Reduction IC 10 of 10 Notice: The information in this document is subject to change without notice. © Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the right to make ch anges to this document and its products at any time without notice. Alliance assumes no responsibility for any errors t hat may appear in this document. The data contained herein represents Alliance's best data and/or estimate s at the time of issuance. Alliance rese rves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not in tended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility or lia bility arising out of the applic ation or use of any product described herein, and disclaims any express or implied warrant ies related to the sale and/or use of Alliance products including liability or warranties related to fitness for a particular purpose, mercha ntability, or infringement of any intellec tual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a license under any pa tent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of Alli ance or third parties. Alliance does not aut horize its products for use as critical components in life-supporting systems where a malfunction or fa ilure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. Alliance Semiconductor Corporation 2595, Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com Copyright © Alliance Semiconductor All Rights Reserved Preliminary Information Part Number: P1708C Document Version: v1.1 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003