NCP1216_16 ONSEMI | Alldatasheet
Document overview
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Technical content
Features
- No Auxiliary Winding Operation
- Current−Mode Control with Adjustable Skip−Cycle Capability
- Internal Ramp Compensation
- Limited Duty Cycle to 50% (NCP1216A Only)
- Internal 1.0 ms Soft−Start (NCP1216A Only)
- Built−In Frequency Jittering for Better EMI Signature
- Auto−Recovery Internal Output Short−Circuit Protection
- Extremely Low No−Load Standby Power
- 500 mA Peak Current Capability
- Fixed Frequency Versions at 65 kHz, 100 kHz, 133 kHz
- Internal Temperature Shutdown
- Direct Optocoupler Connection
- SPICE Models Available for TRANsient and AC Analysis
- Pin−to−Pin Compatible with NCP1200 Series
- These are Pb−Free and Halide−Free Devices Typical Applications
- High Power AC−DC Converters for TVs, Set−Top Boxes, etc.
- Offline Adapters for Notebooks
- Telecom DC−DC Converters
- All Power Supplies SOIC−8 D SUFFIX CASE 751 MARKING DIAGRAMS PDIP−7 P SUFFIX CASE 626B XXXXXXXXX AWL YYWWG XXXXXX = Specific Device Code A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or /C0071= Pb−Free Package PIN CONNECTIONS 1Adj 8 HV 2FB 3CS 4Gnd 7 NC
6 VCC
5 Drv
See detailed ordering and shipping information in the ordering information section on page 16 of this data sheet. DEVICE MARKING AND
ORDERING INFORMATION
www.onsemi.com XXXXX ALYW /C0071
Figure 1. Typical Application Example adjusted accordingly to the output power demand.
3 CS Current Sense Input This pin senses the primary current and routes it to the internal com-
control the amount of ramp compensation you need.
4 GND IC Ground −
5 Drv Driving Pulses The driver’s output to an external MOSFET. 6 VCC Supplies the IC This pin is connected to an external bulk capacitor of typically 22 /C0109F. 7 NC − This un−connected pin ensures adequate creepage distance. into the VCC bulk capacitor.
Figure 2. Internal Circuit Architecture
- Available for ”A” version only.
should not be assumed, damage may occur and reliability may be affected.
- This device series contains ESD protection rated using the following tests:
Human Body Model (HBM) 2000 V per JEDEC Standard JESD22, Method A114E. Machine Model (MM) 200 V per JEDEC Standard JESD22, Method A115A.
NCP1216, NCP1216A www.onsemi.com
ELECTRICAL CHARACTERISTICS
(For typical values TJ = 25°C, for min/max values TJ = −40°C to +125°C, Maximum TJ = 150°C, VCC = 11 V unless otherwise noted.) Characteristic Pin Symbol Min Typ Max Unit DYNAMIC SELF−SUPPLY VCC Increasing Level at which the Current Source Turns Off 6 VCCOFF 11.2 12.2 13.4 (Note 1) V VCC Decreasing Level at which the Current Source Turns On 6 VCCON 9.2 10.0 11.0 (Note 1) V VCC Decreasing Level at which the Latchoff Phase Ends 6 VCClatch 5.6 V Internal IC Consumption, Latchoff Phase, VCC = 6.0 V NCP1216 NCP1216A
6 ICC3 250
/C0109A Internal IC Consumption, No Output Load on Pin 5, FSW = 65 kHz 0°C ≤ TJ ≤ +125°C
6 ICC1
/C0109A Internal IC Consumption, No Output Load on Pin 5, FSW = 100 kHz 0°C ≤ TJ ≤ +125°C /C0109A Internal IC Consumption, No Output Load on Pin 5, FSW = 133 kHz 0°C ≤ TJ ≤ +125°C /C0109A Internal IC Consumption, 1.0 nF Output Load on Pin 5, FSW = 65 kHz 0°C ≤ TJ ≤ +125°C
6 ICC2
1.7 2.0 2.0 mA Internal IC Consumption, 1.0 nF Output Load on Pin 5, FSW = 100 kHz 0°C ≤ TJ ≤ +125°C 2.1 2.4 2.55 mA Internal IC Consumption, 1.0 nF Output Load on Pin 5, FSW = 133 kHz 0°C ≤ TJ ≤ +125°C 2.4 2.9 3.0 mA INTERNAL STARTUP CURRENT SOURCE (TJ > 0°C) High−voltage Current Source, VCC = 10 V 8 IC1 4.9 (Note 2) 8.0 11 mA High−voltage Current Source, VCC = 0 V 8 IC2 9.0 mA DRIVE OUTPUT Output Voltage Rise−time @ CL = 1.0 nF, 10−90% of a 12 V Output Signal 5 Tr 60 ns Output Voltage Fall−time @ CL = 1.0 nF, 10−90% of a 12 V Output Signal 5 Tf 20 ns Source Resistance 5 ROH 15 20 35 /C0087 Sink Resistance 5 ROL 5.0 10 18 /C0087 CURRENT COMPARATOR (Pin 5 Unloaded) Input Bias Current @ 1.0 V Input Level on Pin 3 3 IIB 0.02 /C0109A Maximum Internal Current Setpoint 3 ILimit 0.93 1.08 1.14 V Default Internal Current Setpoint for Skip Cycle Operation 3 ILskip 330 mV Propagation Delay from Current Detection to Gate OFF State 3 TDEL 80 130 ns Leading Edge Blanking Duration 3 TLEB 220 ns Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. VCCOFF and VCCON min−max always ensure an hysteresis of 2.0 V. 2. Minimum value for T J = 125°C.
NCP1216, NCP1216A www.onsemi.com ELECTRICAL CHARACTERISTICS (continued) (For typical values TJ = 25°C, for min/max values TJ = −40°C to +125°C, Maximum TJ = 150°C, VCC = 11 V unless otherwise noted.) Characteristic Pin Symbol Min Typ Max Unit INTERNAL OSCILLATOR (VCC = 11 V, Pin 5 Loaded by 1.0 k/C0087) Oscillation Frequency, 65 kHz Version 0°C ≤ TJ ≤ +125°C fOSC 58.5 71.5 kHz Oscillation Frequency, 100 kHz Version 0°C ≤ TJ ≤ +125°C fOSC 100 100 110 120 kHz Oscillation Frequency, 133 kHz Version 0°C ≤ TJ ≤ +125°C fOSC 120 110 133 133 146 160 kHz Built−in Frequency Jittering in Percentage of fOSC fjitter ±4.0 % Maximum Duty−Cycle NCP1216 NCP1216A Dmax 69 46.5 FEEDBACK SECTION (VCC = 11 V, Pin 5 Loaded by 1.0 k/C0087) Internal Pullup Resistor 2 Rup 20 k/C0087 Pin 2 (FB) to Internal Current Setpoint Division Ratio − Iratio 3.3 SKIP CYCLE GENERATION Default Skip Mode Level 1 Vskip 0.9 1.1 1.26 V Pin 1 Internal Output Impedance 1 Zout 25 k/C0087 INTERNAL RAMP COMPENSATION Internal Ramp Level @ 25°C (Note 3) 3 Vramp 2.6 2.9 3.2 V Internal Ramp Resistance to CS Pin 3 Rramp 19 k/C0087 Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. A 1.0 M /C0087 resistor is connected to the ground for the measurement.
NCP1216, NCP1216A www.onsemi.com
APPLICATION INFORMATION
The NCP1216 implements a standard current mode architecture where the switch −off event is dictated by the peak current setpoint. This component represents the ideal candidate where low part count is the key parameter, particularly in low −cost AC −DC adapters, TV power supplies etc. Due to its high −performance High −V oltage technology, the NCP1216 incorporates all the necessary components normally needed in UC384X based supplies: timing components, feedback devices, low −pass filter and self−supply. This later point emphasizes the fact that ON Semiconductor’s NCP1216 does NOT need an auxiliary winding to operate: the product is naturally supplied from the high−voltage rail and delivers a V CC to the IC. This system is called the Dynamic Self−Supply (DSS): Dynamic Self −Supply (DSS): Due to its Very High V oltage Integrated Circuit (VHVIC) technology, ON Semiconductor’s NCP1216 allows for a direct pin connection to the high−voltage DC rail. A dynamic current source charges up a capacitor and thus provides a fully independent V CC level to the NCP1216. As a result, there is no need for an auxiliary winding whose management is always a problem in variable output voltage designs (e.g. battery chargers). Adjustable Skip Cycle Level: By offering the ability to tailor the level at which the skip cycle takes place, the designer can make sure that the skip operation only occurs at low peak current. This point guarantees a noise −free operation with cheap transformers. Skip cycle offers a proven mean to reduce the standby power in no or light loads situations. Internal Frequency Dithering for Improved EMI Signature: By modulating the internal switching frequency with the DSS V CC ripple, natural energy spread appears and softens the controller’s EMI signature. Wide Switching − Frequency Offered with Different Options (65 kHz − 100 kHz − 133 kHz): Depending on the application, the designer can pick up the right device to help reducing magnetics or improve the EMI signature before reaching the 150 kHz starting point. Ramp Compensation: By inserting a resistor between the Current Sense (CS) pin and the actual sense resistor, it becomes possible to inject a given amount of ramp compensation since the internal sawtooth clock is routed to the CS pin. Sub −harmonic oscillations in Continuous Conduction Mode (CCM) can thus be compensated via a single resistor. Over Current Protection (OCP): By continuously monitoring the FB line activity, NCP1216 enters burst mode as soon as the power supply undergoes an overload. The device enters a safe low power operation, which prevents from any lethal thermal runaway. As soon as the default disappears, the power supply resumes operation. Unlike other controllers, overload detection is performed independently of any auxiliary winding level. In presence of a bad coupling between both power and auxiliary windings, the short circuit detection can be severely affected. The DSS naturally shields you against these troubles. Wide Duty− Cycle Operation: Wide mains operation requires a large duty−cycle excursion. The NCP1216 can go up to 75% typically. For Continuous Conduction Mode (CCM) applications, the internal ramp compensation lets you fight against sub−harmonic oscillations. Low Standby Power: If SMPS naturally exhibit a good efficiency at nominal load, they begin to be less efficient when the output power demand diminishes. By skipping unnecessary switching cycles, the NCP1216 drastically reduces the power wasted during light load conditions. In no−load conditions, the NPC1216 allows the total standby power to easily reach next International Energy Agency (IEA) recommendations. No Acoustic Noise While Operating: Instead of skipping cycles at high peak currents, the NCP1216 waits until the peak current demand falls below a user−adjustable 1/3 of the maximum limit. As a result, cycle skipping can take place without having a singing transformer, one can thus select cheap magnetic components free of noise problems. External MOSFET Connection: By leaving the external MOSFET external to the IC, you can select avalanche proof devices, which in certain cases (e.g. low output powers), let you work without an active clamping network. Also, by controlling the MOSFET gate signal flow; you have an option to slow down the device commutation, therefore reducing the amount of ElectroMagnetic Interference (EMI). SPICE Model: A dedicated model to run transient cycle−by−cycle simulations is available but also an averaged version to help you closing the loop. Ready−to−use templates can be downloaded in OrCAD’s PSpice and INTUSOFT’s IsSpice from ON Semiconductor web site, in the NCP1216 related section.
Figure 20. VCC Ripple is Used to Introduce a depends upon the width of the pulse bunches (Figure 22).
4.2 V, FB Pin Open
3.2 V, Upper
1.0 V by either shunting pin 1 to ground through a resistor
or raising it through a resistor up to the desired level. Figure 22. Output Pulses at Various Power Levels
NCP1216, NCP1216A www.onsemi.com 3. Implement Figure 3, from AN8069/D, Solution: This is another possible option to keep the DSS functionality (good short−circuit protection and EMI jittering) while driving any types of MOSFETs. This solution is recommended when the designer plans to use SOIC−8 controllers. 4. Connect an Auxiliary Winding: If the mains conditions are such that you simply can’t match the maximum power dissipation, then you need to connect an auxiliary winding to permanently disconnect the startup source. Overload Operation In applications where the output current is purposely not controlled (e.g. wall adapters delivering raw DC level), it is interesting to implement a true short −circuit protection. A short−circuit actually forces the output voltage to be at a low level, preventing a bias current to circulate in the Optocoupler LED. As a result, the FB pin level is pulled up to 4.2 V , as internally imposed by the IC. The peak current setpoint goes to the maximum and the supply delivers a rather high power with all the associated effects. Please note that this can also happen in case of feedback loss, e.g. a broken Optocoupler. To account for this situation, NCP1216 hosts a dedicated overload detection circuitry. Once activated, this circuitry imposes to deliver pulses in a burst manner with a low duty −cycle. The system auto−recovers when the fault condition disappears. During the startup phase, the peak current is pushed to the maximum until the output voltage reaches its target and the feedback loop takes over. This period of time depends on normal output load conditions and the maximum peak current allowed by the system. The time−out used by this IC works with the V CC decoupling capacitor: as soon as the VCC decreases from the VCCOFF level (typically 12.2 V) the device internally watches for an overload current situation. If this condition is still present when the VCC ON level is reached, the controller stops the driving pulses, prevents the self−supply current source to restart and puts all the circuitry in standby, consuming as little as 350 /C0109A typical (I CC3 parameter). As a result, the V CC level slowly discharges toward 0 V . When this level crosses 5.6 V typical, the controller enters a new startup phase by turning the current source on: V CC rises toward 12.2 V and again delivers output pulses at the VCC OFF crossing point. If the fault condition has been removed before VCC ON approaches, then the IC continues its normal operation. Otherwise, a new fault cycle takes place. Figure 25 shows the evolution of the signals in presence of a fault. Figure 25. Latchoff Phase Time Time Time Fault is Relaxed Regulation Occurs Here VCC 12.2 V 10 V 5.6 V Fault Occurs HereStartup Phase Internal Fault Flag Driver Pulses Drv Driver PulsesVCCOFF = 12.2 V VCCON = 10 V VCClatch = 5.6 V If the fault is relaxed during the V CC natural fall down sequence, the IC automatically resumes. If the fault still persists when VCC reached VCCON, then the controller cuts everything off until recovery. Calculating the VCC Capacitor As the above section describes, the fall down sequence depends upon the VCC level: how long does it take for the VCC line to go from 12.2 V to 10 V /C0046 The required time
load. Let’s suppose that this time corresponds to 6ms. stuck until V CC reaches 5.6 V: we are in latchoff phase. consumption, this latchoff phase lasts: 780 ms. can also be the source of problems in certain circumstances. CC discharge testifies for latchup. Figure 26. A Negative Spike Takes Place on the Bulk Capacitor at the Switch−off Sequence
5 V/DIV
1 V/DIV
it only heats up during the startup sequence. reasons, two diodes can be connected in series.
NCP1216, NCP1216A www.onsemi.com Device Version Marking Package Shipping† NCP1216D65R2G 65 kHz 16D06 SOIC−8 (Pb−Free) 2500 / Tape & Reel NCP1216D100R2G 100 kHz 16D10 SOIC−8 (Pb−Free) 2500 / Tape & Reel NCP1216D133R2G 133 kHz 16D13 SOIC−8 (Pb−Free) 2500 / Tape & Reel NCP1216P65G 65 kHz P1216P065 PDIP−7 (Pb−Free)
50 Units / Rail
NCP1216P100G 100 kHz P1216P100 PDIP−7 (Pb−Free) NCP1216P133G 133 kHz P1216P133 PDIP−7 (Pb−Free)
50 Units/ Rail
NCP1216AD65R2G 65 kHz 16A06 SOIC−8 (Pb−Free) 2500 / Tape & Reel NCP1216AD100R2G 100 kHz 16A10 SOIC−8 (Pb−Free) 2500 / Tape & Reel NCP1216AD133R2G 133 kHz 16A13 SOIC−8 (Pb−Free) 2500 / Tape & Reel NCP1216AP65G 65 kHz 1216AP06 PDIP−7 (Pb−Free) NCP1216AP100G 100 kHz P1216AP10 PDIP−7 (Pb−Free) NCP1216AP133G 133 kHz P1216AP13 PDIP−7 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
NCP1216, NCP1216A www.onsemi.com PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK SEATING PLANE N J X 45/C0095 K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751 −01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A B S DH C 0.10 (0.004) DIM A MIN MAX MIN MAX INCHES 4.80 5.00 0.189 0.197 MILLIMETERS B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050 M 0 8 0 8 N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244 −X− −Y− G MYM0.25 (0.010) −Z− YM0.25 (0.010) Z S X S M /C0095/C0095/C0095/C0095 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 /C0466mm inches/C0467SCALE 6:1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT*
NCP1216, NCP1216A www.onsemi.com PACKAGE DIMENSIONS PDIP−7 (PDIP−8 LESS PIN 7) P SUFFIX CASE 626B ISSUE C NOTE 8 D b L A eB E A TOP VIEW C SEATING PLANE
0.010 CASIDE VIEW
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACK- AGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3. 4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE NOT TO EXCEED 0.10 INCH. 5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR TO DATUM C. 6. DIMENSION E3 IS MEASURED AT THE LEAD TIPS WITH THE LEADS UNCONSTRAINED. 7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE LEADS, WHERE THE LEADS EXIT THE BODY . 8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE CORNERS). M c B H NOTE 5 e e/2 A2 NOTE 3 M B M NOTE 6 M DIM MIN MAX INCHES A −−−− 0.210 A1 0.015 −−−− b 0.014 0.022 C 0.008 0.014 D 0.355 0.400 D1 0.005 −−−− e 0.100 BSC E 0.300 0.325 M −−−− 10 −−− 5.33 0.38 −−− 0.35 0.56 0.20 0.36 9.02 10.16 0.13 −−−
2.54 BSC
7.62 8.26 −−− 10 MIN MAX MILLIMETERS E1 0.240 0.280 6.10 7.11 0.060 TYP 1.52 TYP A2 0.115 0.195 2.92 4.95 L 0.115 0.150 2.92 3.81 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries i n the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . A listing of ON Semiconductor’s product/patent ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the right s of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 NCP1612/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor 19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative