OVPXX LEIDITECH | Alldatasheet
Document overview
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Technical content
FEATURES
Highly reliable1.2mm × 1.2mm FCQFN- 9 package Integrated low R dson nFET switch: typical 30m 5A continuous current capability Default Over-Voltage Protection (OVP) threshold 5.95V 6.8V 9.98V OVP threshold adjustable range: 4V to 20V Input maximum voltage rating: 32VDC Fast turn-off response: typical 50ns Over-Temperature Protection (OTP) Under-Voltage Lockout (UVLO)
APPLICATIONS
Smartphones Tablets Charging Ports GENERAL DESCRIPTION The OVPxx features an ultra -low 30m (typ.) Rdson nFET load switch. When input voltage exceeds the OVP threshold, the switch is turned off very fast to prevent damage to the protected downstream devices. The IN pin is capable of withstanding fault voltages up to 32VDC. The default OVP threshold is 9.98V 1 ). The OVP threshold can be adjusted from 4V to 20V through external OVLO pin. The device features an open -drain output ACOK, when VIN_UVLO<VIN<VIN_OVLO and the switch is on, ACOK will be driven low to indicate a good power input, otherwise it is in high impedance mode (HiZ). The device features over -temperature protection that prevents itself from thermal damaging. The OVPxx is available in a RoHS compliant 1.2mm × 1.2mm FCQFN-9 package. TYPICAL APPLICATION CIRCUIT OUT OVLO IN GND CIN 0.1µF 50V R1 COUT 1µF Battery USB Port Charger ACOK TVS Controller PMIC Optional VIO 10kΩ Figure 1 OVPxx typical application circuit Note: when using default OVP threshold, R1 and R2 are not required, and connect OVLO pin to ground. OVPxx Ovre-Voltage Protection Load Switch OVP59 : OVP62 : 6.2V OVP68 : OVP99 : OVP10 : 10.5V 5.95V ( OVP59 ), 6.2V ( OVP62 ), 6.8V ( OVP68 ), ( OVP99 ) and 0.5V ( OVP10 OVP59 OVP62 OVP68 OVP99 OVP10 Rev 2.0 : www.leiditech.com 12.01.2019 1/19
V IN_OVLO (V) VIN_OVLO Hysteresis(mV) Condition Min. Typ. Max. OVP59 V IN rising 5.83 5.95 6.07 130 OVP62 V IN rising 6.08 6.20 6.32 130 OVP68 V IN rising 6.66 6.80 6.94 140 OVP99 V IN rising 9.78 9.98 10.18 210 OVP10 V IN rising 10.29 10.50 10.71 210 PIN CONFIGURATION AND TOP MARK C B A 1 2 3 OUT OUT OUT IN OVLO IN IN TOP VIEW 9XX – OVPxx YY – Production tracking code 9XX YY MARKING ACOK GND Figure 2 Pin Configuration and Top Mark PIN DEFINITION Pin N ame D escription B3, ,C3 IN Switch input and device power supply GND Device ground OVLO OVP threshold adjustment pin A2,A3,B2 OUT Switch output ACOK Power good flag, active low, open drain OVPxx Rev 2.0 : www.leiditech.com 12.01.2019 2/19
Notice for Typical Application Circuits: 1. When the default OVP threshold is used, connect OVLO pin to GND directly or through a 0Ω resistor. OVLO pin cannot be left floating. 2. If R 1 and R2 are used to adjust the OVP threshold, it is better to use 1% precision resistors to improve the OVP threshold precision. 3. C IN = 0.1μF is recommended for typical application, larger C IN is also acceptable. The rated voltage of C IN should be larger than the TVS maximum clamping voltage, if the rated voltage of CIN should be 50V. 4. C OUT = 1μF is recommended for typical application, larger C OUT is also acceptable. The rated voltage of COUT should be larger than the OVP threshold. For example, if the OVP threshold is 6.8V, the rated voltage of COUT should be 10V or higher. OVPxx no TVS is applied and only OVPxx is used, Rev 2.0 : www.leiditech.com 12.01.2019 4/19
ORDERING INFORMATION
n mental Information Delivery Form OVP59 C C 1.2mm × 1.2mm × 0.55mm FCQFN-9 901 MSL1 ROHS+HF Tape and Reel 3000pcs/Reel OVP62 C C 1.2mm × 1.2mm × 0.55mm FCQFN-9 902 MSL1 ROHS+HF Tape and Reel 3000pcs/Reel OVP68 - C C 1.2mm × 1.2mm × 0.55mm FCQFN-9
905 MSL1 ROHS+HF
C C 1.2mm × 1.2mm × 0.55mm FCQFN-9
909 MSL1 ROHS+HF
C C 1.2mm × 1.2mm × 0.55mm FCQFN-9 910 MSL1 ROHS+HF Tape and Reel 3000pcs/Reel OVPxx Rev 2.0 : www.leiditech.com 12.01.2019 5/19
ABSOLUTE MAXIMUM RATINGS(NOTE1) Symbol Parameter Condition Min. Max. Unit V IN Input DC voltage 0.3 V V IN_PUL I nput peak pulse voltage μ s pulse width, repeat 100 times V V OUT Output voltage 0.3 See (NOTE 2) V V ACOK ACOK voltage 0.3 V V OVLO OVLO voltage 0.3 V I SW C ontinuous current of switch IN OUT (NOTE 3 C ontinuous current on IN and OUT pin A IPEAK P eak current Peak input and output current on IN and OUT pin(10ms) A IDIODE C ontinuous diode current Continuous forward current through the nFET body diode 1.5 A TA Ambient temperature C TJ Junction temperature 150 C TSTG Storage temperature C TLEAD Soldering temperature At leads, 10 seconds 260 C NOTE1: Conditions out of those ranges listed in "absolute maximum ratings" may cause permanent damages to the device. In spite of the limits above, functional operation conditions of the device should within the ranges listed in "recommended operating conditions". Exposure to absolute-maximum-rated conditions for prolonged periods may affect device reliability. NOTE2: 29V or VIN+0.3V, whichever is smaller. NOTE3: Limited by thermal design. THERMAL INFORMATION Symbol Parameter Condition Value Unit R JA Thermal resistance from junction to ambient (NOTE 1) In free air C NOTE1: Thermal resistance from junction to ambient is highly dependent on PCB layout. OVPxx Rev 2.0 : www.leiditech.com 12.01.2019 6/19
V ESD Human Body Model All pins, per MIL STD 883J Method 3015.9 ±6.5 kV Charged Device Model All pins, per ESDA/JEDEC JS 002 2014 kV Machine Model All pins, per JE SD22 A115C ±450 V I Latch up Latch up All pins, per JESD78D , I Trigger ±800 mA RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min. Typ. Max. Unit VIN Input DC voltage V CIN Input capacitance 0.1 F COUT Output load capacitance 100 F OVPxx Rev 2.0 : www.leiditech.com 12.01.2019 7/19
ELECTRICAL CHARACTERISTICS
TA = -40°C to 85°C unless otherwise noted. Typical values are guaranteed for VIN = 5V, CIN = 0.1F, IIN≤ 5A and TA = 25°C. Symbol
Description
T est C onditions M in. T yp. M ax. U nits R dson Switch on resistance V IN = 5V, I OUT = 1A, T A 25°C m I Q Input quiescent current V IN = 5V, V OVLO =0V,I OUT = 0A A I IN_OVLO Input current at over voltage condition V IN = 5V, V OVLO =3V,V OUT = 0V A V OVLO_TH OVLO set threshold 1.16 1.2 1.24 V VOVLO_RNG OVP threshold adjustable range V V OVLO_SEL External OVLO select threshold OVLO rising 0.19 0.26 0.33 V Hysteresis 0.06 V IOVLO OVLO pin leakage current VOVLO=VOVLO_TH - 0.2 0.2 A Protection V IN_OVLO OVP trip level OVP59 V IN rising 5.83 5.95 6.07 V Hysteresis 0.13 OVP62 V IN rising 6.08 6.20 6.32 Hysteresis 0.13 OVP68 V IN rising 6.66 6.80 6.94 Hysteresis 0.14 OVP99 V IN rising 9.78 9.98 10.18 Hysteresis 0.21 OVP10 V IN rising 10.29 10.50 10.71 Hysteresis 0.21 V IN_UVLO UVLO trip level V IN rising 2.9 3.0 V Hysteresis 0.1 OVPxx Rev 2.0 : www.leiditech.com 12.01.2019 8/19
ELECTRICAL CHARACTERISTICS(CONTINUED) TA = -40°C to 85°C unless otherwise noted. Typical values are guaranteed for VIN = 5V, CIN = 0.1F, IIN≤ 5A and TA = 25°C. Symbol T est C onditions M in. T yp. M ax. U nits Protection(continued) T SDN Shutdown temperature C T SDN_HYS Shutdown temperature hysteresis C R DCHG O utput discharge resistance V OUT V OVLO =3V Digital Logical Interface VOL ACOK output low volt a ge ISINK=1mA 0.4 V ILEAK_ACOK ACOK leakage current VIO=5V, ACOK de-asserted - 0.5 0.5 A Timing Characteristics (Figure tDEB Debounce time From VIN > VIN_UVLO to 10% VOUT m s t ST A RT S tart up time From V IN > V IN_UVLO to ACOK low m s t ON Switch turn on time R L = 100 , C L = 22 F, V OUT from 10% V IN to 90% V IN ms t OFF Switch turn off time C L = 0 F, R L = 100 V IN V IN_OVLO to V OUT stop rising V IN rise at 10V/ s n s TIMING DIAGRAM VIN VOUT OVP trip level tDEB tON tOFF tDEB tON tSTART tSTART VACOK Figure 6 Timing diagram OVPxx Rev 2.0 : www.leiditech.com 12.01.2019 9/19
TYPICAL CHARACTERISTICS (CONTINUED) VIN = 5V, VOVLO = 0V, CIN = 0.1F, COUT = 1F, and TA = 25°C unless otherwise specified. VIN 5V / div VOUT 5V / div ACOK 2V / div 1ms / div IIN 100A / div VIN 10V / div VOUT 5V / div 20us / div Figure 15 OVP Figure 16 400V Surge with 12V TVS) OVPxx Response (OVP68 ) Response (OVP68 Rev 2.0 : www.leiditech.com 12.01.2019 12/19
DETAILED FUNCTIONAL DESCRIPTION Device Operation If the input voltage is between UVLO and OVP threshold, the internal charge pump begins to work after debounce time, the gate of the nFET switch will be slowly charged high till the switch is fully on. ACOK will be driven low about 30ms after V IN valid, indicating the switch is on with a good power input. If the input voltage exceeds the OVP trip level, the switch will be turned off in about 50ns. If input voltage falls below UVLO threshold, or over-temperature happens, the switch will also be turned off. Over-Voltage Protection If the input voltage exceeds the OVP rising trip level, the switch will be turned off in about 50ns. The switch will remain off until VIN falls below the OVP falling trip level. OVP Threshold Adjustment If the default OVP threshold is used, OVLO pin must be grounded. If OVLO pin is not grounded, and by connecting external resistor divider to OVLO pin as shown in the typical application circuit, between IN and GND, the OVP threshold can be adjusted as following: VIN_OVLO = R1+R2 VOVLO_TH The adjustment range is 4V to 20V. When the OVLO pin voltage VOVLO exceeds VOVLO_SEL (0.26V typical), VOVLO is compared with the reference voltage V OVLO_TH (1.2V typical) to judge whether input supply is over-voltage. It is recommended that the total resistance of R1 and R2 is less than 100 kΩ.For example, if we select R1 = 51kΩ and R2 = 12.4kΩ, then the new OVP threshold calculated from the above formula is 6.14V. ACOK Output The device features an open-drain output ACOK , it should be connected to the system I/O rail through a pull- up resistor. If the device is enabled and VIN_UVLO<VIN<VIN_OVLO, ACOK will be driven low indicating the switch is on with a good power input. If OVP, UVLO, or OT occurs, the switch will be turned off and ACOK will be pulled high. If this function is not needed, ACOK pin can be floating or grounded. USB On-The-Go (OTG) Operation If VIN = 0V and OUT is supplied by OTG voltage, the body diode of the load switch conducts current from OUT to IN and the voltage drop from OUT to IN is approximately 0.7V. When V IN > V IN_UVLO, internal charge pump begins to open the load switch after debounce time (15ms typical). After switch is fully on, current is supplied through switch channel and the voltage drop from OUT to IN is minimum. OVPxx Rev 2.0 : www.leiditech.com 12.01.2019 13/19
To make fully , the guidelines below should be followed. 1. All the peripherals should be placed as close to the device as possible. Place the input capacitor CIN on the top IN pin, and place the output capacitor COUT on the top layer ose to OUT pin. 3. Red bold paths on figure 4 and 5 are power lines that will flow large current, please route them on PCB as straight, wide and short as possible. 4. If R1 and R2 are used, route OVLO line on PCB as short as possible to reduce parasitic capacitance. 5. The power it to minimize possible EMI and ESD coupling. 6. Use rounded corners on the power OVPxx use of the performance of OVPxx layer (same layer as the OVPxx ) and close to IN pin routing passes through the external TVS firstly, and then connect OVPxx . trace from USB connector to OVPxx may suffer from ESD event, keep other traces away from to decrease EMI coupling.trace from USB connector to OVPxx (same layer as the OVPxx ) and cl Rev 2.0 : www.leiditech.com 12.01.2019 14/19
W 7.90 8.00 8.30 A0 1.33 1.38 1.43 B0 1.33 1.38 1.43 K0 0.70 0.75 0.80 P 3.90 4.00 4.10 E 1.65 1.75 1.85 F 3.45 3.50 3.55 D0 1.50 1.50 1.60 D1 0.75 0.80 0.85 P1 3.90 4.00 4.10 P2 1.95 2.00 2.05 T 0.22 0.25 0.28 NOTE: 1. Unit: mm; 2. Material: ABS; 3. Carrier camber not exceed 1mm in 250mm; 4. 10 sprocket hole pitch cumulative tolerance ±0.2mm; 5. All tape and sprocket hole dimensioning are as per EIA-481 unless otherwise stated; 6. A0 and B0 measured on a place in the middle of the comer RADǁ. OVPxx Rev 2.0 : www.leiditech.com 12.01.2019 15/19
NOTE: 1. Units: m m; 2. Material: polystyrene; 3. Planeness: max 3mm; 4. Surface resistance: 10 5 to 1011 ohms/sq; 5. All outstanding tolerance: ±0.25mm. OVPxx Rev 2.0 : www.leiditech.com 12.01.2019 16/19
D TOP VIEW SIDE VIEW Unit: mm E Ø L BOTTOM VIEW e A e SYMBOL MIN A D E e L 0.50 0.00 0.152REF. 1.10 1.10 0.400REF. 0.18 0.55 0.02 1.20 1.20 0.25 NOM MAX 0.60 0.05 1.30 1.30 0.30 0.090REF. 0.250REF. PIN 1 I.D. OVPxx Rev 2.0 : www.leiditech.com 12.01.2019 17/19
Ø(0.25) SOLDER MASK OPENING METAL UNDER SOLDER MASK
0.05 MIN
0.25 TYP
0.09 TYP
NOTE: Unit: mm. OVPxx Rev 2.0 : www.leiditech.com 12.01.2019 18/19
Figure 17 Package Reflow Oven Thermal Profile Table 1 Package Reflow Standard Reflow Note Spec Average ramp up rate (217 to Peak) Max. 3 /sec Time of Preheat temp.(from 150 to 200 120 sec Time to be maintained above 217 150 sec Peak Temperature >260 Time within 5 of actual peak temp 40 sec Ramp down rate Max. 6 /sec Time from 25 to peak temp Max. 8min NOTE 1: All data are compared with the package-top temperature, measured on the package surface; adopted the Pb-Free assembly. OVPxx NOTE 2: OVPxx Shanghai Leiditech Electronic Co.,Ltd Email: sale1@leiditech.com Tel : +86- 021 50828806 Fax : +86- 021 50477059 Rev 2.0 : www.leiditech.com 12.01.2019 19/19