OPT3001

OPT3001 Ambient Light Sensor (ALS) datasheet (Rev. C)

Document overview

• Manufacturer or author: Texas Instruments, Incorporated [SBOS681,C]
• PDF pages: 44

Technical content

Wavelength (nm) Normalized Response 300 400 500 600 700 800 900 1000 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 D001 OPT3001 Human Eye Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. OPT3001 SBOS681C – JULY 2014– REVISED NOVEMBER 2017 OPT3001AmbientLightSensor(ALS)

1 Features

1• Precision Optical Filtering to Match Human Eye: – Rejects > 99% (typ) of IR

• Automatic Full-Scale Setting Feature Simplifies Software and Ensures Proper Configuration
• Measurements: 0.01 lux to 83 k lux
• 23-Bit Effective Dynamic Range With Automatic Gain Ranging
• 12 Binary-Weighted Full-Scale Range Settings: < 0.2% (typ) Matching Between Ranges
• Low Operating Current: 1.8 µA (typ)
• Operating Temperature Range: –40°C to +85°C
• Wide Power-Supply Range: 1.6 V to 3.6 V
• 5.5-V Tolerant I/O
• Flexible Interrupt System
• Small-Form Factor: 2.0 mm × 2.0 mm × 0.65 mm

2 Applications

• Display Backlight Controls
• Lighting Control Systems
• Tablet and Notebook Computers
• Thermostats and Home Automation Appliances
• Point-of-Sale Terminals
• Outdoor Traffic and Street Lights
• Cameras Spectral Response: The OPT3001 and Human Eye

3 Description

The OPT3001 is a sensor that measures the intensity of visible light. The spectral response of the sensor tightly matches the photopic response of the human eye and includes significant infrared rejection. The OPT3001 is a single-chip lux meter, measuring the intensity of light as visible by the human eye. The precision spectral response and strong IR rejection of the device enables the OPT3001 to accurately meter the intensity of light as seen by the human eye regardless of light source. The strong IR rejection also aids in maintaining high accuracy when industrial design calls for mounting the sensor under dark glass for aesthetics. The OPT3001 is designed for systems that create light-based experiences for humans, and an ideal preferred replacement for photodiodes, photoresistors, or other ambient light sensors with less human eye matching and IR rejection. Measurements can be made from 0.01 lux up to 83k lux without manually selecting full-scale ranges by using the built-in, full-scale setting feature. This capability allows light measurement over a 23-bit effective dynamic range. The digital operation is flexible for system integration. Measurements can be either continuous or single- shot. The control and interrupt system features autonomous operation, allowing the processor to sleep while the sensor searches for appropriate wake-up events to report via the interrupt pin. The digital output is reported over an I2C- and SMBus- compatible, two-wire serial interface. The low power consumption and low power-supply voltage capability of the OPT3001 enhance the battery life of battery-powered systems. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) OPT3001 USON (6) 2.00 mm x 2.00 mm (1) For all available packages, see the package option addendum at the end of the datasheet. Block Diagram

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11.2 Receiving Notification of Documentation Updates 34

12 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (December 2014) to Revision C Page Changes from Revision A (October 2014) to Revision B Page Changes from Original (July 2014) to Revision A Page

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5 Pin Configuration and Functions

DESCRIPTION

NO. NAME 1 VDD Power Device power. Connect to a 1.6-V to 3.6-V supply. 2 ADDR Digital input Address pin. This pin sets the LSBs of the I2C address.

3 GND Power Ground

4 SCL Digital input I2C clock. Connect with a 10-kΩ resistor to a 1.6-V to 5.5-V supply. 5 INT Digital output Interrupt output open-drain. Connect with a 10-kΩ resistor to a 1.6-V to 5.5-V supply.

6 SDA Digital

input/output I2C data. Connect with a 10-kΩ resistor to a 1.6-V to 5.5-V supply.

SBOS681C – JULY 2014– REVISED NOVEMBER 2017 www.ti.com Product Folder Links: OPT3001 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Long exposure to temperatures higher than 105°C can cause package discoloration, spectral distortion, and measurement inaccuracy.

6 Specifications

6.1 Absolute Maximum Ratings

See(1) MIN MAX UNIT Voltage VDD to GND –0.5 6 V SDA, SCL, INT, and ADDR to GND –0.5 6 V Current into any pin 10 mA Temperature Junction 150 °C Storage, Tstg –65 +150(2) °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500

6.3 Recommended Operating Conditions

Operating temperature –40 85 °C Operating power-supply voltage 1.6 3.6 V (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.4 Thermal Information

THERMAL METRIC(1) OPT3001 UNITDNP (USON)

6 PINS

RθJA Junction-to-ambient thermal resistance 71.2 °C/W RθJC(top) Junction-to-case (top) thermal resistance 45.7 °C/W RθJB Junction-to-board thermal resistance 42.2 °C/W ψJT Junction-to-top characterization parameter 2.4 °C/W ψJB Junction-to-board characterization parameter 42.8 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 17.0 °C/W

www.ti.com SBOS681C – JULY 2014–REVISED NOVEMBER 2017 Product Folder Links: OPT3001 Submit Documentation FeedbackCopyright © 2014–2017, Texas Instruments Incorporated (1) Refers to a control field within the configuration register. (2) Tested with the white LED calibrated to 2k lux and an 850-nm LED. (3) Characterized by measuring fixed near-full-scale light levels on the higher adjacent full-scale range setting. (4) PSRR is the percent change of the measured lux output from its current value, divided by the change in power supply voltage, as characterized by results from 3.6-V and 1.6-V power supplies. (5) The conversion time, from start of conversion until the data are ready to be read, is the integration time plus 3 ms. (6) The specified leakage current is dominated by the production test equipment limitations. Typical values are much smaller.

6.5 Electrical Characteristics

At TA = 25°C, VDD = 3.3 V, 800-ms conversion time (CT = 1)(1), automatic full-scale range (RN[3:0] = 1100b(1)), white LED, and normal-angle incidence of light, unless otherwise specified. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OPTICAL Peak irradiance spectral responsivity 550 nm Resolution (LSB) Lowest full-scale range, RN[3:0] = 0000b(1) 0.01 lux Full-scale illuminance 83865.6 lux Measurement output result 0.64 lux per ADC code, 2620.80 lux full-scale (RN[3:0] = 0110)(1), 2000 lux input(2) 2812 3125 3437 ADC codes 1800 2000 2200 lux Relative accuracy between gain ranges(3) 0.2% Infrared response (850 nm)(2) 0.2% Light source variation (incandescent, halogen, fluorescent) Bare device, no cover glass 4% Linearity Input illuminance > 40 lux 2% Input illuminance < 40 lux 5% Measurement drift across temperature Input illuminance = 2000 lux 0.01 %/°C Dark condition, ADC output 0.01 lux per ADC code 0 3 ADC codes 0 0.03 lux Half-power angle 50% of full-power reading 47 degrees PSRR Power-supply rejection ratio VDD at 3.6 V and 1.6 V 0.1 %/V(4) POWER SUPPLY VDD Operating range 1.6 3.6 V VI²C Operating range of I2C pull-up resistor I2C pull-up resistor, VDD ≤ VI²C 1.6 5.5 V IQ Quiescent current Dark Active, VDD = 3.6 V 1.8 2.5 µA Shutdown (M[1:0] = 00)(1), VDD = 3.6 V 0.3 0.47 µA Full-scale lux Active, VDD = 3.6 V 3.7 µA Shutdown, POR Power-on-reset threshold TA = 25°C 0.8 V DIGITAL I/O pin capacitance 3 pF Total integration time(5) (CT = 1)(1), 800-ms mode, fixed lux range 720 800 880 ms (CT = 0)(1), 100-ms mode, fixed lux range 90 100 110 ms VIL Low-level input voltage (SDA, SCL, and ADDR) 0 0.3 × VDD V VIH High-level input voltage (SDA, SCL, and ADDR) 0.7 × VDD 5.5 V IIL Low-level input current (SDA, SCL, and ADDR) 0.01 0.25(6) µA VOL Low-level output voltage (SDA and INT) IOL= 3 mA 0.32 V IZH Output logic high, high-Z leakage current (SDA, INT) Pin at VDD 0.01 0.25(6) µA TEMPERATURE Specified temperature range –40 85 °C

(1) All timing parameters are referenced to low and high voltage thresholds of 30% and 70%, respectively, of final settled value.

6.6 Timing Requirements(1)

Figure 1. I2C Detailed Timing Diagram

6.7 Typical Characteristics

normal-angle incidence of light, unless otherwise specified. Figure 2. Spectral Response vs Wavelength Figure 3. Output Response vs Input Illuminance, Multiple Figure 4. Output Response vs Input Illuminance Figure 5. Output Response vs Input Illuminance Figure 6. Output Response vs Input Illuminance Figure 7. Full-Scale-Range Matching (Lowest 7 Ranges)

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7 Detailed Description

7.1 Overview

The OPT3001 measures the ambient light that illuminates the device. This device measures light with a spectral response very closely matched to the human eye, and with very good infrared rejection. Matching the sensor spectral response to that of the human eye response is vital because ambient light sensors are used to measure and help create ideal human lighting experiences. Strong rejection of infrared light, which a human does not see, is a crucial component of this matching. This matching makes the OPT3001 especially good for operation underneath windows that are visibly dark, but infrared transmissive. The OPT3001 is fully self-contained to measure the ambient light and report the result in lux digitally over the I2C bus. The result can also be used to alert a system and interrupt a processor with the INT pin. The result can also be summarized with a programmable window comparison and communicated with the INT pin. The OPT3001 can be configured into an automatic full-scale, range-setting mode that always selects the optimal full-scale range setting for the lighting conditions. This mode frees the user from having to program their software for potential iterative cycles of measurement and readjustment of the full-scale range until optimal for any given measurement. The device can be commanded to operate continuously or in single-shot measurement modes. The device integrates its result over either 100 ms or 800 ms, so the effects of 50-Hz and 60-Hz noise sources from typical light bulbs are nominally reduced to a minimum. The device starts up in a low-power shutdown state, such that the OPT3001 only consumes active-operation power after being programmed into an active state. The OPT3001 optical filtering system is not excessively sensitive to non-ideal particles and micro-shadows on the optical surface. This reduced sensitivity is a result of the relatively minor device dependency on uniform- density optical illumination of the sensor area for infrared rejection. Proper optical surface cleanliness is always recommended for best results on all optical devices.

7.2 Functional Block Diagram

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7.3 Feature Description

7.3.1 Human Eye Matching

The OPT3001 spectral response closely matches that of the human eye. If the ambient light sensor measurement is used to help create a good human experience, or create optical conditions that are optimal for a human, the sensor must measure the same spectrum of light that a human sees. The device also has excellent infrared light (IR) rejection. This IR rejection is especially important because many real-world lighting sources have significant infrared content that humans do not see. If the sensor measures infrared light that the human eye does not see, then a true human experience is not accurately represented. Furthermore, if the ambient light sensor is hidden underneath a dark window (such that the end-product user cannot see the sensor) the infrared rejection of the OPT3001 becomes significantly more important because many dark windows attenuate visible light but transmit infrared light. This attenuation of visible light and lack of attenuation of IR light amplifies the ratio of the infrared light to visible light that illuminates the sensor. Results can still be well matched to the human eye under this condition because of the high infrared rejection of the OPT3001.

7.3.2 Automatic Full-Scale Range Setting

The OPT3001 has an automatic full-scale range setting feature that eliminates the need to predict and set the optimal range for the device. In this mode, the OPT3001 automatically selects the optimal full-scale range for the given lighting condition. The OPT3001 has a high degree of result matching between the full-scale range settings. This matching eliminates the problem of varying results or the need for range-specific, user-calibrated gain factors when different full-scale ranges are chosen. For further details, see the Automatic Full-Scale Setting Mode section.

7.3.3 Interrupt Operation, INT Pin, and Interrupt Reporting Mechanisms

The device has an interrupt reporting system that allows the processor connected to the I2C bus to go to sleep, or otherwise ignore the device results, until a user-defined event occurs that requires possible action. Alternatively, this same mechanism can also be used with any system that can take advantage of a single digital signal that indicates whether the light is above or below levels of interest. The interrupt event conditions are controlled by the high-limit and low-limit registers, as well as the configuration register latch and fault count fields. The results of comparing the result register with the high-limit register and low-limit register are referred to as fault events. The fault count register dictates how many consecutive same- result fault events are required to trigger an interrupt event and subsequently change the state of the interrupt reporting mechanisms, which are the INT pin, the flag high field, and the flag low field. The latch field allows a choice between a latched window-style comparison and a transparent hysteresis-style comparison. The INT pin has an open-drain output, which requires the use of a pull-up resistor. This open-drain output allows multiple devices with open-drain INT pins to be connected to the same line, thus creating a logical NOR or AND function between the devices. The polarity of the INT pin can be controlled with the polarity of interrupt field in the configuration register. When the POL field is set to 0, the pin operates in an active low behavior that pulls the pin low when the INT pin becomes active. When the POL field is set to 1, the pin operates in an active high behavior and becomes high impedance, thus allowing the pin to go high when the INT pin becomes active. Additional details of the interrupt reporting registers are described in the Interrupt Reporting Mechanism Modes and Internal Registers sections.

7.3.4 I2C Bus Overview

example with the SMBus protocol specified only when a difference between the two protocols is discussed. master by generating an acknowledge bit by pulling SDA low. locking up the bus. If the SCL line is held low for this duration of time, the bus state machine is reset.

7.3.4.1 Serial Bus Address

direction bit that indicates whether the action is to be a read or write operation. Four I2C addresses are possible by connecting the ADDR pin to one of four pins: GND, VDD, SDA, or SCL. any activity on the interface occurs. Table 1. Possible I2C Addresses with Corresponding ADDR Configuration

1000100 GND

1000101 VDD

1000110 SDA

1000111 SCL

7.3.4.2 Serial Interface

are transmitted most-significant bits first. input spikes and bus noise. See the Electrical Interface section for further details of the I2C bus noise immunity.

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7.4 Device Functional Modes

7.4.1 Automatic Full-Scale Setting Mode

The OPT3001 has an automatic full-scale-range setting mode that eliminates the need for a user to predict and set the optimal range for the device. This mode is entered when the configuration register range number field (RN[3:0]) is set to 1100b. The first measurement that the device takes in auto-range mode is a 10-ms range assessment measurement. The device then determines the appropriate full-scale range to take its first full measurement. For subsequent measurements, the full-scale range is set by the result of the previous measurement. If a measurement is towards the low side of full-scale, the full-scale range is decreased by one or two settings for the next measurement. If a measurement is towards the upper side of full-scale, the full-scale range is increased by one setting for the next measurement. If the measurement exceeds the full-scale range, resulting from a fast increasing optical transient event, the current measurement is aborted. This invalid measurement is not reported. A 10-ms measurement is taken to assess and properly reset the full-scale range. Then, a new measurement is taken with this proper full-scale range. Therefore, during a fast increasing optical transient in this mode, a measurement can possibly take longer to complete and report than indicated by the configuration register conversion time field (CT).

7.4.2 Interrupt Reporting Mechanism Modes

There are two major types of interrupt reporting mechanism modes: latched window-style comparison mode and transparent hysteresis-style comparison mode. The configuration register latch field (L) (see the configuration register, bit 4) controls which of these two modes is used. An end-of-conversion mode is also associated with each major mode type. The end-of-conversion mode is active when the two most significant bits of the threshold low register are set to 11b. The mechanisms report via the flag high and flag low fields, the conversion ready field, and the INT pin.

7.4.2.1 Latched Window-Style Comparison Mode

The latched window-style comparison mode is typically selected when using the OPT3001 to interrupt an external processor. In this mode, a fault is recognized when the input signal is above the high-limit register or below the low-limit register. When the consecutive fault events trigger the interrupt reporting mechanisms, these mechanisms are latched, thus reporting whether the fault is the result of a high or low comparison. These mechanisms remain latched until the configuration register is read, which clears the INT pin and flag high and flag low fields. The SMBus alert response protocol, described in detail in the SMBus Alert Response section, clears the pin but does not clear the flag high and flag low fields. The behavior of this mode, along with the conversion ready flag, is summarized in Table 2. Note that Table 2 does not apply when the two threshold low register MSBs (see the Transparent Hysteresis-Style Comparison Mode section for clarification on the MSBs) are set to 11b.

(1) X = no change from the previous state. field can take on different behaviors. or when the pin state is inactive and POL = 1 (active high). configuration register reads are performed immediately after a conversion completion, the first reads 1 and the second reads 0. Table 2. Latched Window-Style Comparison Mode: Flag Setting and Clearing Summary(1)(2) The result register is above the high-limit register for fault count times. The result register is below the low-limit register for fault count times. (1) X = no change from the previous state. field can take on different behaviors. or when the pin state is inactive and POL = 1 (active high). configuration register reads are performed immediately after a conversion completion, the first reads 1 and the second reads 0.

7.4.2.2 Transparent Hysteresis-Style Comparison Mode

not apply when the two threshold low register MSBs (LE[3:2] from Table 11) are set to 11. Table 3. Transparent Hysteresis-Style Comparison Mode: Flag Setting and Clearing Summary(1)(2) The result register is above the high-limit register for fault count times. The result register is below the low-limit register for fault count times.

(1) X = no change from the previous state. or when the pin state is inactive and POL = 1 (active high). configuration register reads are performed immediately after a conversion completion, the first reads 1 and the second reads 0.

7.4.2.3 End-of-Conversion Mode

mechanisms as a result of various operations. Table 4. End-of-Conversion Mode while in Latched Window-Style Comparison Mode: The result register is above the high-limit register for fault count times. The result register is below the low-limit register for fault count times. (1) X = no change from the previous state. or when the pin state is inactive and POL = 1 (active high). configuration register reads are performed immediately after a conversion completion, the first reads 1 and the second reads 0. then be set back to 1 if desired.

7.4.2.4 End-of-Conversion and Transparent Hysteresis-Style Comparison Mode

programmed simultaneously. The behavior of this combination is shown in Table 5. Table 5. End-Of-Conversion Mode while in Transparent Hysteresis-Style Comparison Mode: The result register is above the high-limit register for fault count times. The result register is below the low-limit register for fault count times.

7.5 Programming

to as F/S. High-speed mode is described in the High-Speed I2C Mode section.

7.5.1 Writing and Reading

address byte with the R/W bit low. (1) The value of the slave address byte is determined by the ADDR pin setting; see Table 1. Figure 19. Setting the I2C Register Address terminate the data transfer by generating a start or stop condition. the register address until that number is changed by the next write operation.

bytes are sent most significant byte first, followed by the least significant byte. (1) The value of the slave address byte is determined by the setting of the ADDR pin; see Table 1. Figure 20. I2C Write Example (1) The value of the slave address byte is determined by the ADDR pin setting; see Table 1. (2) An ACK by the master can also be sent. Figure 21. I2C Read Example

7.5.1.1 High-Speed I2C Mode

to support a 2.6-MHz operation.

7.5.1.2 General-Call Reset Command

the device issues an acknowledge bit and sets all of its registers to the power-on-reset default condition.

7.5.1.3 SMBus Alert Response

response when in transparent mode (configuration register, latch field = 0). (1) FH is the flag high field (FH) in the configuration register (see Table 10). (2) A1 and A0 are determined by the ADDR pin; see Table 1. Figure 22. Timing Diagram for SMBus Alert Response

(1) Register offset and register address are used interchangeably.

7.6 Register Maps

7.6.1 Internal Registers

The device is operated over the I2C bus with registers that contain configuration, status, and result information. All registers are 16 bits long. Table 6. Register Map

7.6.1.1 Register Descriptions

Register offset and register address are used interchangeably.

7.6.1.1.1 Result Register (offset = 00h)

4-bit exponent and a 12-bit mantissa. Figure 23. Result Register (Read-Only) Table 7. Result Register Field Descriptions These bits are the exponent bits. Table 8 provides further details. 11:0 R[11:0] R 000h Fractional result. These bits are the result in straight binary coding (zero to full-scale). Table 8. Full-Scale Range and LSB Size as a Function of Exponent Level Table 9. Note that many combinations of exponents (E[3:0]) and fractional results (R[11:0]) can map onto the same lux result, as shown in the examples of Table 9.

Table 9. Examples of Decoding the Result Register into lux programmed full-scale range (see Table 8). See the Low-Limit Register for details. as a function of conversion time.

7.6.1.1.2 Configuration Register (offset = 01h) [reset = C810h]

that conversion is subsequently started. Figure 24. Configuration Register Table 10. Configuration Register Field Descriptions Range number field (read or write). reported in the result exponent (register 00h, E[3:0]). 1111b (0Dh, 0Eh, and 0Fh) are reserved for future use.

Table 10. Configuration Register Field Descriptions (continued)

11 CT R/W 1b

Conversion time field (read or write). 0100b, 0011b, 0010b, and 0001b reduces by two bits. Range 0000b reduces by three bits. Mode of conversion operation field (read or write). of conversion operation field is automatically set to 00b and the device is shut down. subsequent read operations while the device is in shutdown mode.

8 OVF R 0b

Overflow flag field (read-only). field is reevaluated on every measurement. integrating-style converters. the overflow flag field is if the input light is beyond the full-scale level of the entire device. no overflow condition or until the full-scale range is set to its maximum range.

7 CRF R 0b

Conversion ready field (read-only). Interrupt Reporting Mechanism Modes section for more details.

6 FH R 0b

Flag high field (read-only). clearing and other behaviors of this field.

5 FL R 0b

clearing and other behaviors of this field.

4 L R/W 1b

Latch field (read or write). latched window-style comparison and a transparent hysteresis-style comparison. INT Pin, and Interrupt Reporting Mechanisms section for further details. reporting mechanisms until a user-controlled clearing event.

3 POL R/W 0b

Polarity field (read or write). The polarity field controls the polarity or active state of the INT pin. 0 = The INT pin reports active low, pulling the pin low upon an interrupt event. impedance and allowing the INT pin to be pulled high upon an interrupt event.

2 ME R/W 0b

Mask exponent field (read or write). Fault count field (read or write).

7.6.1.1.3 Low-Limit Register (offset = 02h) [reset = C0000h]

field (FH), and flag low field (FL), as described in the Interrupt Reporting Mechanism Modes section. Figure 25. Low-Limit Register Table 11. Low-Limit Register Field Descriptions These bits are the exponent bits. Table 12 provides further details. These bits are the result in straight binary coding (zero to full-scale). The format of this register is nearly identical to the format of the result register described in the Result Register. result (TL[11:0]) is similar to result register result (R[11:0]). equation for the result register, Equation 3. and examples given in for the Result Register apply to the low-limit register as well. Table 12. Full-Scale Range and LSB Size as a Function of Exponent Level The result and limit registers are all converted into lux values internally for comparison. having to think about the fractional result and not the exponent part of the result.

7.6.1.1.4 High-Limit Register (offset = 03h) [reset = BFFFh]

with the result register is unaffected by the ME bit. formula to translate this register into lux is similar to Equation 4. The full-scale values are similar to Table 8. Figure 26. High-Limit Register Table 13. High-Limit Register Field Descriptions 15:12 HE[3:0] R/W Bh Exponent. These bits are the exponent bits. 11:0 TH[11:0] R/W FFFh Result. These bits are the result in straight binary coding (zero to full-scale).

7.6.1.1.5 Manufacturer ID Register (offset = 7Eh) [reset = 5449h]

This register is intended to help uniquely identify the device. Figure 27. Manufacturer ID Register Table 14. Manufacturer ID Register Field Descriptions 15:0 ID[15:0] R 5449h Manufacturer ID. The manufacturer ID reads 5449h. In ASCII code, this register reads TI.

7.6.1.1.6 Device ID Register (offset = 7Fh) [reset = 3001h]

This register is also intended to help uniquely identify the device. Figure 28. Device ID Register Table 15. Device ID Register Field Descriptions

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8 Application and Implementation

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

Ambient light sensors are used in a wide variety of applications that require control as a function of ambient light. Because ambient light sensors nominally match the human eye spectral response, they are superior to photodiodes when the goal is to create an experience for human beings. Very common applications include display optical-intensity control and industrial or home lighting control. There are two categories of interface to the OPT3001: electrical and optical.

8.1.1 Electrical Interface

The electrical interface is quite simple, as illustrated in Figure 29. Connect the OPT3001 I2C SDA and SCL pins to the same pins of an applications processor, microcontroller, or other digital processor. If that digital processor requires an interrupt resulting from an event of interest from the OPT3001, then connect the INT pin to either an interrupt or general-purpose I/O pin of the processor. There are multiple uses for this interrupt, including signaling the system to wake up from low-power mode, processing other tasks while waiting for an ambient light event of interest, or alerting the processor that a sample is ready to be read. Connect pullup resistors between a power supply appropriate for digital communication and the SDA and SCL pins (because they have open-drain output structures). If the INT pin is used, connect a pullup resistor to the INT pin. A typical value for these pullup resistors is 10 kΩ. The resistor choice can be optimized in conjunction to the bus capacitance to balance the system speed, power, noise immunity, and other requirements. The power supply and grounding considerations are discussed in the Power-Supply Recommendations section. Although spike suppression is integrated in the SDA and SCL pin circuits, use proper layout practices to minimize the amount of coupling into the communication lines. One possible introduction of noise occurs from capacitively coupling signal edges between the two communication lines themselves. Another possible noise introduction comes from other switching noise sources present in the system, especially for long communication lines. In noisy environments, shield communication lines to reduce the possibility of unintended noise coupling into the digital I/O lines that could be incorrectly interpreted.

8.1.2 Optical Interface

The optical interface is physically located within the package, facing away from the PCB, as specified by the Sensor Area in Figure 37. Physical components, such as a plastic housing and a window that allows light from outside of the design to illuminate the sensor (see Figure 30), can help protect the OPT3001 and neighboring circuitry. Sometimes, a dark or opaque window is used to further enhance the visual appeal of the design by hiding the sensor from view. This window material is typically transparent plastic or glass. Any physical component that affects the light that illuminates the sensing area of a light sensor also affects the performance of that light sensor. Therefore, for optimal performance, make sure to understand and control the effect of these components. Design a window width and height to permit light from a sufficient field of view to illuminate the sensor. For best performance, use a field of view of at least ±35°, or ideally ±45° or more. Understanding and designing the field of view is discussed further in application report SBEA002, OPT3001: Ambient Light Sensor Application Guide.

example is given in Dark Window Selection and Compensation. perception under high-infrared lighting conditions, such as from incandescent, halogen, or sunlight sources. further decreases the ratio of visible to infrared light, and thus decreases sensor measurement accuracy. are achieved under a dark window with similar spectral responses to those shown in Figure 31. uniformity issues disrupting the measurement process. ramifications of the optical physics of light pipes within the full context of his design and objectives.

8.2 Typical Application

section. The schematic for this design is shown in Figure 29. Figure 29. Measuring Ambient Light in a Product Case Behind a Dark Window

8.2.1 Design Requirements

• Sensor is hidden under dark glass so that sensor is not obviously visible. Note that this requirement is subjective to designer preference.
• Accuracy of measurement of fluorescent light is 15%
• Variation in measurement between fluorescent, halogen, and incandescent bulbs (also known as light source variation) is as small as possible.

8.2.2 Detailed Design Procedure

8.2.2.1 Optomechanical Design

Figure 30. Product Case and Window Over the OPT3001

8.2.2.2 Dark Window Selection and Compensation

sensor and therefore impedes sensor accuracy. visible transmission to infrared transmission), the OPT3001 still performs well as shown in Figure 34.

8.2.3 Application Curves

reports results very similar to the lux meter. light. The results are shown in Figure 34. still good. All data are both within 15% of the correct answer, and within 15% of the other bulb measurements. closer ratio of visible light transmission to infrared light transmission. Figure 33. Uncompensated and Compensated Output of Figure 34. Compensated Output of the OPT3001 Under a

8.3 Do's and Don'ts

optical surface must be kept clean of fingerprints, dust, and other optical-inhibiting contaminants. If the device optical surface requires cleaning, the use of de-ionized water or isopropyl alcohol is recommended. and excessive force that can scratch the optical surface.

SBOS681C – JULY 2014– REVISED NOVEMBER 2017 www.ti.com Product Folder Links: OPT3001 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated

9 Power-Supply Recommendations

Although the OPT3001 has low sensitivity to power-supply issues, good practices are always recommended. For best performance, the OPT3001 VDD pin must have a stable, low-noise power supply with a 100-nF bypass capacitor close to the device and solid grounding. There are many options for powering the OPT3001 because the device current consumption levels are very low.

10 Layout

10.1 Layout Guidelines

most optimal optical layout is to place all close components on the opposite side of the PCB from the OPT3001. However, this approach may not be practical for the constraints of every design. An example PCB layout with the OPT3001 is shown in Figure 35.

10.2 Layout Example

Figure 35. Example PCB Layout With the OPT3001

SBOS681C – JULY 2014– REVISED NOVEMBER 2017 www.ti.com Product Folder Links: OPT3001 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated

11 Device and Documentation Support

11.1 Documentation Support

11.1.1 Related Documentation

For related documentation see the following:

• OPT3001: Ambient Light Sensor Application Guide
• OPT3001EVM user's guide
• QFN/SON PCB Attachment application report

11.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

11.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

11.4 Trademarks

E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

11.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

11.6 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

12.1 Soldering and Handling Recommendations

The OPT3001 has been qualified for three soldering reflow operations per JEDEC JSTD-020. Note that excessive heat may discolor the device and affect optical performance. See application report SLUA271, QFN/SON PCB Attachment, for details on soldering thermal profile and other information. If the OPT3001 must be removed from a PCB, discard the device and do not reattach.

performance, solder flux and any other possible debris must be cleaned after soldering processes.

12.2 DNP (S-PDSO-N6) Mechanical Drawings

Figure 36. Package Orientation Visual Reference of Pin 1

Figure 37. Mechanical Outline Showing Sensing Area Location

www.ti.com 29-Jul-2026 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) OPT3001DNPR Active Production USON (DNP) | 6 3000 | LARGE T&R Yes NIPDAUAG Level-3-260C-168 HR -40 to 85 ED OPT3001DNPR.A Active Production USON (DNP) | 6 3000 | LARGE T&R Yes NIPDAUAG Level-3-260C-168 HR -40 to 85 ED (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF OPT3001 :

• Automotive : OPT3001-Q1 Addendum-Page 1

www.ti.com 29-Jul-2026 NOTE: Qualified Version Definitions:

• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 15-Jan-2026 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 15-Jan-2026 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) OPT3001DNPR USON DNP 6 3000 356.0 338.0 48.0 Pack Materials-Page 2

NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. 4. Optical package with clear mold compound. B A SEATING PLANE C0.65 0.55 0.05 0.00 0.08 PIN 1 INDEX AREA

0.1 C A B

0.05 C PIN 1 ID EXPOSED THERMAL PAD 3 4 1 6 3 4 2.1 1.9 2.1 1.9 (0.2) TYP 2X 1.3 4X 0.65 0.65±0.1 6X 0.35 0.25 6X 0.3 0.2 1.35±0.1 PACKAGE OUTLINE 4221434/C 01/2018 www.ti.com USON - 0.65 mm mm max height PLASTIC SMALL OUTLINE NO-LEAD DNP0006A

NOTES: (continued) 5. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271) . NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS

0.07 MAX

0.07 MIN

SCALE: 30X SYMM SYMM (Ø0.2) VIA TYP SEE DETAILS 3 4 (1.9) 6X (0.25) 6X (0.5) 4X (0.65) (0.8) (0.65) (1.35) EXAMPLE BOARD LAYOUT 4221434/C 01/2018 www.ti.com USON - 0.65 mm mm max heightDNP0006A PLASTIC SMALL OUTLINE NO-LEAD

NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SOLDER PASTE EXAMPLE BASED ON 0.125mm THICK STENCIL EXPOSED PAD 88% PRINTED SOLDER COVERAGE BY AREA SCALE: 40X SYMM SYMM 3 4 METAL TYP (1.9) 4X (0.65) 6X (0.5) 6X (0.25) (0.62) (1.25) EXAMPLE STENCIL DESIGN 4221434/C 01/2018 www.ti.com USON - 0.65 mm mm max heightDNP0006A PLASTIC SMALL OUTLINE NO-LEAD

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