OPA128 BURR-BROWN | Alldatasheet
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Technical content
Difet® Electrometer-Grade OPERATIONAL AMPLIFIER OPA128 Noise-Free Cascode Ω1k Trim +In –In Case (Guard) Output OPA128 Sim plified Circuit +VCC –VCC 8 7 28kΩ Ω1k 2kΩ 2kΩ Trim 28kΩ
FEATURES
l ULTRA-LOW BIAS CURRENT: 75fA max l LOW OFFSET: 500 µV max l LOW DRIFT: 5µV/°C max l HIGH OPEN-LOOP GAIN: 110dB min l HIGH COMMON-MODE REJECTION: 90dB min l IMPROVED REPLACEMENT FOR AD515 AND AD549
DESCRIPTION
The OPA128 is an ultra-low bias current monolithic operational amplifier. Using advanced geometry dielectrically-isolated FET ( Difet® ) inputs, this mono- lithic amplifier achieves a performance level exceed- ing even the best hybrid electrometer amplifiers. Laser-trimmed thin-film resistors give outstanding volt- age offset and drift performance. A noise-free cascode and low-noise processing give the OPA128 excellent low-level signal handling capa- bilities. Flicker noise is very low. The OPA128 is an improved pin-for-pin replacement for the AD515. Difet® Burr-Brown Corp.
APPLICATIONS
l RADIATION-HARD EQUIPMENT ©1986 Burr-Brown Corporation PDS-653E Printed in U.S.A. May, 1995 International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 SBOS148
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. SPECIFICATIONS ELECTRICAL At VCC = ±15VDC and TA = +25°C, unless otherwise noted. Pin 8 connected to ground. OPA128JM OPA128KM OPA128LM OPA128SM PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS INPUT BIAS CURRENT (1) Input Bias Current V CM = 0VDC, R L ≥ 10kΩ± 150 ±300 ±75 ±150 ±40 ±75 ±75 ±150 fA OFFSET CURRENT (1) Input Offset Current V CM = 0VDC, R L ≥ 10kΩ 65 30 30 30 fA OFFSET VOLTAGE (1) Input Offset Voltage V CM = 0VDC ±260 ±1000 ±140 ±500 ±140 ±500 ±140 ±500 µV Average Drift T A = TMIN to TMAX ±20 ±10 ±5 ±10 µV/°C Supply Rejection 80 120 90 120 90 120 90 120 dB NOISE Voltage: fO = 10Hz 92 92 92 92 nV/ √Hz fO = 100Hz 78 78 78 78 nV/ √Hz fO = 1kHz 27 27 27 27 nV/ √Hz fO = 10kHz 15 15 15 15 nV/ √Hz fB = 10Hz to 10kHz 2.4 2.4 2.4 2.4 µVrms fB = 0.1Hz to 10Hz 4444 µVp-p Current: fB = 0.1Hz to 10Hz 4.2 3 2.3 3 fA, p-p IMPEDANCE Differential 10 13 || 1 10 13 || 1 10 13 || 1 10 13 || 1 Ω || pF Common-Mode 10 15 || 2 10 15 || 2 10 15 || 2 10 15 || 2 Ω || pF VOLTAGE RANGE (4) Common-Mode Input Range ±10 ±12 ±10 ±12 ±10 ±12 ±10 ±12 V Common-Mode Rejection V IN = ±10VDC 80 118 90 118 90 118 90 118 dB OPEN-LOOP GAIN, DC Open-Loop Voltage Gain R L ≥ 2kΩ 94 128 110 128 110 128 110 128 dB FREQUENCY RESPONSE Unity Gain, Small Signal (2) 0.5 1 0.5 1 0.5 1 0.5 1 MHz Full Power Response 20Vp-p, R L = 2kΩ 47 47 47 47 kHz Slew Rate V O = ±10V, RL = 2kΩ 0 . 5 31 31 31 3V / µs Settling Time, 0.1% Gain = –1, R L = 2kΩ 5555 µs 0.01% 10V Step 10 10 10 10 µs Overload Recovery, 50% Overdrive (3) Gain = –1 5555 µs RATED OUTPUT Voltage Output R L = 2kΩ± 10 ±13 ±10 ±13 ±10 ±13 ±10 ±13 V Current Output V O = ±10VDC ±5 ±10 ±5 ±10 ±5 ±10 ±5 ±10 mA Output Resistance DC, Open Loop 100 100 100 100 Ω Load Capacitance Stability Gain = +1 1000 1000 1000 1000 pF Short Circuit Current 10 34 55 10 34 55 10 34 55 10 34 55 mA POWER SUPPLY Rated Voltage ±15 ±15 ±15 ±15 VDC Voltage Range, Derated Performance ±5 ±18 ±5 ±18 ±5 ±18 ±5 ±18 VDC Current, Quiescent I TEMPERATURE RANGE Specification Ambient Temp. 0 +70 0 +70 0 +70 –55 +125 °C Operating Ambient Temp. –55 +125 –55 +125 –55 +125 –55 +125 °C Storage Ambient Temp. –65 +150 –65 +150 –65 +150 –65 +150 °C θ Junction-Ambient 200 200 200 200 °C/W NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up. Bias current doubles approximately every 11°C. (2) Sample tested. (3) Overload recovery is defined as the time required for the output to return from saturation to linear operation following the removal of a 50% input overdrive. (4) If it is possible for the input voltage to exceed the supply voltage, a series protection resistor should be added to limit input current to 0.5mA. The input devices can withstand overload currents of 0.3mA indefinitely without damage.
3 OPA128
NOTES: (1) Packages must be derated based on θCA = 150°C/W or θJA = 200°C/W. (2) Short circuit may be to power supply common only. Rating applies to +25°C ambient. Observe dissipation limit and TJ. ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS) At VCC = ±15VDC and TA = TMIN and TMAX , unless otherwise noted. ABSOLUTE MAXIMUM RATINGS OPA128JM OPA128KM OPA128LM OPA128SM PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS TEMPERATURE RANGE Specification Range Ambient Temp. 0 +70 0 +70 0 +70 –55 +125 °C INPUT BIAS CURRENT (1) Input Bias Current V CM = 0VDC ±2.5 ±8 ±1.3 ±4 ±0.7 ±2 ±43 ±170 pA OFFSET CURRENT (1) Input Offset Current V CM = 0VDC 1.1 0.6 0.6 18 pA OFFSET VOLTAGE (1) Input Offset Voltage V CM = 0VDC ±2.2mV ±1mV ±750 ±1.5mV µV Average Drift ±20 ±10 ±5 ±10 µV/°C Supply Rejection 74 114 80 114 80 114 80 106 dB VOLTAGE RANGE (2) Common-Mode Input Range ±10 ±11 ±10 ±11 ±10 ±11 ±10 ±11 V Commmon-Mode Rejection V IN = ±10VDC 74 112 80 112 80 112 74 104 dB OPEN-LOOP GAIN, DC Open-Loop Voltage Gain R L ≥ 2kΩ 90 125 104 125 104 125 90 122 dB RATED OUTPUT Voltage Output R L = 2k± 10 ±10 ±10 ±10 V Current Output V O = ±10VDC ±5 ±5 ±5 ±5m A Short Circuit Current V O = 0VDC 10 22 10 22 10 22 10 18 mA POWER SUPPLY NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up. (2) If it is possible for the input voltage to exceed the supply voltage, a series protection resistor should be added to limit input current to 0.5mA. The input devices can withstand overload currents of 0.3mA indefinitely without damage. CONNECTION DIAGRAM Offset Trim Offset Trim Output +VCC Substrate and Case –In +In OPA128 Top View –VCC PACKAGE DRAWING PRODUCT PACKAGE NUMBER (1) OPA128JM TO-99 001 OPA128KM TO-99 001 OPA128LM TO-99 001 OPA128SM TO-99 001 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.
PACKAGE INFORMATION
TEMPERATURE BIAS CURRENT, PRODUCT PACKAGE RANGE max (fA) OPA128JM TO-99 0 °C to +70°C ±300 OPA128KM TO-99 0 °C to +70°C ±150 OPA128LM TO-99 0 °C to +70°C ±75 OPA128SM TO-99 –55 °C to +125°C ±150
ORDERING INFORMATION
1 Offset Trim
2 –In 3 +In 4– V CC
5 Offset Trim
6 Output
8 Substrate
Substrate Bias: Isolated, normally con- nected to common. MECHANICAL INFORMATION MILS (0.001") MILLIMETERS Die Size 96 x 71 ±5 2.44 x 1.80 ±0.13 Die Thickness 20 ±3 0.51 ±0.08 Min. Pad Size 4 x 4 0.10 x 0.10 Backing None TYPICAL PERFORMANCE CURVES At TA = +25°C, ±15VDC, unless otherwise noted. OPA128 DIE TOPOGRAPHY COMMON-MODE REJECTION vs INPUT COMMON-MODE VOLTAGE –15 Common-Mode Voltage (V) –10 –5 0 5 10 15 Common-Mode Rejection (dB) 120 110 100 11 k 10 100 10k 100k 1M 10M Frequency (Hz) 100 120 140 Common-Mode Rejection (dB) COMMON-MODE REJECTION vs FREQUENCY 11 k 10 100 10k 100k 1M 10M Frequency (Hz) 100 120 140 Voltage Gain (dB) OPEN-LOOP FREQUENCY RESPONSE –180 –135 –90 –45 Phase Shift (Degrees) Phase Margin 90° Ø Gain 11 k 10 100 10k 100k 1M 10M Frequency (Hz) 100 120 140 Power Supply Rejection (dB) POWER SUPPLY REJECTION vs FREQUENCY –PSRR +PSRR
5 OPA128
TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, +15VDC, unless otherwise noted. –50 –25 0 25 50 75 125 Ambient Temperature (°C) 100pA 10pA Bias and Offset Current (fA) BIAS AND OFFSET CURRENT vs TEMPERATURE 100 100 1pA SM IOS IB –75 –50 –25 0 25 50 125 Ambient Temperature (°C) Gain-Bandwidth (MHz) GAIN-BANDWIDTH AND SLEW RATE vs TEMPERATURE 75 100 Slew Rate (V/µs) –75 –50 –25 0 25 50 125 Ambient Temperature (°C) 1.5 0.5 Supply Current (mA) SUPPLY CURRENT vs TEMPERATURE 75 100 0 5 10 20 Supply Voltage (±VCC ) Gain-Bandwidth (MHz) GAIN-BANDWIDTH AND SLEW RATE vs SUPPLY VOLTAGE Slew Rate (V/µs) – Slew + Slew BIAS AND OFFSET CURRENT vs INPUT COMMON-MODE VOLTAGE –15 –10 –5 0 5 10 15 Normalized Bias and Offset Current Common-Mode Voltage (V) 0.01 0.1 100 –75 –50 –25 0 25 50 125 Ambient Temperature (°C) 140 130 120 110 PSR, CMR, Voltage Gain (dB) OPEN-LOOP GAIN, PSR, AND CMR vs TEMPERATURE 75 100 PSR CMR AOL
LARGE SIGNAL TRANSIENT RESPONSE Time (µs) Output Voltage (V) SMALL SIGNAL TRANSIENT RESPONSE Time (µs) Output Voltage (mV) TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, +15VDC, unless otherwise noted. 05 0 25 –10 –80 –40 01 0 8642 5µs 5V 5µs 20mV 1µs 0 5 10 20 Supply Voltage (±VCC ) Common-Mode Voltage (±V) COMMON-MODE INPUT RANGE vs SUPPLY VOLTAGE 15 0 50 100 150 200 250 350 Additional Power Dissipation (mW) 100pA 10pA Bias Current (fA) BIAS CURRENT vs ADDITIONAL POWER DISSIPATION 300 100 1pA KM Frequency (Hz) INPUT VOLTAGE NOISE SPECTRAL DENSITY Voltage Density (nV/ Hz) 1 10 100 1k 10k 100k 100 FULL-POWER OUTPUT vs FREQUENCY 100k Frequency (Hz) 1k 10k 1M Output Voltage (Vp-p)
7 OPA128
external null circuit unconnected. noise pickup (see Figure 2). rigid, wiring to preclude microphonic noise generation. be able to resolve the amplifier’s extremely low bias current.
- Humidity or dew point condensation
- Circuit contamination from fingerprints or anti-static
BIFET ® National Semiconductor Corp. FIGURE 2. Connection of Input Guard. Guard top and bottom of board. Teflon® E.I. Du Pont de Nemours & Co. FIGURE 1. Offset Voltage Trim. common-mode voltage limits should be observed. sion IC operational amplifier.
FIGURE 3. High Impedance (1015Ω ) Amplifier. FIGURE 5. FET Input Instrumentation Amplifier for Biomedical Applications. FIGURE 6. Low-Droop Positive Peak Detector.
6 Output8
for negative peak detection. FIGURE 4. Piezoelectric Transducer Charge Amplifier.
9 OPA128
FIGURE 8. Current-to-Voltage Converter.FIGURE 7. Sensitive Photodiode Amplifier. FIGURE 9. Biased Current-to-Voltage Converter. <1pF to prevent gain peaking. Circuit must be well shielded.
Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) OPA128JM NRND TO-99 LMC 8 20 TBD Call TI Level-NA-NA-NA OPA128KM NRND TO-99 LMC 8 20 TBD Call TI Level-NA-NA-NA OPA128LM NRND TO-99 LMC 8 20 TBD Call TI Level-NA-NA-NA OPA128SM NRND TO-99 LMC 8 20 TBD Call TI Level-NA-NA-NA (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 22-Jun-2005 Addendum-Page 1
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