OPA121KM3

OPA121 TI1 | Alldatasheet

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Technical content

Low Cost Precision Difet® OPERATIONAL AMPLIFIER Difet® , Burr-Brown Corp. BIFET ® , National Semiconductor Corp. OPA121

FEATURES

l LOW NOISE: 6nV/√Hz typ at 10kHz l LOW BIAS CURRENT: 5pA max l LOW OFFSET: 2mV max l LOW DRIFT: 3µV/°C typ l HIGH OPEN-LOOP GAIN: 110dB min l HIGH COMMON-MODE REJECTION: 86dB min Noise-Free Cascode* Ω10k Trim +In –In Case (TO-99) and Substrate Output OPA121 Simplified Circuit +VCC –VCC 8 7 2kΩ Ω10k 2kΩ 2kΩ 2kΩ *Patented Trim

DESCRIPTION

The OPA121 is a precision monolithic dielectrically- isolated FET (Difet® ) operational amplifier. Out- standing performance characteristics are now available for low-cost applications. Noise, bias current, voltage offset, drift, open-loop gain, common-mode rejection, and power supply rejection are superior to BIFET ® amplifiers. Very low bias current is obtained by dielectric isolation with on-chip guarding. Laser-trimming of thin-film resistors gives very low offset and drift. Extremely low noise is achieved with new circuit design techniques (patented). A new cascode design allows high precision input specifica- tions and reduced susceptibility to flicker noise. Standard 741 pin configuration allows upgrading of existing designs to higher performance levels.

APPLICATIONS

l RADIATION HARD EQUIPMENT International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © 1984 Burr-Brown Corporation PDS-539F Printed in U.S.A. September, 1993 SBOS139

NOTES: (1) Sample tested. (2) Offset voltage, offset current, and bias current are specified with the units fully warmed up. (3) Overload recovery is defined as the time required for the output to return from saturation to linear operation following the removal of a 50% input overdrive. (4) 100°C/W for KU grade. SPECIFICATIONS ELECTRICAL At VCC = ±15VDC and TA = +25°C unless otherwise noted. Pin 8 connected to ground. OPA121KM OPA121KP, KU PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS INPUT NOISE Voltage, fO = 10Hz (1) 40 50 nV/ √Hz fO = 100Hz (1) 15 18 nV/ √Hz fO = 1kHz (1) 8 10 nV/ √Hz fO = 10kHz (1) 6 7 nV/ √Hz fB = 10Hz to 10kHz (1) 0.7 0.8 µVrms fB = 0.1Hz to 10 Hz (1) 1.6 2 µVp-p Current, fB = 0.1Hz to 10Hz (1) 15 21 fA, p-p fO = 0.1Hz thru 20kHz (1) 0.8 1.1 fA/ √Hz OFFSET VOLTAGE (2) Input Offset Voltage V CM = 0VDC ±0.5 ±2 ±0.5 ±3m V Average Drift T A = TMIN to TMAX ±3 ±10 ±3 ±10 µV/°C Supply Rejection 86 104 86 104 dB ±6 ±50 ±6 ±50 µV/V BIAS CURRENT (2) Input Bias Current V CM = 0VDC ±1 ±5 ±1 ±10 pA Device Operating OFFSET CURRENT (2) Input Offset Current V CM = 0VDC ±0.7 ±4 ±0.7 ±8p A Device Operating IMPEDANCE Differential 10 13 || 1 10 13 || 1 Ω || pF Common-Mode 10 14 || 3 10 14 || 3 Ω || pF VOLTAGE RANGE Common-Mode Input Range ±10 ±11 ±10 ±11 V Common-Mode Rejection V IN = ±10VDC 86 104 82 100 dB OPEN-LOOP GAIN, DC Open-Loop Voltage Gain R L ≥ 2kΩ 110 120 106 114 dB FREQUENCY RESPONSE Unity Gain, Small Signal 2 2 MHz Full Power Response 20Vp-p, R L = 2kΩ 32 32 kHz Slew Rate V O = ±10V, RL = 2kΩ 22 V / µs Settling Time, 0.1% Gain = –1, R L = 2kΩ 66 µs 0.01% 10V Step 10 10 µs Overload Recovery, 50% Overdrive(3) Gain = –1 5 5 µs RATED OUTPUT Voltage Output R L = 2kΩ± 11 ±12 ±11 ±12 V Current Output V O = ±10VDC ±5.5 ±10 ±5.5 ±10 mA Output Resistance DC, Open Loop 100 100 Ω Load Capacitance Stability Gain = +1 1000 1000 pF Short Circuit Current 10 40 10 40 mA POWER SUPPLY Rated Voltage ±15 ±15 VDC Voltage Range, Derated Performance ±5 ±18 ±5 ±18 VDC Current, Quiescent I O = 0mADC 2.5 4 2.5 4.5 mA TEMPERATURE RANGE Specification Ambient Temperature 0 +70 0 +70 °C Operating Ambient Temperature –40 +85 –25 +85 °C Storage Ambient Temperature –65 +150 –55 +125 °C θ Junction-Ambient 200 150 (4) °C/W The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.

ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS) At VCC = ±15VDC and TA = TMIN to TMAX unless otherwise noted. OPA121KM OPA121KP, KU PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS TEMPERATURE RANGE Specification Range Ambient Temperature 0 +70 0 +70 °C INPUT OFFSET VOLTAGE (1) Input Offset Voltage V CM = 0VDC ±1 ±3 ±1 ±5m V Average Drift ±3 ±10 ±3 ±10 µV/°C Supply Rejection 82 94 82 94 dB ±20 ±80 ±20 ±80 µV/V BIAS CURRENT (1) Input Bias Current V CM = 0VDC ±23 ±115 ±23 ±250 pA Device Operating OFFSET CURRENT (1) Input Offset Current V CM = 0VDC ±16 ±100 ±16 ±200 pA Device Operating VOLTAGE RANGE Common-Mode Input Range ±10 ±11 ±10 ±11 V Common-Mode Rejection V IN = ±10VDC 82 98 80 96 dB OPEN-LOOP GAIN, DC Open-Loop Voltage Gain R L ≥ 2kΩ 106 116 100 110 dB RATED OUTPUT Voltage Output R L = 2kΩ± 10.5 ±11 ±10.5 ±11 V Current Output V O = ±10VDC ±5.25 ±10 ±5.25 ±10 mA Short Circuit Current V O = 0VDC 10 40 10 40 mA POWER SUPPLY Current, Quiescent I O = 0mADC 2.5 4.5 2.5 5 mA NOTE: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up.

PACKAGE INFORMATION

MODEL PACKAGE NUMBER (1) OPA121KM TO-99 001 OPA121KP 8-Pin Plastic DIP 006 OPA121KU 8-Pin SOIC 182 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book. CONNECTION DIAGRAMS Top View M-Package TO-99 (Hermetic) Top View P-Package Plastic Mini-DIP U-Package Plastic SOIC Offset Trim Offset Trim Output +V CC Substrate and Case –In +In OPA121 –V CC OPA121 4 5 8Offset Trim +V CC–In +In –V CC Output Offset Trim Substrate TEMPERATURE MODEL PACKAGE RANGE OPA121KM TO-99 0 °C to +70°C OPA121KP 8-Pin Plastic DIP 0 °C to +70°C OPA121KU 8-Pin SOIC 0 °C to +70°C

ORDERING INFORMATION

Operating Temperature Range Lead Temperature NOTES: (1) Packages must be derated based on θJA = 150 °C/W (P package); θJA = 200°C/W (M package); θJA = 100°C/W (U package). (2) Short circuit may be to power supply common only. Rating applies to +25°C ambient. Observe dissipation limit and TJ.

11 k 10 100 10k 100k 1M 10M Frequency (Hz) 100 120 140 Voltage Gain (dB) OPEN-LOOP FREQUENCY RESPONSE KM –180 –135 –90 –45 Phase Shift (Degrees) Phase Margin ≈ 65° Ø Gain 11 k 10 100 10k 100k 1M 10M Frequency (Hz) 100 120 140 Common-Mode Rejection (dB) COMMON-MODE REJECTION vs FREQUENCY KM 11 k 10 100 10k 100k 1M 10M Frequency (Hz) 100 120 140 Power Supply Rejection (dB) POWER SUPPLY REJECTION vs FREQUENCY Common-Mode Voltage (V) 0.01 0.1 Bias Current (pA) BIAS AND OFFSET CURRENT vs INPUT COMMON-MODE VOLTAGE 0.01 0.1 Offset Current (pA) Bias Current Offset Current KM –50 –25 0 +25 +50 +75 +125 Ambient Temperature (°C) 0.01 100 0.1 Bias Current (pA) BIAS AND OFFSET CURRENT vs TEMPERATURE +100 0.01 100 0.1 Offset Current (pA) KM 1 10 100 1k 10k 100k 1M Frequency (Hz) 100 Voltage Noise (nV/√Hz) INPUT VOLTAGE NOISE SPECTRAL DENSITY KP, KU KM TYPICAL PERFORMANCE CURVES TA = +25°C, VCC = ±15VDC unless otherwise noted.

FIGURE 1. Offset Voltage Trim.INPUT PROTECTION levels even if both supply voltages are lost. TA = +25°C, VCC = ±15VDC unless otherwise noted.

precision IC operational amplifier. be shielded along with the external input circuitry. which is at the signal input potential. age and noise pickup (see Figure #2). amplifiers are affected by common-mode voltage (Figure 3). is not compromised by common-mode voltage. FIGURE 2. Connection of Input Guard.

3 OPA121

Guard top and bottom of board. FIGURE 3. Input Bias Current vs Common-Mode Voltage. Teflon™ E.I. du Pont de Nemours & Co.

www.ti.com 10-Jun-2014 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples OPA121KM OBSOLETE TO-99 LMC 8 TBD Call TI Call TI OPA121KM3 OBSOLETE TO-99 LMC 8 TBD Call TI Call TI OPA121KP OBSOLETE PDIP P 8 TBD Call TI Call TI OPA121KP4 OBSOLETE PDIP P 8 TBD Call TI Call TI OPA121KU ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR 0 to 70 OPA 121KU OPA121KU/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR 0 to 70 OPA 121KU OPA121KUE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR 0 to 70 OPA 121KU (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.

www.ti.com 10-Jun-2014 Addendum-Page 2 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) OPA121KU/2K5 SOIC D 8 2500 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 Pack Materials-Page 2

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