OPA111BM

OPA111 TI1 | Alldatasheet

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Technical content

Low Noise Precision Difet ® OPERA TIONAL AMPLIFIER FEA TURES l LOW NOISE: 100% Tested, 8nV√Hz max (10kHz) l LOW BIAS CURRENT: 1pA max l LOW OFFSET: 250 µV max l LOW DRIFT: 1 µV/°C max l HIGH OPEN-LOOP GAIN: 120dB min l HIGH COMMON-MODE REJECTION: 100dB min APPLICA TIONS l PRECISION INSTRUMENTATION l DATA ACQUISITION l TEST EQUIPMENT l OPTOELECTRONICS l MEDICAL EQUIPMENT—CAT SCANNER l RADIATION HARD EQUIPMENT International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 BIFET ® National Semiconductor Corp., Difet® Burr-Brown Corp. OPA111 Case and Substrate Output Trim +VCC Noise-Free Cascode* Trim +In –In –VCC 10kΩ 10kΩ *Patented 2kΩ2kΩ 2kΩ 2kΩ

DESCRIPTION

The OPA111 is a precision monolithic dielectrically isolated FET (Difet® ) operational amplifier. Outstand- ing performance characteristics allow its use in the most critical instrumentation applications. Noise, bias current, voltage offset, drift, open-loop gain, common-mode rejection, and power supply re- jection are superior to BIFET® amplifiers. Very low bias current is obtained by dielectric isola- tion with on-chip guarding. Laser trimming of thin-film resistors gives very low offset and drift. Extremely low noise is achieved with patented circuit design techniques. A new cascode design allows high precision input specifications and reduced susceptibility to flicker noise. Standard 741 pin configuration allows upgrading of existing designs to higher performance levels. © 1984 Burr-Brown Corporation PDS-526K Printed in U.S.A. August, 1995 SBOS138

At VCC = ±15VDC and TA = +25°C unless otherwise noted. OPA111AM OPA111BM OPA111SM PARAMETER CONDITION MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS INPUT NOISE Voltage, fO = 10Hz 100% Tested 40 80 30 60 40 80 nV/ √Hz fO = 100Hz 100% Tested 15 40 11 30 15 40 nV/ √Hz fO = 1kHz 100% Tested 8 15 7 12 8 15 nV/ √Hz fO = 10kHz 100% Tested 6 8 6 8 6 8 nV/ √Hz Current, fB = 0.1Hz to 10Hz (1) 9.5 15 7.5 12 9.5 15 fAp-p OFFSET VOLTAGE (2) Input Offset Voltage V CM = 0VDC ±100 ±500 ±50 ±250 ±100 ±500 µV Average Drift T A = TMIN to TMAX ±2 ±5 ±0.5 ±1 ±2 ±5 µV/°C Supply Rejection V CC = ±10V to ±18V 90 110 100 110 90 110 dB BIAS CURRENT (2) Input Bias Current V CM = 0VDC ±0.8 ±2 ±0.5 ±1 ±0.8 ±2p A OFFSET CURRENT (2) IMPEDANCE Differential 10 13 || 1 10 13 || 1 10 13 || 1 Ω || pF Common-Mode 10 14 || 3 10 14 || 3 10 14 || 3 Ω || pF VOLTAGE RANGE Common-Mode Input Range ±10 ±11 ±10 ±11 ±10 ±11 V Common-Mode Rejection V IN = ±10VDC 90 110 100 110 90 110 dB OPEN-LOOP GAIN, DC Open-Loop Voltage Gain R L ≥ 2kΩ 114 125 120 125 114 125 dB FREQUENCY RESPONSE Unity Gain, Small Signal 2 2 2 MHz Full Power Response 20Vp-p, R L = 2kΩ 16 32 16 32 16 32 kHz Slew Rate V O = ±10V, RL = 2kΩ 12 12 12 V / µs Settling Time, 0.1% Gain = –1, R L = 2kΩ 666 µs 0.01% 10V Step 10 10 10 µs Overload Recovery, 50% Overdrive(3) Gain = –1 5 5 5 µs RATED OUTPUT Voltage Output R L = 2kΩ± 11 ±12 ±11 ±12 ±11 ±12 V Current Output V O = ±10VDC ±5.5 ±10 ±5.5 ±10 ±5.5 ±10 mA Output Resistance DC, Open Loop 100 100 100 Ω Load Capacitance Stability Gain = +1 1000 1000 1000 pF Short Circuit Current 10 40 10 40 10 40 mA POWER SUPPLY Rated Voltage ±15 ±15 ±15 VDC Voltage Range, Derated Performance ±5 ±18 ±5 ±18 ±5 ±18 VDC Current, Quiescent I TEMPERATURE RANGE Specification Ambient Temp. –25 +85 –25 +85 –55 +125 °C Operating Ambient Temp. –55 +125 –55 +125 –55 +125 °C Storage Ambient Temp. –65 +150 –65 +150 –65 +150 °C θ Junction-Ambient 200 200 200 °C/W NOTES: (1) Sample tested—this parameter is guaranteed. (2) Offset voltage, offset current, and bias current are measured with the units fully warmed up. (3) Overload recovery is defined as the time required for the output to return from saturation to linear operation following the removal of a 50% input overdrive. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR- BROWN product for use in life support devices and/or systems.

NOTES: (1) Packages must be derated based on θJC = 150°C/W or θJA = 300°C/W. (2) For supply voltages less than ±18VDC, the absolute maximum input voltage is equal to +18V > VIN > –VCC – 6V. See Figure 2. (3) Short circuit may be to power supply common only. Rating applies to +25°C ambient. Observe dissipation limit and TJ. ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS) At VCC = ±15VDC and TA = TMIN to TMAX unless otherwise noted. OPA111AM OPA111BM OPA111SM PARAMETER CONDITION MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS TEMPERATURE RANGE Specification Range Ambient Temp. –25 +85 –25 +85 –55 +125 °C INPUT OFFSET VOLTAGE (1) Input Offset Voltage V CM = 0VDC ±220 ±1000 ±110 ±500 ±300 ±1500 µV Average Drift ±2 ±5 ±0.5 ±1 ±2 ±5 µV/°C Supply Rejection V CC = ±10V to ±18V 86 100 90 100 86 100 dB BIAS CURRENT (1) Input Bias Current V CM = 0VDC ±50 ±250 ±30 ±130 ±820 ±4100 pA OFFSET CURRENT (1) Input Offset Current V CM = 0VDC ±30 ±200 ±15 ±100 ±510 ±3100 pA VOLTAGE RANGE Common-Mode Input Range ±10 ±11 ±10 ±11 ±10 ±11 V Common-Mode Rejection V IN = ±10VDC 86 100 90 100 86 100 dB OPEN-LOOP GAIN, DC Open-Loop Voltage Gain R L ≥ 2kΩ 110 120 114 120 110 120 dB RATED OUTPUT Voltage Output R Current Output V O = ±10VDC ±5.25 ±10 ±5.25 ±10 ±5.25 ±10 mA Short Circuit Current V O = 0VDC 10 40 10 40 10 40 mA POWER SUPPLY Current, Quiescent I NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up.

ORDERING INFORMATION

TEMPERATURE VOLTAGE, MODEL PACKAGE RANGE MAX ( µV) OPA111AM TO-99 –25 °C to +85°C ±500 OPA111BM TO-99 –25 °C to +85°C ±250 OPA111SM TO-99 –55 °C to +125°C ±500 CONNECTION DIAGRAM Top View OPA 111 Offset Trim Offset Trim Output +V CC Substrate and Case –V CC –In +In

PACKAGE INFORMATION

MODEL PACKAGE NUMBER (1) OPA111AM TO-99 001 OPA111BM TO-99 001 OPA111SM TO-99 001 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book.

1 Offset Trim

2 –In 3 +In 4– V S

5 Offset Trim

6 Output

S

8 Substrate

Substrate Bias: This Dielectrically-Isolated Substrate is normally connected to common. MECHANICAL INFORMATION MILS (0.001") MILLIMETERS Die Size 95 x 71 ±5 2.41 x 1.80 ±0.13 Die Thickness 20 ±3 0.51 ±0.08 Min. Pad Size 4 x 4 0.10 x 0.10 Backing: None Transistor Count: 44 TYPICAL PERFORMANCE CURVES TA = +25°C, VCC = ±15VDC unless otherwise noted. INPUT CURRENT NOISE SPECTRAL DENSITY Frequency (Hz) 100101 10k 100k 1M 100 0.1 Current Noise (fA/√Hz BM INPUT VOLTAGE NOISE SPECTRAL DENSITY Frequency (Hz) 10k 100k 1M100101 100 Voltage Noise (nV/Hz) BM AM, SM

TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VCC = ±15VDC unless otherwise noted. TOTAL* INPUT VOLTAGE NOISE SPECTRAL DENSITY vs SOURCE RESISTANCE 100 Frequency (Hz) 1k 10k 100k1010.1 100 Voltage Noise (nV/Hz) R S = 10MΩ R S = 1MΩ R S = 100kΩ R S = 100Ω BM *Includes contribution from source resistance. TOTAL* INPUT VOLTAGE NOISE (PEAK-TO-PEAK) vs SOURCE RESISTANCE 104 105 106 107 108 109 1010 100 Voltage Noise (µVp-p) *Includes contribution from source resistance. Source Resistance (Ω ) BM fB = 0.1Hz to 10Hz VOLTAGE AND CURRENT NOISE SPECTRAL DENSITY vs TEMPERATURE –50 –25 0 25 50 75 100 125 Temperature (°C) –75 100 0.1 0.01 fO = 1kHz Current Noise (fA/√Hz) Voltage Noise (nV/√Hz) BIAS AND OFFSET CURRENT vs TEMPERATURE –50 Ambient Temperature (°C) –25 0 25 50 75 100 125 100 0.1 0.01 Bias Current (pA) BM 100 0.1 0.01 Offset Current (pA) BIAS AND OFFSET CURRENT vs INPUT COMMON-MODE VOLTAGE –15 –10 –5 0 5 10 15 0.1 0.01 Bias Current (pA) 0.1 0.01 Offset Current (pA) Common-Mode Voltage (V) Bias Current Offset Current POWER SUPPLY REJECTION vs FREQUENCY Frequency (Hz) 10 100 1k 10k 100k 1M 10M Power Supply Rejection (dB) 140 120 100

TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VCC = ±15VDC unless otherwise noted. COMMON-MODE REJECTION vs FREQUENCY Frequency (Hz) 10 100 1k 10k 100k 1M 10M Common-Mode Rejection (dB) 140 120 100 COMMON-MODE REJECTION vs INPUT COMMON MODE VOLTAGE –15 Common-Mode Voltage (V) –10 –5 0 5 10 15 Common-Mode Rejection (dB) 120 110 100 OPEN-LOOP FREQUENCY RESPONSE Frequency (Hz) 10 100 1k 10k 100k 1M 10M Voltage Gain (dB) 140 120 100 Phase Margin ≈ 65°C –45 –90 –135 –180 Phase Shift (Degrees) Gain GAIN-BANDWIDTH AND SLEW RATE vs TEMPERATURE –50 –25 0 25 50 75 100 125 Ambient Temperature (°C) Gain Bandwidth (MHz) –75 Slew Rate (V/µs) GAIN-BANDWIDTH AND SLEW RATE vs SUPPLY VOLTAGE Gain Bandwidth (MHz) Slew Rate (V/µs) 5 1 01 52 0 Supply Voltage (±VCC ) OPEN-LOOP GAIN vs TEMPERATURE 140 130 120 110 100 –50 –25 0 25 50 75 100 125 Ambient Temperature (°C) Voltage Gain (dB) –75

TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VCC = ±15VDC unless otherwise noted. MAXIMUM UNDISTORTED OUTPUT VOLTAGE vs FREQUENCY 100k Frequency (Hz) 1k 10k 1M Output Voltage (Vp-p) SMALL SIGNAL TRANSIENT RESPONSE Time (µs) –20 –40 –60 Output Voltage (mV) 23 4 SETTLING TIME vs CLOSED-LOOP GAIN Closed-Loop Gain (V/V) 10 100 1k 100 Settling Time (µs) 0.1%0.01% SUPPLY CURRENT vs TEMPERATURE –50 –25 0 25 50 75 100 125 Ambient Temperature (°C) Supply Current (mA) –75 INPUT OFFSET VOLTAGE WARM-UP DRIFT –10 –20 Time From Power Turn-On (Minutes) Offset Voltage Change (µV) 0 123456 COMMON-MODE REJECTION vs INPUT COMMON-MODE VOLTAGE –15 Common-Mode Voltage (V) –10 –5 0 5 10 15 Common-Mode Rejection (dB) 120 110 100

at the signal input potential. age and noise pickup (see Figure 3). FIGURE 4. Voltage Noise Spectral Density vs Source FIGURE 6. Pyroelectric Infrared Detector. FIGURE 3. Connection of Input Guard. total noise than an OP-27 (see Figure 4). amplifiers are affected by common-mode voltage (Figure 5). not compromised by common-mode voltage. FIGURE 5. Input Bias Currrent vs Common-Mode Voltage. Board layout for input guarding: guard top and bottom of board. Alternate: use Teflon® standoff for sensitive input pins. Teflon® E. I. Du Pont de Nemours & Co.

FIGURE 7. Zero-Bias Schottky Diode Square-Law RF FIGURE 8. Computerized Axial Tomography (CAT) Scan- FIGURE 9. High Impedance (1014Ω ) Amplifier. FIGURE 10. Sensitive Photodiode Amplifier. FIGURE 11. 60Hz Reject Filter. FIGURE 12. Piezoelectric Transducer Charge Amplifier. FIGURE 13. 0.6Hz Second-Order Low-Pass Filter.

6 Out

<1pF to prevent gain peaking. Circuit must be well shielded.

random distribution of parameters. FIGURE 16. ‘N’ Stage Parallel-Input Amplifier for Reduced Relative Amplifier Noise at the Output. FIGURE 14. RIAA Equalized Phono Preamplifier. FIGURE 15. High Sensitivity (under 1nW) Fiber Optic Receiver for 9600 Baud Manchester Data.

3 OPA111

3 OPA37

FIGURE 17. FET Input Instrumentation Amplifier. FIGURE 18. Low-Droop Positive Peak Detector.

6 Output8

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) OPA111AM NRND TO-99 LMC 8 20 Green (RoHS & no Sb/Br) AU N / A for Pkg Type OPA111BM NRND TO-99 LMC 8 1 Green (RoHS & no Sb/Br) AU N / A for Pkg Type OPA111SM OBSOLETE TO-99 LMC 8 TBD Call TI Call TI OPA111SMQ OBSOLETE TO-99 LMC 8 TBD Call TI Call TI (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 19-Apr-2010 Addendum-Page 1

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