OP97FPZ

OP97_07 AD | Alldatasheet

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Low Power, High Precision Operational Amplifier OP97 Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©1997–2007 Analog Devices, Inc. All rights reserved.

FEATURES

Low supply current: 600 μA maximum OP07 type performance Offset voltage: 20 μV maximum Offset voltage drift: 0.6 μV/°C maximum Very low bias current 25°C: 100 pA maximum −55°C to +125°C: 250 pA maximum High common-mode rejection: 114 dB minimum Extended industrial temperature range: −40°C to +85°C PIN CONNECTIONS 00299-001 NULL NULL V+–IN +IN OUT OVER COMP OP97 Figure 1. 8-Lead PDIP (P Suffix) offset trimming is not required in the majority of circuits. hold circuits that must operate at elevated temperatures. preferred device for portable and battery-powered instruments.

Rev. F | Page 2 of 16 TABLE OF CONTENTS

REVISION HISTORY

11/07—Rev. E to Rev. F 07/03—Rev. D to Rev. E 01/02—Rev. C to Rev. D

Rev. F | Page 3 of 16 SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

VS = ±15 V , VCM = 0 V , TA = 25°C, unless otherwise noted. Table 1. OP97E OP97F Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage VOS 10 25 30 75 μV Long-Term Offset Voltage Stability ΔVOS/Time 0.3 0.3 μV/month Input Offset Current IOS 30 100 30 150 pA Input Bias Current IB ±30 ±100 ±30 ±150 pA Input Noise Voltage en p-p 0.1 Hz to 10 Hz 0.5 0.5 μV p-p Input Noise Voltage Density en fO = 10 Hz1 17 30 17 30 nV/√Hz fO = 1000 Hz2 14 22 14 22 nV/√Hz Input Noise Current Density in fO = 10 Hz 20 20 fA/√Hz Large Signal Voltage Gain AVO VO = ±10 V; RL = 2 kΩ 300 2000 200 2000 V/mV Common-Mode Rejection CMR VCM = ±13.5 V 114 132 110 132 dB Input Voltage Range3 IVR ±13.5 ±14.0 ±13.5 ±14.0 V OUTPUT CHARACTERISTICS Output Voltage Swing VO RL = 10 kΩ ±13 ±14 ±13 ±14 V Differential Input Resistance4 RIN 30 30 MΩ POWER SUPPLY Power Supply Rejection PSR VS = ±2 V to ±20 V 114 132 110 132 dB Supply Current ISY 380 600 380 600 μA Supply Voltage VS Operating range ±2 ±15 ±20 ±2 ±15 ±20 V DYNAMIC PERFORMANCE Slew Rate SR 0.1 0.2 0.1 0.2 V/μs Closed-Loop Bandwidth BW AVCL = 1 0.4 0.9 0.4 0.9 MHz 1 10 Hz noise voltage density is sample tested. Devices 100% tested for noise are available on request. 2 Sample tested. 3 Guaranteed by CMR test. 4 Guaranteed by design.

Rev. F | Page 4 of 16 VS = ±15 V , VCM = 0 V , −40°C ≤ TA ≤ +85°C for the OP97E/OP97F, unless otherwise noted. Table 2. OP97E OP97F Parameter Symbol Conditions Min Typ Max Min Typ Max Unit Input Offset Voltage VOS 25 60 60 200 μV Average Temperature TCVOS S suffix 0.2 0.6 0.3 2.0 μV/°C Coefficient of VOS 0.3 Input Offset Current IOS 60 250 80 750 pA Average Temperature TCIOS 0.4 2.5 0.6 7.5 pA/°C Coefficient of IOS Input Bias Current IB ±60 ±250 ±80 ±750 pA Average Temperature Coefficient of IB TCIB 0.4 2.5 0.6 7.5 pA/°C Large Signal Voltage Gain AVO VO = 10 V; RL = 2 kΩ 200 1000 150 1000 V/mV Common-Mode Rejection CMR VCM = ±13.5 V 108 128 108 128 dB Power Supply Rejection PSR VS = ±2.5 V to ±20 V 108 126 108 128 dB Input Voltage Range1 IVR ±13.5 ±14.0 ±13.5 ±14.0 V Output Voltage Swing VO RL = 10 kΩ ±13 ±14 ±13 ±14 V Slew Rate SR 0.05 0.15 0.05 0.15 V/μs Supply Current ISY 400 800 400 800 μA Supply Voltage VS Operating range ±2.5 ±15 ±20 ±2.5 ±15 ±20 V 1 Guaranteed by CMR test.

Rev. F | Page 5 of 16 ABSOLUTE MAXIMUM RATINGS Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. Table 3. Parameter Rating Supply Voltage ±20 V Input Voltage1 ±20 V Differential Input Voltage2 ±1 V Differential Input Current2 ±10 mA Output Short-Circuit Duration Indefinite Operating Temperature Range OP97E, OP97F (P , S) −40°C to +85°C Storage Temperature Range −65°C to +150°C Junction Temperature Range −65°C to +150°C Lead Temperature (Soldering, 60 sec) 300°C

1 For supply voltages less than ±20 V, the absolute maximum input voltage is

equal to the supply voltage. 2 The inputs of the OP97 are protected by back-to-back diodes. Current- limiting resistors are not used in order to achieve low noise. Differential input voltages greater than 1 V cause excessive current to flow through the input protection diodes unless limiting resistance is used. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 4. Package Type θJA1 θ JC Unit 8-Lead PDIP (P Suffix) 103 43 °C/W 8-Lead SOIC (S Suffix) 158 43 °C/W 1 θJA is specified for worst-case mounting conditions, that is, θJA is specified for device in socket for PDIP package; θJA is specified for device soldered to printed circuit board for SOIC package. ESD CAUTION

1894 UNITS

Figure 2. Typical Distribution of Input Offset Voltage

1920 UNITS

Figure 3. Typical Distribution of Input Bias Current

1894 UNITS VS = ±15V

Figure 4. Typical Distribution of Input Offset Current Figure 5. Input Bias, Offset Current vs. Temperature

40 IB–

Figure 6. Input Bias, Offset Current vs. Common-Mode Voltage Figure 7. Input Offset Voltage Warmup Drift

Rev. F | Page 11 of 16

APPLICATION INFORMATION

The OP97 is a low power alternative to the industry-standard precision op amp, the OP07. The OP97 can be substituted directly into OP07, OP77, AD725, and PM1012 sockets with improved performance and/or less power dissipation and can be inserted into sockets conforming to the 741 pinout if nulling circuitry is not used. Generally, nulling circuitry used with earlier generation amplifiers is rendered superfluous by the extremely low offset voltage of the OP97 and can be removed without compromising circuit performance. Extremely low bias current over the full military temperature range makes the OP97 attractive for use in sample-and-hold amplifiers, peak detectors, and log amplifiers that must operate over a wide temperature range. Balancing input resistances is not necessary with the OP97. Offset voltage and TCV OS are degraded only minimally by high source resistance, even when unbalanced. The input pins of the OP97 are protected against large differential voltage by back-to-back diodes. Current-limiting resistors are not used to maintain low noise performance. If differential voltages above ±1 V are expected at the inputs, series resistors must be used to limit the current flow to a maximum of 10 mA. Common-mode voltages at the inputs are not restricted and may vary over the full range of the supply voltages used. The OP97 requires very little operating headroom about the supply rails and is specified for operation with supplies as low as ±2 V . Typically, the common-mode range extends to within 1 V of either rail. The output typically swings to within 1 V of the rails when using a 10 kΩ load. Offset nulling is achieved utilizing the same circuitry as an OP07. A potentiometer between 5 kΩ and 100 kΩ is connected between Pin 1 and Pin 8 with the wiper connected to the positive supply. The trim range is between 300 μV and 850 μV , depending upon the internal trimming of the device. 00299-029 OP97 COC RPOT = 5kΩ TO 100kΩ Figure 29. Optional Input Offset Voltage Nulling

allowing accurate measurement down to microvolt levels.

0 Open Loop

circuit are controlled by the OP97. Figure 38. Precision Programmable Gain Amplifier Figure 39. Combination High Speed, Precision Amplifier Figure 40. Combination Amplifier Transient Response

Rev. F | Page 16 of 16 ORDERING GUIDE Model Temperature Range Package Description Package Option OP97EP –40°C to +85°C 8-Lead PDIP N-8 OP97EPZ1 –40°C to +85°C 8-Lead PDIP N-8 OP97FP −40°C to +85°C 8-Lead PDIP N-8 OP97FPZ1 −40°C to +85°C 8-Lead PDIP N-8 OP97FS −40°C to +85°C 8-Lead SOIC R-8 OP97FS-REEL −40°C to +85°C 8-Lead SOIC R-8 OP97FS-REEL7 −40°C to +85°C 8-Lead SOIC R-8 OP97FSZ1 −40°C to +85°C 8-Lead SOIC R-8 OP97FSZ-REEL1 −40°C to +85°C 8-Lead SOIC R-8 OP97FSZ-REEL71 −40°C to +85°C 8-Lead SOIC R-8 1 Z = RoHS Compliant Part. ©1997–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the prop erty of their respective owners. D00299-0-11/07(F)