OP77EZ

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Rev. E | Page 3 of 16 ELECTRICAL SPECIFICATIONS @ VS = ±15 V , TA = 25°C, unless otherwise noted. Table 1. OP77E OP77F Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT OFFSET VOLTAGE VOS 10 25 20 60 μV LONG-TERM STABILITY1 V OS/time 0.3 0.4 μV/Mo INPUT OFFSET CURRENT IOS 0.3 1.5 0.3 2.8 nA INPUT NOISE VOLTAGE DENSITY en fO = 10 Hz 10.3 18.0 10.5 20.0 nV/√Hz fO = 100 Hz2 10.0 13.0 10.2 13.5 fO = 1000 Hz 9.6 11.0 9.8 11.5 INPUT NOISE CURRENT2 inp-p 0.1 Hz to 10 Hz 14 30 15 35 pAp-p INPUT NOISE CURRENT DENSITY in fO = 10 Hz 0.32 0.80 0.35 0.90 pA√Hz fO = 100 Hz2 0.14 0.23 0.15 0.27 fO = 1000 Hz 0.12 0.17 0.13 0.18 INPUT RESISTANCE Differential Mode3 R IN 26 45 18.5 45 MΩ Common Mode RINCM 200 200 GΩ INPUT VOLTAGE RANGE IVR ±13 ±14 ±13 ±14 V COMMON-MODE REJECTION RATIO CMRR VCM = ±13 V 0.1 1.0 0.1 1.6 μV/V POWER SUPPLY REJECTION RATIO PSRR VS = ±3 V to ±18 V 0.7 3.0 0.7 3.0 μV/V LARGE-SIGNAL VOLTAGE GAIN AVO RL ≥ 2 kΩ 5000 12,000 2000 6000 V/mV VO = ±10 V OUTPUT VOLTAGE SWING VO RL ≥ 10 kΩ ±13.5 ±14.0 ±13.5 ±14.0 V SLEW RATE2 SR RL ≥ 2 kΩ 0.1 0.3 0.1 0.3 V/μs CLOSED-LOOP BANDWIDTH2 BW AVCL + 1 0.4 0.6 0.4 0.6 MHz OPEN-LOOP OUTPUT RESISTANCE RO 60 60 Ω POWER CONSUMPTION Pd VS = ±15 V, no load 50 60 50 60 mW VS = ±3 V, no load 3.5 4.5 3.5 4.5 OFFSET ADJUSTMENT RANGE Rp = 20 kn ±3 ±3 mV 1 Long-term input offset voltage stability refers to the averaged trend line of VOS vs. time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in VOS during the first 30 operating days are typically 2.5 μV. 2 Sample tested. 3 Guaranteed by design.

Rev. E | Page 4 of 16 @ VS = ±15 V , −25°C ≤ TA ≤ +85°C for OP77FJ and OP77E/OP77F, unless otherwise noted. Table 2. OP77E OP77F Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT OFFSET VOLTAGE VOS 10 45 20 100 μV AVERAGE INPUT OFFSET VOLTAGE DRIFT1 TCV OS 0.1 0.3 0.2 0.6 μV/°C INPUT OFFSET CURRENT IOS 0.5 2.2 0.5 4.5 nA AVERAGE INPUT OFFSET CURRENT DRIFT2 TCI OS 1.5 4.0 1.5 85 pA/°C AVERAGE INPUT BIAS CURRENT DRIFT2 TCIB 8 40 15 60 pA/°C INPUT VOLTAGE RANGE IVR ±13.0 ±13.5 ±13.0 ±13.5 V COMMON-MODE REJECTION RATIO CMRR VCM = ±13 V 0.1 1.0 0.1 3.0 pV/V POWER SUPPLY REJECTION RATIO PSRR VS = ±3 V to ±18 V 1.0 3.0 1.0 5.0 μV/V LARGE-SIGNAL VOLTAGE GAIN AVO R L ≥ 2 kΩ 2000 6000 1000 4000 V/mV VO = ±10 V OUTPUT VOLTAGE SWING VO RL ≥ 2 kΩ ±12 ±13.0 ±12 ±13.0 V POWER CONSUMPTION Pd VS = ±15 V, no load 60 75 60 75 mW 1 OP77E: TCVOS is 100% tested on J and Z packages. 2 Guaranteed by end-point limits. WAFER TEST LIMITS @ VS = ±15 V , TA = 25°C, for OP77NBC devices, unless otherwise noted. Table 3. Parameter Symbol Conditions OP77NBC Limit Unit INPUT OFFSET VOLTAGE VOS 40 μV max INPUT OFFSET CURRENT IOS 2.0 nA max INPUT BIAS CURRENT IB ±2 nA max INPUT RESISTANCE Differential Mode RIN 26 MΩ min INPUT VOLTAGE RANGE IVR ±13 V min COMMON-MODE REJECTION RATIO CMRR VCM = ±13 V 1 μV/V max POWER SUPPLY REJECTION RATIO PSRR VS = ±3 V to ±18 V 3 μV/V max OUTPUT VOLTAGE SWING VO RL = 10 kΩ ±13.5 V min RL = 2 kΩ ±12.5 RL = 1 kΩ ±12.0 LARGE-SIGNAL VOLTAGE GAIN AVO RL = 2 kΩ 2000 V/mV min VO = ±10 V DIFFERENTIAL INPUT VOLTAGE ±30 V max POWER CONSUMPTION Pd VO = 0 V 60 mW max

Rev. E | Page 5 of 16 TYPICAL ELECTRICAL CHARACTERISTICS @ VS = ±15 V , TA = 25°C, unless otherwise noted. Table 4. Parameter Symbol Conditions OP77NBC Limit Unit AVERAGE INPUT OFFSET VOLTAGE DRIFT TCVOS RS = 50 Ω 0.1 μV/°C NULLED INPUT OFFSET VOLTAGE DRIFT TCVOSn RS = 50 Ω, RP = 20 kΩ 0.1 μV/°C AVERAGE INPUT OFFSET CURRENT DRIFT TCIOS 0.5 pA/°C SLEW RATE SR RL ≥ 2 kΩ 0.3 V/μs BANDWIDTH BW AVCL + 1 0.6 MHz

Rev. E | Page 6 of 16 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter1 Rating Supply Voltage ±22 V Differential Input Voltage ±30 V Input Voltage2 ±22 V Output Short-Circuit Duration Indefinite Storage Temperature Range −65°C to +150°C Operating Temperature Range −25°C to +85°C Junction Temperature (TJ) −65°C to +150°C Lead Temperature (Soldering, 60 sec) 300°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE Table 6. Package Type θJA1 θ JC Unit 8-Pin TO-99 H-08 (J Suffix) 150 18 °C/W 8-Lead Hermetic CERDIP Q-8 (Z Suffix) 148 16 °C/W 1Absolute Maximum Ratings apply to both dice and packaged parts, unless otherwise noted. 2For supply voltages less than ±22 V, the absolute maximum input voltage is equal to the supply voltage. θJA is specified for worst-case mounting conditions, i.e., θJA is specified for a device in socket for the TO-99 and CERDIP packages. ESD CAUTION

Rev. E | Page 11 of 16

APPLICATIONS

1MΩ 1MΩ +15V –15V 1kΩ 1kΩ 0.1µF 0.1µF Figure 27. Precision High-Gain Differential Amplifier available in single-stage, very high-gain amplifier applications.

1 R must equal 4 R

Table 7. Maximum Errors Figure 28. Isolating Large Capacitive Loads Figure 29. Basic Current Source Figure 30. 100 mA Current Source current into a grounded load.

4 R 5 R

4 R5 R

4 R 5 R+ must = 1 R

Figure 36. Precision Threshold Detector/Amplifier

4 Rbp

Figure 37. Precision Temperature Sensor Table 8. Resistor Values C is selected to smooth the response of the loop. 1R2A AND R2B ARE ELECTRONICALLY ADJUSTED ON CHIP AT FACTORY. Figure 38. Simplified Schematic

Rev. E | Page 16 of 16 ORDERING GUIDE Model1 Temperature Range Package Description Package Option OP77FJ −25°C to +85°C 8-Pin Metal Header [TO-99] H-08 (J Suffix) OP77FJZ −25°C to +85°C 8-Pin Metal Header [TO-99] H-08 (J Suffix) OP77EZ −25°C to +85°C 8-Lead Ceramic Dual In-Line Package [CERDIP] Q-8 (Z Suffix) OP77FZ −25°C to +85°C 8-Lead Ceramic Dual In-Line Package [CERDIP] Q-8 (Z Suffix) OP77NBC Die 1 Z = RoHS Compliant Part. ©2002–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the prop erty of their respective owners. D00320-0-4/10(E)