OP77

OP77 (Rev. G)

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• Manufacturer or author: Analog Devices, Inc.
• PDF pages: 16

Technical content

Rev. G | Page 3 of 16 SPECIFICATIONS ELECTRICAL SPECIFICATIONS @ VS = ±15 V , TA = 25°C, unless otherwise noted. Table 1. OP77E OP77F Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT OFFSET VOLTAGE VOS 10 25 20 60 μV LONG-TERM STABILITY1 V OS/time 0.3 0.4 μV/Mo INPUT OFFSET CURRENT IOS 0.3 1.5 0.3 2.8 nA INPUT NOISE VOLTAGE DENSITY e n f O = 10 Hz 10.3 18.0 10.5 20.0 nV/√Hz fO = 100 Hz2 10.0 13.0 10.2 13.5 fO = 1000 Hz 9.6 11.0 9.8 11.5 INPUT NOISE CURRENT2 inp-p 0.1 Hz to 10 Hz 14 30 15 35 pA p-p INPUT NOISE CURRENT DENSITY i n f O = 10 Hz 0.32 0.80 0.35 0.90 pA√Hz fO = 100 Hz2 0.14 0.23 0.15 0.27 fO = 1000 Hz 0.12 0.17 0.13 0.18 INPUT RESISTANCE Differential Mode3 R IN 26 45 18.5 45 MΩ Common Mode RINCM 200 200 GΩ INPUT VOLTAGE RANGE IVR ±13 ±14 ±13 ±14 V COMMON-MODE REJECTION RATIO CMRR V CM = ±13 V 0.1 1.0 0.1 1.6 μV/V POWER SUPPLY REJECTION RATIO PSRR V S = ±3 V to ±18 V 0.7 3.0 0.7 3.0 μV/V LARGE-SIGNAL VOLTAGE GAIN A VO R L ≥ 2 kΩ 5000 12,000 2000 6000 V/mV VO = ±10 V OUTPUT VOLTAGE SWING VO R L ≥ 10 kΩ ±13.5 ±14.0 ±13.5 ±14.0 V SLEW RATE2 SR R L ≥ 2 kΩ 0.1 0.3 0.1 0.3 V/μs CLOSED-LOOP BANDWIDTH2 BW A VCL + 1 0.4 0.6 0.4 0.6 MHz OPEN-LOOP OUTPUT RESISTANCE R O 60 60 Ω POWER CONSUMPTION Pd V S = ±15 V, no load 50 60 50 60 mW VS = ±3 V, no load 3.5 4.5 3.5 4.5 OFFSET ADJUSTMENT RANGE Rp = 20 kn ±3 ±3 mV 1 Long-term input offset voltage stability refers to the averaged trend line of VOS vs. time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in VOS during the first 30 operating days are typically 2.5 μV. 2 Sample tested. 3 Guaranteed by design.

Rev. G | Page 4 of 16 @ VS = ±15 V , −25°C ≤ TA ≤ +85°C for OP77FJ and OP77E/OP77F, unless otherwise noted. Table 2. OP77E OP77F Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT OFFSET VOLTAGE VOS 10 45 20 100 µV AVERAGE INPUT OFFSET VOLTAGE DRIFT1 TCVOS 0.1 0.3 0.2 0.6 µV/°C INPUT OFFSET CURRENT IOS 0.5 2.2 0.5 4.5 nA AVERAGE INPUT OFFSET CURRENT DRIFT2 TCIOS 1.5 4.0 1.5 85 pA/°C AVERAGE INPUT BIAS CURRENT DRIFT2 TCIB 8 40 15 60 pA/°C INPUT VOLTAGE RANGE IVR ±13.0 ±13.5 ±13.0 ±13.5 V COMMON-MODE REJECTION RATIO CMRR VCM = ±13 V 0.1 1.0 0.1 3.0 pV/V POWER SUPPLY REJECTION RATIO PSRR VS = ±3 V to ±18 V 1.0 3.0 1.0 5.0 µV/V LARGE-SIGNAL VOLTAGE GAIN AVO RL ≥ 2 kΩ 2000 6000 1000 4000 V/mV VO = ±10 V OUTPUT VOLTAGE SWING VO RL ≥ 2 kΩ ±12 ±13.0 ±12 ±13.0 V POWER CONSUMPTION Pd VS = ±15 V, no load 60 75 60 75 mW 1 OP77E: TCVOS is 100% tested on J and Z packages. 2 Guaranteed by end-point limits. WAFER TEST LIMITS @ VS = ±15 V , TA = 25°C, for OP77NBC devices, unless otherwise noted. Table 3. Parameter Symbol Conditions OP77NBC Limit Unit INPUT OFFSET VOLTAGE VOS 40 µV max INPUT OFFSET CURRENT IOS 2.0 nA max INPUT BIAS CURRENT IB ±2 nA max INPUT RESISTANCE Differential Mode RIN 26 MΩ min INPUT VOLTAGE RANGE IVR ±13 V min COMMON-MODE REJECTION RATIO CMRR VCM = ±13 V 1 µV/V max POWER SUPPLY REJECTION RATIO PSRR VS = ±3 V to ±18 V 3 µV/V max OUTPUT VOLTAGE SWING VO RL = 10 kΩ ±13.5 V min RL = 2 kΩ ±12.5 RL = 1 kΩ ±12.0 LARGE-SIGNAL VOLTAGE GAIN AVO RL = 2 kΩ 2000 V/mV min VO = ±10 V DIFFERENTIAL INPUT VOLTAGE ±30 V max POWER CONSUMPTION Pd VO = 0 V 60 mW max

Rev. G | Page 5 of 16 TYPICAL ELECTRICAL CHARACTERISTICS @ VS = ±15 V , TA = 25°C, unless otherwise noted. Table 4. Parameter Symbol Conditions OP77NBC Limit Unit AVERAGE INPUT OFFSET VOLTAGE DRIFT TCVOS RS = 50 Ω 0.1 µV/°C NULLED INPUT OFFSET VOLTAGE DRIFT TCVOSn RS = 50 Ω, RP = 20 kΩ 0.1 µV/°C AVERAGE INPUT OFFSET CURRENT DRIFT TCIOS 0.5 pA/°C SLEW RATE SR RL ≥ 2 kΩ 0.3 V/µs BANDWIDTH BW AVCL + 1 0.6 MHz

Rev. G | Page 6 of 16 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter1 Rating Supply Voltage ±22 V Differential Input Voltage ±30 V Input Voltage2 ±22 V Output Short-Circuit Duration Indefinite Storage Temperature Range −65°C to +150°C Operating Temperature Range −25°C to +85°C Junction Temperature (TJ) −65°C to +150°C Lead Temperature (Soldering, 60 sec) 300°C

1 Absolute Maximum Ratings apply to both dice and packaged parts, unless

otherwise noted.

2 For supply voltages less than ±22 V, the absolute maximum input voltage is

equal to the supply voltage. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. THERMAL RESISTANCE Table 6. Package Type θJA1 θJC Unit 8-Pin TO-99 H-08 (J Suffix) 150 18 °C/W 8-Lead Hermetic CERDIP Q-8 (Z Suffix) 148 16 °C/W 1 θJA is specified for worst-case mounting conditions, i.e., θJA is specified for a device in socket for the TO-99 and CERDIP packages. ESD CAUTION

Figure 36. Precision Threshold Detector/Amplifier CC is selected to smooth the response of the loop.

4 Rbp

Figure 37. Precision Temperature Sensor Table 8. Resistor Values 1R2A AND R2B ARE ELECTRONICALLY ADJUSTED ON CHIP AT FACTORY. Figure 38. Simplified Schematic

Rev. G | Page 16 of 16 ORDERING GUIDE Model1 Temperature Range Package Description Package Option OP77FJZ −25°C to +85°C 8-Pin Metal Header [TO-99] H-08 (J Suffix) OP77EZ −25°C to +85°C 8-Lead Ceramic Dual In-Line Package [CERDIP] Q-8 (Z Suffix) OP77FZ −25°C to +85°C 8-Lead Ceramic Dual In-Line Package [CERDIP] Q-8 (Z Suffix) OP77NBC Die 1 The OP77FJZ is a RoHS compliant part. ©2002–2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00320-0-10/15(G)