OP493FS-REEL

OP193_02 AD | Alldatasheet

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Technical content

REV.B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a OP193/OP293/OP493* Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 Precision, Micropower Operational Amplifiers PIN CONFIGURATIONSFEATURES Operates from +1.7 V to /H1155018 V Low Supply Current: 15 /H9262A/Amplifier Low Offset Voltage: 75 /H9262V Outputs Sink and Source: /H115508 mA No Phase Reversal Single- or Dual-Supply Operation High Open-Loop Gain: 600 V/mV Unity-Gain Stable

APPLICATIONS

Portable Medical Equipment Battery-Powered Instrumentation Temperature Transducer Amplifier GENERAL DESCRIPTION The OP193 family of single-supply operational amplifiers fea- tures a combination of high precision, low supply current and the ability to operate at low voltages. For high performance in single-supply systems the input and output ranges include ground, and the outputs swing from the negative rail to within 600 mV of the positive supply. For low voltage operation the OP193 family can operate down to 1.7 volts or ± 0.85 volts. The combination of high accuracy and low power operation make the OP193 family useful for battery-powered equipment. Its low current drain and low voltage operation allow it to continue performing long after other amplifiers have ceased functioning either because of battery drain or headroom. The OP193 family is specified for single +2 volt through dual ±15 volt operation over the HOT (–40°C to +125°C) temperature range. They are available in plastic DIPs, plus SOIC surface- mount packages. 14-Lead Epoxy DIP (P Suffix) 16-Lead Wide Body SOL (S Suffix) 8-Lead Epoxy DIP (P Suffix) 8-Lead SO (S Suffix) 8-Lead Epoxy DIP (P Suffix) 8-Lead SO (S Suffix) OP293 OUT B –IN B +IN B V+OUT A –IN A +IN A OP293 OUT A –IN A +IN A OUT B –IN B +IN B NC = NO CONNECT OUT A NULL NCNULL –IN A +IN A OP193 OP193 OUT A NULL NC NULL –IN A +IN A OP493 OUT A –IN A +IN A +IN B –IN B OUT B OUT D –IN D +IN D +IN C –IN C OUT C OP493 OUT D –IN D +IN D +IN C –IN C OUT C NC OUT A –IN A +IN A +IN B –IN B OUT B NC NC = NO CONNECT

REV. B–2– OP193/OP293/OP493–SPECIFICATIONS ELECTRICAL SPECIFICATIONS (@ VS = /H1155015.0 V, TA = 25/H11543C unless otherwise noted) “E” Grade “F” Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V OS OP193 75 150 µV OP193, –40°C ≤ TA ≤ +125°C 175 250 µV OP293 100 250 µV OP293, –40°C ≤ TA ≤ +125°C 200 350 µV OP493 125 275 µV OP493, –40°C ≤ TA ≤ +125°C 225 375 µV Input Bias Current I B VCM = 0 V, –40°C ≤ TA ≤ +125°C1 5 2 0 n A Input Offset Current I OS VCM = 0 V, –40°C ≤ TA ≤ +125°C2 4 n A Input Voltage Range V CM –14.9 +13.5 –14.9 +13.5 V Common-Mode Rejection CMRR –14.9 ≤ VCM ≤ +14 V 100 116 97 116 dB –40°C ≤ TA ≤ +125°C 9 79 4d B Large Signal Voltage Gain A VO RL = 100 kΩ, –10 V ≤ VOUT ≤ +10 V 500 500 V/mV –40°C ≤ TA ≤ +85°C 300 300 V/mV –40°C ≤ TA ≤ +125°C 300 300 V/mV Large Signal Voltage Gain A VO RL = 10 kΩ, –10 V ≤ VOUT ≤ +10 V 350 350 V/mV –40°C ≤ TA ≤ +85°C 200 200 V/mV –40°C ≤ TA ≤ +125°C 150 150 V/mV Large Signal Voltage Gain A VO RL = 2 kΩ, –10 V ≤ VOUT ≤ +10 V 200 200 V/mV –40°C ≤ TA ≤ +85°C 125 125 V/mV –40°C ≤ TA ≤ +125°C 100 100 V/mV Long Term Offset Voltage V OS Note 1 150 300 µV Offset Voltage Drift ∆VOS/∆T Note 2 0.2 1.75 µV/°C OUTPUT CHARACTERISTICS Output Voltage Swing High V OH IL = 1 mA 14.1 14.2 14.1 14.2 V IL = 1 mA, IL = 5 mA 13.9 14.1 13.9 14.1 V Output Voltage Swing Low V OL IL = –1 mA –14.7 –14.6 –14.7 –14.6 V IL = –1 mA, Short Circuit Current I SC ± 25 ± 25 mA POWER SUPPLY Power Supply Rejection Ratio PSRR V S = ± 1.5 V to ± 18 V 100 120 97 120 dB VS = ± 1.5 V to ± 18 V, –40°C ≤ TA ≤ +125°C 9 79 4d B Supply Current/Amplifier I SY –40°C ≤ TA ≤ +125°C, RL = ∞ VOUT = 0 V, VS = ± 18 V 30 30 µA NOISE PERFORMANCE Voltage Noise Density e n f = 1 kHz 65 65 nV/ √Hz Current Noise Density i n f = 1 kHz 0.05 0.05 pA/ √Hz Voltage Noise e n p-p 0.1 Hz to 10 Hz 3 3 µV p-p DYNAMIC PERFORMANCE Slew Rate SR R L = 2 kΩ 15 15 V/ms Gain Bandwidth Product GBP 35 35 kHz Channel Separation V OUT = 10 V p-p, RL = 2 kΩ, f = 1 kHz 120 120 dB NOTES 1Long term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 °C, with an LTPD of 1.3. 2Offset voltage drift is the average of the –40 °C to +25°C delta and the +25 °C to +125 °C delta. Specifications subject to change without notice.

REV. B –3– OP193/OP293/OP493 ELECTRICAL SPECIFICATIONS (@ VS = 5.0 V, VCM = 0.1 V, TA = 25/H11543C unless otherwise noted) “E” Grade “F” Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V OS OP193 75 150 µV OP193, –40°C ≤ TA ≤ +125°C 175 250 µV OP293 100 250 µV OP293, –40°C ≤ TA ≤ +125°C 200 350 µV OP493 125 275 µV OP493, –40°C ≤ TA ≤ +125°C 225 375 µV Input Bias Current I B –40°C ≤ TA ≤ +125°C1 5 2 0 n A Input Offset Current I OS –40°C ≤ TA ≤ +125°C2 4 n A Input Voltage Range V CM 04 04V Common-Mode Rejection CMRR 0.1 ≤ VCM ≤ 4 V 100 116 96 116 dB 0.1 ≤ VCM ≤ 4 V, –40°C ≤ TA ≤ +125°C9 2 9 2 d B Large Signal Voltage Gain A VO RL = 100 kΩ, 0.03 ≤ VOUT ≤ 4.0 V 200 200 V/mV –40°C ≤ TA ≤ +85°C 125 125 V/mV –40°C ≤ TA ≤ +125°C 130 130 V/mV Large Signal Voltage Gain A VO RL = 10 kΩ, 0.03 ≤ VOUT ≤ 4.0 V 75 75 V/mV –40°C ≤ TA ≤ +85°C 50 50 V/mV –40°C ≤ TA ≤ +125°C 70 70 V/mV Long Term Offset Voltage V OS Note 1 150 300 µV Offset Voltage Drift ∆VOS/∆T Note 2 0.2 1.25 µV/°C OUTPUT CHARACTERISTICS Output Voltage Swing High V OH IL = 100 µA 4.4 4.4 V IL = 1 mA 4.1 4.4 4.1 4.4 V IL = 1 mA, IL = 5 mA 4.0 4.4 4.0 4.4 V Output Voltage Swing Low V OL IL = –100 µA 140 160 140 160 mV IL = –100 µA, –40°C ≤ TA ≤ +125°C 220 220 mV No Load 5 5 mV IL = –1 mA 280 400 280 400 mV IL = –1 mA, –40°C ≤ TA ≤ +125°C 500 500 mV IL = –5 mA 700 900 700 900 mV Short Circuit Current I SC ± 8 ± 8m A POWER SUPPLY Power Supply Rejection Ratio PSRR V S = ± 1.7 V to ± 6.0 V 100 120 97 120 dB VS = ± 1.5 V to ± 18 V, –40°C ≤ TA ≤ +125°C9 4 9 0 d B Supply Current/Amplifier I SY VCM = 2.5 V, RL = ∞ 14.5 14.5 µA NOISE PERFORMANCE Voltage Noise Density e n f = 1 kHz 65 65 nV/ √Hz Current Noise Density i n f = 1 kHz 0.05 0.05 pA/ √Hz Voltage Noise e n p-p 0.1 Hz to 10 Hz 3 3 µV p-p DYNAMIC PERFORMANCE Slew Rate SR R L = 2 kΩ 12 12 V/ms Gain Bandwidth Product GBP 35 35 kHz NOTES 1Long term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 °C, with an LTPD of 1.3. 2Offset voltage drift is the average of the –40 °C to +25°C delta and the +25 °C to +125 °C delta. Specifications subject to change without notice.

REV. B–4– OP193/OP293/OP493 ELECTRICAL SPECIFICATIONS (@ VS = 3.0 V, VCM = 0.1 V, TA = 25/H11543C unless otherwise noted) “E” Grade “F” Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V OS OP193 75 150 µV OP193, –40°C ≤ TA ≤ +125°C 175 250 µV OP293 100 250 µV OP293, –40°C ≤ TA ≤ +125°C 200 350 µV OP493 125 275 µV OP493, –40°C ≤ TA ≤ +125°C 225 375 µV Input Bias Current I B –40°C ≤ TA ≤ +125°C1 5 2 0 n A Input Offset Current I OS –40°C ≤ TA ≤ +125°C2 4 n A Input Voltage Range V CM 02 02 V Common-Mode Rejection CMRR 0.1 ≤ VCM ≤ 2 V 97 116 94 116 dB 0.1 ≤ VCM ≤ 2 V, –40°C ≤ TA ≤ +125°C 9 08 7d B Large Signal Voltage Gain A VO RL = 100 kΩ, 0.03 ≤ VOUT ≤ 2 V 100 100 V/mV –40°C ≤ TA ≤ +85°C 75 75 V/mV –40°C ≤ TA ≤ +125°C 100 100 V/mV Long Term Offset Voltage V OS Note 1 150 300 µV Offset Voltage Drift ∆VOS/∆T Note 2 0.2 1.25 µV/°C OUTPUT CHARACTERISTICS Output Voltage Swing High V OH IL = 1 mA 2.1 2.14 2.1 2.14 V IL = 1 mA, IL = 5 mA 1.9 2.1 1.9 2.1 V Output Voltage Swing Low V OL IL = –1 mA 280 400 280 400 mV IL = –1 mA –40°C ≤ TA ≤ +125°C 500 500 mV IL = –5 mA 700 900 700 900 mV Short Circuit Current I SC ± 8 ± 8m A POWER SUPPLY Power Supply Rejection Ratio PSRR V S = +1.7 V to +6 V, 100 97 –40°C ≤ TA ≤ +125°C 9 49 0d B Supply Current/Amplifier I SY VCM = 1.5 V, RL = ∞ 14.5 22 14.5 22 µA –40°C ≤ TA ≤ +125°C2 2 2 2 µA Supply Voltage Range V S +2 ± 18 +2 ± 18 V NOISE PERFORMANCE Voltage Noise Density e n f = 1 kHz 65 65 nV/ √Hz Current Noise Density i n f = 1 kHz 0.05 0.05 pA/ √Hz Voltage Noise e n p-p 0.1 Hz to 10 Hz 3 3 µV p-p DYNAMIC PERFORMANCE Slew Rate SR R L = 2 kΩ 10 10 V/ms Gain Bandwidth Product GBP 25 25 kHz Channel Separation V OUT = 10 V p-p, RL = 2 kΩ, f = 1 kHz 120 120 dB NOTES 1Long term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 °C, with an LTPD of 1.3. 2Offset voltage drift is the average of the –40 °C to +25°C delta and the +25 °C to +125 °C delta. Specifications subject to change without notice.

REV. B –5– OP193/OP293/OP493 ELECTRICAL SPECIFICATIONS (@ VS = 2.0 V, VCM = 0.1 V, TA = 25/H11543C unless otherwise noted) “E” Grade “F” Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V OS OP193 75 150 µV OP193, –40°C ≤ TA ≤ +125°C 175 250 µV OP293 100 250 µV OP293, –40°C ≤ TA ≤ +125°C 175 350 µV OP493 125 275 µV OP493, –40°C ≤ TA ≤ +125°C 225 375 µV Input Bias Current I B –40°C ≤ TA ≤ +125°C1 5 2 0 n A Input Offset Current I OS –40°C ≤ TA ≤ +125°C2 4 n A Input Voltage Range V CM 01 01 V Large Signal Voltage Gain A VO RL = 100 kΩ, 0.03 ≤ VOUT ≤ 1 V 60 60 V/mV –40°C ≤ TA ≤ +125°C 70 70 V/mV Long Term Offset Voltage V OS Note 1 150 300 µV POWER SUPPLY Power Supply Rejection Ratio PSRR V S = 1.7 V to 6 V, 100 97 –40°C ≤ TA ≤ +125°C 9 49 0d B Supply Current/Amplifier I SY VCM = 1.0 V, RL = ∞ 13.2 20 13.2 20 µA –40°C ≤ TA ≤ +125°C2 5 2 5 µA Supply Voltage Range V S +2 ± 18 +2 ± 18 V NOISE PERFORMANCE Voltage Noise Density e n f = 1 kHz 65 65 nV/ √Hz Current Noise Density i n f = 1 kHz 0.05 0.05 pA/ √Hz Voltage Noise e n p-p 0.1 Hz to 10 Hz 3 3 µV p-p DYNAMIC PERFORMANCE Slew Rate SR R L = 2 kΩ 10 10 V/ms Gain Bandwidth Product GBP 25 25 kHz Specifications subject to change without notice.

REV. B OP193/OP293/OP493 –6– CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP193/OP293/OP493 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE ABSOLUTE MAXIMUM RATINGS 1 Storage Temperature Range Operating Temperature Range Junction Temperature Range Package Type θJA 3 θJC Unit 8-Pin Plastic DIP (P) 103 43 °C/W 8-Pin SOIC (S) 158 43 °C/W 14-Pin Plastic DIP (P) 83 39 °C/W 16-Pin SOL (S) 92 27 °C/W NOTES 1Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2For supply voltages less than ±18 V, the input voltage is limited to the supply voltage. 3θJA is specified for the worst case conditions; i.e., θJA is specified for device in socket for PDIP, and θJA is specified for device soldered in circuit board for SOIC package. ORDERING GUIDE Temperature Package Package Model Range Description Option OP193ES* –40°C to +125°C 8-Pin SOIC SO-8 OP193ES-REEL* –40°C to +125°C 8-Pin SOIC SO-8 OP193ES-REEL7 * –40°C to +125°C 8-Pin SOIC SO-8 OP193FP* –40°C to +125°C 8-Pin Plastic DIP N-8 OP193FS –40 °C to +125°C 8-Pin SOIC SO-8 OP193FS-REEL –40 °C to +125°C 8-Pin SOIC SO-8 OP193FS-REEL7 –40 °C to +125°C 8-Pin SOIC SO-8 OP293ES –40 °C to +125°C 8-Pin SOIC SO-8 OP293ES-REEL –40 °C to +125°C 8-Pin SOIC SO-8 OP293ES-REEL7 –40 °C to +125°C 8-Pin SOIC SO-8 OP293FP* –40°C to +125°C 8-Pin Plastic DIP N-8 OP293FS –40 °C to +125°C 8-Pin SOIC SO-8 OP293FS-REEL –40 °C to +125°C 8-Pin SOIC SO-8 OP293FS-REEL7 –40 °C to +125°C 8-Pin SOIC SO-8 OP493ES* –40°C to +125°C 16-Pin SOL SOL-16 OP493ES-REEL* –40°C to +125°C 16-Pin SOL SOL-16 OP493FP* –40°C to +125°C 14-Pin Plastic DIP N-14 OP493FS* –40°C to +125°C 16-Pin SOL SOL-16 OP493FS-REEL* –40°C to +125°C 16-Pin SOL SOL-16 *Not for new design, obsolete April 2002.

REV. B –7– Typical Performance Characteristics– OP193/OP293/OP493 120NUMBER OF AMPLIFIERS40 –75 75 OFFSET – /H9262V 160 –45 60 45–30 0 30 VS /H11549 3V VCM /H11549 0.1V TA /H11549 25°C 450 /H11547 PDIPS 200 15–15–60 VS /H11549 ±15V TA /H11549 25°C 450 /H11547 PDIPS 200 160 120 OFFSET – /H9262V 756030150–15–30–45–60–75 45 NUMBER OF AMPLIFIERS VS /H11549 3V VCM /H11549 0.1V –40°C /H11349 TA /H11349 +125°C 450 /H11547 PDIPS 0.6 NUMBER OF AMPLIFIERS30 0 1.0 TCVOS – /H9262V/H11408° C 120 0.2 0.8 0.4 150 0.6 NUMBER OF AMPLIFIERS30 0 1.0 TCVOS – /H9262V/H11408° C 120 0.2 0.8 0.4 VS /H11549 /H1155015V –40°C /H11349 TA /H11349 +125°C 450 /H11547 PDIPS 150 INPUT BIAS CURRENT – nA COMMON-MODE VOLTAGE – V 1234 +125°C –40°C VS /H11005 5V +25°C SLEW RATE – V/ms –50 –25 1250 25 50 100 +SR /H11549 –SR VS /H11549 ±15V +SR /H11549 –SR VS /H11549 +5V TEMPERATURE – ° C 100 10 100 1k 10k FREQUENCY – Hz PSRR – dB +PSRR 5V /H11349 VS /H11349 30V TA /H11549 25°C–PSRR 120SHORT CIRCUIT CURRENT – mA | –ISC | VS /H11549 ±15V –50 TEMPERATURE – ° C –25 1250 25 50 100 +ISC VS /H11549 ±15V | –ISC | VS /H11549 +5V +ISC VS /H11549 +5V TPC 1. OP193 Offset Distribution, VS = ±15 V TPC 4. OP193 TCVOS Distribution, VS = ±15 V TPC 2. OP193 Offset Distribution, VS = +3 V TPC 5. Input Bias Current vs. Common-Mode Voltage TPC 3. OP193 TCVOS Distribution, VS = +3 V TPC 6. PSRR vs. Frequency 120CMRR – dB 100 VS /H11549 +5V TA /H11549 25°C VS /H11549 ±15V FREQUENCY – Hz 10 100 1k 10k Temperature

REV. B OP193/OP293/OP493 –8– SUPPLY CURRENT – µA –50 TEMPERATURE – ° C –25 1250 25 50 100 VS /H11549 +2V VCM /H11549 1V VS /H11549 ±18V INPUT OFFSET CURRENT – nA –0.15 –50 –0.10 –0.20 –0.5 –25 1250 25 50 100 VS /H11549 +2V VCM /H11549 0.1V VS /H11549 ±15V –0.25 TEMPERATURE – ° C INPUT BIAS CURRENT – nA –50 TEMPERATURE – ° C –25 1250 25 50 100 VS /H11549 +2V VCM /H11549 0.1V VS /H11549 ±15V TPC 10. Input Offset Current vs. Temperature 1000 100 0.1 1 10 100 1k 5V /H11349 VS /H11349 30V TA /H11549 25°C FREQUENCY – Hz VOLTAGE NOISE DENSITY – nV/H11408 HzVOLTAGE GAIN – V/H11408mV 1000 –50 1500 500 2000 –25 1250 25 50 100 2500 VS /H11549 ±15V –10V /H11349 VOUT /H11349 +10V VS /H11549 +5V 0.03V /H11349 VOUT /H11349 4V TEMPERATURE – ° C TPC 13. Voltage Noise Density vs. Frequency TPC 16. Voltage Gain (RL = 100 kΩ) vs. Temperature TPC 11. Input Bias Current vs. Temperature 1000 100 0.1 1 10 100 1k 5V /H11349 VS /H11349 30V TA /H11549 25°C FREQUENCY – Hz CURRENT NOISE DENSITY – pA/H11408 Hz TPC 14. Current Noise Density vs. Frequency TPC 12. Supply Current vs. Temperature 10000 1000 0.1 1 10 100 1000 10000 100 DELTA FROM SUPPLY RAIL – mV 5V /H11349 VS /H11349 30V TA /H11549 25°C DELTA FROM VEE DELTA FROM VCC LOAD CURRENT – /H9262A TPC 15. Delta Output Swing from Either Rail vs. Current Load VOLTAGE GAIN – V/H11408mV 400 –50 600 200 TEMPERATURE – ° C 800 –25 1250 25 50 100 1000 VS /H11549 ±15V –10V /H11349 VOUT /H11349 +10V VS /H11549 +5V 0.03V /H11349 VOUT /H11349 4V TPC 17. Voltage Gain (RL = 10 kΩ) vs. Temperature GAIN – dB 10 100 1k 10k 100k –20 TA /H11549 25°C VS /H11549 5V FREQUENCY – Hz TPC 18. Closed-Loop Gain vs. Frequency, VS = 5 V

Figure 5. High Resolution Offset Nulling Circuit buffered by an amplifier. One such circuit is shown in Figure 6. supply voltage, while drawing only about 27 µA from a 5 V supply. recovery time from transients in the load current. Figure 6. A Micropower False-Ground Generator alkaline cells can power this reference for more than 18 months. regulation is 85 µV/mA with line regulation at 120 µV/V. its positive input range limit and has an undefined output state. without significantly degrading the OP193’s offset drift.

5 VBE1

Figure 7. A Battery-Powered Voltage Reference tor, which bypasses the current sense resistor, in the final result. R2. This produces a deliberate temperature dependent offset. and R5, which also bypasses R1, can be adjusted via a gain trim. Figure 8. Single-Supply Current Monitor

which greatly simplifies the calibration procedure. Once the span trim has been completed, the zero trim can be made. Remember that adjusting the zero trim will not affect the gain.

1 IN/OUT

2 OUT/IN

3 OUT/IN

4 IN/OUT

6 CONT

5 CONT

7 VSS

Figure 12. Micropower Voltage Controlled Oscillator put resistance (≈10 kΩ) independent of the digital input code. The output amplifiers act as buffers to avoid loading the DACs.

24 IOUT2C/2D

Figure 13. Micropower Single-Supply Quad Voltage-

10 MΩ resistors placed in parallel with the DAC feedback loop

of the linear region providing maximum output swing.

7 RFBB

3 RFBA

22 RFBD

26 RFBC

Figure 14. Single-Supply Micropower Quad Programmable-Gain Amplifier

REV. B–16– C00295–0–1/02(B) PRINTED IN U.S.A. OP193/OP293/OP493 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead SO (S Suffix) 8-Lead Epoxy DIP (P Suffix) 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 0.0196 (0.50) 0.0099 (0.25) x 45° PIN 1 0.1574 (4.00) 0.1497 (3.80) 0.2440 (6.20) 0.2284 (5.80) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) BSC 0.0688 (1.75) 0.0040 (0.10) 0.1968 (5.00) 0.1890 (4.80) PIN 1 0.280 (7.11) 0.240 (6.10) SEATING PLANE 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93) 0.430 (10.92) 0.348 (8.84) 0.022 (0.558) 0.014 (0.356) 0.070 (1.77) 0.045 (1.15) 0.100 (2.54) BSC 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 16-Lead Wide Body SOL (S Suffix) PIN 1 0.2992 (7.60) 0.2914 (7.40) 0.4193 (10.65) 0.3937 (10.00) 16 9 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) BSC 0.1043 (2.65) 0.0926 (2.35) 0.4133 (10.50) 0.3977 (10.00) 0.0118 (0.30) 0.0040 (0.10) 0.0125 (0.32) 0.0091 (0.23) 0.0500 (1.27) 0.0157 (0.40) 0.0291 (0.74) 0.0098 (0.25) x 45° 14-Lead Epoxy DIP (P Suffix) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93) 0.795 (20.19) 0.725 (18.42) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) BSC 0.070 (1.77) 0.045 (1.15) SEATING PLANE 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN PIN 1 0.280 (7.11) 0.240 (6.10) 814

Revision History

Data Sheet changed from REV. A to REV. B.