OP490 AD | Alldatasheet
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REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a OP490 Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 Low Voltage Micropower Quad Operational Amplifier PIN CONNECTIONFEATURES Single/Dual-Supply Operation
1.6 V to 36 V
/H115500.8 V to /H1155018 V True Single-Supply Operation; Input and Output Voltage Ranges Include Ground Low Supply Current: 80 /H9262A Max High Output Drive: 5 mA Min Low Offset Voltage: 0.5 mA Max High Open-Loop Gain: 700 V/mV Min Outstanding PSRR: 5.6 mV/V Min Industry Standard Quad Pinouts Available in Die Form GENERAL DESCRIPTION The OP490 is a high-performance micropower quad op amp that operates from a single supply of 1.6 V to 36 V or from dual supplies of ± 0.8 V to ± 18 V. Input voltage range includes the negative rail allowing the OP490 to accommodate input signals down to ground in single-supply operation. The OP490’s output swing also includes ground when operating from a single supply, enabling “zero-in, zero-out” operation. The quad OP490 draws less than 20 mA of quiescent supply current per amplifier, but each amplifier is able to deliver over 5 mA of output current to a load. Input offset voltage is under 0.5 mV with offset drift below 5 mV/∞C over the military temperature range. Gain exceeds over 700,000 and CMR is better than 100 dB. A PSRR of under 5.6 mV/V minimizes offset voltage changes experienced in battery-powered systems. The quad OP490 combines high performance with the space and cost savings of quad amplifiers. The minimal voltage and current requirements of the OP490 make it ideal for battery- and solar-powered applications, such as portable instruments and remote sensors. 14-Lead Hermetic DIP (Y Suffix) OUT A IN A +IN A +IN B IN B OUT B IN D +IN D +IN C IN C OUT C OUT D 14-Lead Plastic DIP (P Suffix) OUT A IN A +IN A +IN B IN B OUT B IN D +IN D +IN C IN C OUT C OUT D 16-Lead SOIC (S Suffix) 16OUT A IN A +IN A +IN B IN B OUT B IN D +IN D +IN C IN C OUT C OUT D NC NC NC = NO CONNECT
REV. C–2– OP490–SPECIFICATIONS OP490E OP490F OP490G Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit Input Offset Input Offset Current I OS VCM = 0 V 0.4 3.0 0.4 5 0.4 5 nA Input Bias Current I B VCM = 0 V 4.2 15.0 4.2 20 4.2 25 nA Large Signal A VO VS = ± 15 V, VO = ± 10 V, Voltage Gain R L = 100 kW 700 1,200 500 1,000 400 800 V/mV RL = 10 kW 350 600 250 500 200 400 V/mV RL = 2 kW 125 250 100 200 100 200 V/mV
1 V < VO < 4 V
RL = 100 kW 200 400 125 300 100 250 V/mV RL = 10 kW 100 180 75 140 70 140 V/mV Input Voltage IVR V+ = 5 V, V– = 0 V 0/4 0/4 0/4 V VOH V+ = 5 V, V– = 0 V, R VOL V+ = 5 V, V– = 0 V, RL = 10 kW 100 500 100 500 100 500 mV Common-Mode CMRR V+ = 5 V, V– = 0 V, 90 110 80 100 800 100 dB Rejection Ratio 0 V < V CM < 4 V VS = ± 15 V, 100 130 90 120 90 120 dB –15 V < VCM < +13.5 V Power Supply Rejection Ratio PSRR 1.0 5.6 3.2 10 3.2 10 mV/V Slew Rate SR V S = ± 15 V 5 12 5 12 5 12 V/ms Supply Current V S = ± 1.5 V, No Load 40 60 40 60 40 60 mA (All Amplifiers) I SY VS = ± 15 V, No Load 60 80 60 80 60 80 mA Capacitive Load A V = 1 650 650 650 pF Stability Input Noise e n p-p f O = 0.1 Hz to 10 Hz, Voltage V S = ± 15 V 3 3 3 mV p-p Input Resistance Differential Mode R IN VS = ± 15 V 30 30 30 M W Input Resistance Common-Mode R INCM VS = ± 15 V 20 20 20 G W Gain Bandwidth Product GBWP A V = 1 20 20 20 kHz Channel Separation CS f O = 10 Hz, VO = 20 V p-p 120 150 120 150 120 150 dB VS = ± 15 V2 NOTES 1Guaranteed by CMRR test. 2Guaranteed but not 100% tested. Specifications subject to change without notice ELECTRICAL CHARACTERISTICS(@ VS = /H115501.5 V to /H1155015 V, TA = 25/H11543C, unless otherwise noted)
REV. C –3– OP490 (@ VS = /H115501.5 V to /H1155015 V, –25 /H11543C £ TA £ +85/H11543C for OP490E/F, –40 /H11543C £ TA £ +125/H11543C for OP490G, unless otherwise noted) OP490E OP490F OP490G Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit Input Offset Average Input Offset Voltage Drift TCV OS VS = ± 15 V 2 5 4 4 mV/∞C Input Offset Current I OS VCM = 0 V 0.8 3 1.0 5 1.3 7 nA Input Bias Current I B VCM = 0 V 4.4 15 4.4 20 4.4 25 nA Large Signal A VO VS = ± 15 V, VO = ± 10 V, Voltage Gain R L = 100 kW 500 800 350 700 300 600 V/mV RL = 10 kW 250 400 175 250 150 250 V/mV RL = 2 kW 100 200 75 150 75 125 V/mV RL = 100 kW 150 280 100 220 80 160 V/mV RL = 10 kW 75 140 50 110 40 90 V/mV Input Voltage IVR V+ = 5 V, V– = 0 V 0.3/5 0.3/5 0.3/5 V Output Voltage V O VS = ± 15 V, RL = 10 kW± 13 ± 14 ± 13 ± 14 ± 13 ± 14 V Swing R L = 2 kW± 10 ± 11 ± 10 ± 11 ± 10 ± 11 V VOH V+ = 5 V, V– = 0 V, R VOL V+ = 5 V, V– = 0 V, RL = 10 kW 100 500 100 500 100 500 mV Common-Mode CMRR V+ = 5 V, V– = 0 V, 90 110 80 100 800 100 dB Rejection Ratio 0 V < V CM < 3.5 V VS = ± 15 V, 100 120 90 110 90 110 dB –15 V < VCM < +13.5 V Power Supply Supply Current V S = ± 1.5 V, No Load 65 100 65 100 60 100 mA (All Amplifiers) I SY VS = ± 15 V, No Load 80 120 80 120 75 120 mA NOTE *Guaranteed by CMRR test. Specifications subject to change without notice
ELECTRICAL CHARACTERISTICS
Figure 1. Simplified Schematic
1 V < VO < 4 V, RL = 100 kW
for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot asse mbly and testing.
REV. C OP490 –5– ABSOLUTE MAXIMUM RATINGS * Common-Mode Input Voltage [(V–) – 20 V] to [(V+) + 20 V] Storage Temperature Range Operating Temperature Range Junction Temperature (T *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Type /H9258JA* /H9258JC Unit 14-Pin Hermetic DIP (Y) 99 12 ∞C/W 14-Pin Plastic DIP (P) 76 33 ∞C/W 16-Pin SOL (S) 92 27 ∞C/W *qJA is specified for worst case mounting conditions, i.e., qJA is specified for device in socket for CERDIP and PDIP packages; qJA is specified for device soldered to printed circuit board for SOL package CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP490 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE SMD Part Number ADI Equivalent 5962-89670013A* OP490ATCMDA 5962-8967001CA* OP490AYMDA *Not recommended for new designs. Obsolete April 2002. ORDERING GUIDE Temperature Package Package Model Range Description Option OP490EY* –25∞C to +85∞C1 4-Lead CERDIP Y-14 OP490FY* –25∞C to +85∞C 14-Lead CERDIP Y-14 OP490GP –40 ∞C to +85∞C1 4-Lead Plastic DIP P-14 OP490GS –40 ∞C to +85∞C 16-Lead SOIC S-14 *Not recommended for new designs. Obsolete April 2002. For Military processed devices, please refer to the Standard Microcircuit Drawing (SMD) available at www.dscc.dla.mil/programs/milspec/default.asp
REV. C OP490 –6– TEMPERA TURE /H11543C INPUT OFFSET VOL T AGE mV 0.3 0.2 0.1 75 125 50 25 0 25 50 0.4 VS = 15V TPC 1. Input Offset Voltage vs. Temperature TEMPERA TURE /H11543C
0.2 INPUT OFFSET CURRENT nA
1.0 0.8 0.6 0.4 1.4 1.2 75 125 50 25 0 25 50 1.6 VS = 15V TPC 2. Input Offset Current vs. Temperature TEMPERA TURE /H11543C
3.6 INPUT BIAS CURRENT nA
4.4 4.2 4.0 3.8 4.6 75 125 50 25 0 25 50 4.8 VS = 15V TPC 3. Input Bias Current vs. Temperature TEMPERA TURE /H11543C TOTAL SUPPL Y CURRENT /H9262A 75 125 50 25 0 25 50 VS = 15V VS = 1.5V TPC 4. Total Supply Current vs. Temperature SINGLE-SUPPL Y VOL T AGE V 600 03 0 5 OPEN-LOOP GAIN V/mV 10 15 20 25 500 400 300 200 100 TA = 25/H11543C RL = 10k/H9024 25/H11543C 85/H11543C 125/H11543C TPC 5. Open-Loop Gain vs. Single-Supply Voltage FREQUENCY Hz 140 0.1 100k 1 OPEN-LOOP GAIN dB 10 100 1k 10k 120 100 VS = 15V TA = 25/H11543C RL = 10k/H9024 135 180 PHASE SHIFT Degrees GAIN TPC 6. Open-Loop Gain and Phase Shift vs. Frequency –Typical Performance Characteristics
REV. C –7– OP490 FREQUENCY Hz 20 10 100 k100 CLOSED-LOOP GAIN dB 1k 10k VS = 15V TA = 25/H11543C TPC 7. Closed-Loop Gain vs. Frequency LOAD RESIST ANCE /H9024 100 100k 1k OUTPUT VOL T AGE SWING V 10k V+ = 5V , V = 0V TA = 25/H11543C TPC 8. Output Voltage Swing vs. Load Resistance LOAD RESIST ANCE /H9024 100 100k 1k OUTPUT SWING V 10k VS = 15 TA = 25/H11543C POSITIVE NEGA TIVE TPC 9. Output Voltage Swing vs. Load Resistance LOAD RESIST ANCE /H9024 120 11 k 10 POWER SUPPL Y REJECTION dB 100 TA = 25/H11543C 100 POSITIVE SUPPL Y NEGA TIVE SUPPL Y TPC 10. Power Supply Rejection vs. Frequency FREQUENCY Hz 140 0.1 1k COMMON-MODE REJECTION dB 11 0 100 120 VS = 15V TA = 25/H11543C 100 TPC 11. Common-Mode Rejection vs. Frequency VOLTAGE NOISE DENSITY nV/ Hz FREQUENCY Hz 100 0.1 1k 11 0 1 0 0 VS = 15V TA = 25/H11543C TPC 12. Noise Voltage Density vs. Frequency
REV. C OP490 –8– VOLTAGE NOISE DENSITY nV/ Hz FREQUENCY Hz 100 0.1 0.1 1 k11 0 1 0 0 VS = 15V TA = 25/H11543C TPC 13. Current Noise Density vs. Frequency TIME 100/H9262s/DIV 00 0 VOLTAG E 20mV/DIV 00000000 VS = 15V TA = 25/H11543C AV = 1 RL = 10k/H9024 CL = 500pF TPC 14. Small-Signal Transient Response TIME 1ms/DIV 00 0 VOLTAG E 5V/DIV 00000000 VS = 15V TA = 25/H11543C AV = 1 RL = 10k/H9024 CL = 500pF TPC 15. Large-Signal Transient Response
Figure 5. Micropower Voltage Controlled Oscillator well up to a few hundred hertz.
23 IOUT1D
Figure 6. Micropower Single-Supply Quad Voltage Output 8-Bit DAC
tance of the DAC ladder presents to the op amp feedback loop. Figure 7. High Output Amplifier
Figure 8. Single-Supply Micropower Quad Programmable Gain Amplifier
REV. C OP490 –14– 14-Lead Hermetic DIP (Y Suffix) 0.310 (7.87) 0.220 (5.59) PIN 1 0.005 (0.13) MIN 0.098 (2.49) MAX 0.100 (2.54) BSC 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) SEATING PLANE 0.200 (5.08) MAX 0.785 (19.94) MAX 0.150 (3.81) MIN 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) OUTLINE DIMENSIONS Dimensions shown in inches and (mm).
Revision History
Data Sheet changed from REV. B to REV. C. 14-Lead Plastic DIP (P Suffix) 1 7 PIN 1 0.795 (20.19) 0.725 (18.42) 0.280 (7.11) 0.240 (6.10) 0.100 (2.54) BSC SEATING PLANE 0.060 (1.52) MAX 0.022 (0.558) 0.014 (0.356) 0.160 (4.06) 0.115 (2.93) 0.070 (1.77) 0.045 (1.15) 0.130 (3.30) MIN 0.195 (4.95) 0.115 (2.93) 0.015 (0.381) 0.008 (0.204) 0.325 (8.25) 0.300 (7.62) 16-Lead SOIC (S Suffix) SEATING PLANE 0.0118 (0.30) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.1043 (2.65) 0.0926 (2.35) 0.050 (1.27) BSC 16 9 0.4193 (10.65) 0.3937 (10.00) 0.2992 (7.60) 0.2914 (7.40) PIN 1 0.4133 (10.50) 0.3977 (10.00) 0.0125 (0.32) 0.0091 (0.23) 8/H11543 0/H11543 0.0291 (0.74) 0.0098 (0.25)/H11547 45/H11543 0.0500 (1.27) 0.0157 (0.40)
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–16– PRINTED IN U.S.A. C00308–0–4/02(C)