OP37GZ

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REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a OP37 Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 Low Noise, Precision, High Speed Operational Amplifier (A VCL > 5) SIMPLIFIED SCHEMATIC Q2B R2* Q2AQ1A Q1B R1* R3 18 VOS ADJ. R1 AND R2 ARE PERMANENTL Y ADJUSTED A T WAFER TEST FOR MINIMUM OFFSET VOL T AGE. NON-INVERTING INPUT (+) INVERTING INPUT (–) Q21 R23 R24 Q23 Q24 Q22 Q11 Q12 Q27 Q28 R12 C3 C4 Q26 Q20 Q19 Q46 Q45 OUTPUT

FEATURES

Low Noise, 80 nV p-p (0.1 Hz to 10 Hz) 3 nV/ ÷Hz @ 1 kHz Low Drift, 0.2 /H9262V//H11543C High Speed, 17 V/ /H9262s Slew Rate

63 MHz Gain Bandwidth

Low Input Offset Voltage, 10 /H9262V Excellent CMRR, 126 dB (Common-Voltage @ 11 V) High Open-Loop Gain, 1.8 Million Replaces 725, OP-07, SE5534 In Gains > 5 Available in Die Form GENERAL DESCRIPTION The OP37 provides the same high performance as the OP27, but the design is optimized for circuits with gains greater than five. This design change increases slew rate to 17 V/ ms and gain-bandwidth product to 63 MHz. The OP37 provides the low offset and drift of the OP07 plus higher speed and lower noise. Offsets down to 25 mV and a maximum drift of 0.6 mV/∞C make the OP37 ideal for preci- sion instrumentation applications. Exceptionally low noise (en= 3.5 nV/ @ 10 Hz), a low 1/f noise corner frequency of 2.7 Hz, and the high gain of 1.8 million, allow accurate high-gain amplification of low-level signals. The low input bias current of 10 nA and offset current of 7 nA are achieved by using a bias-current cancellation circuit. Over the military temperature range this typically holds I B and IOS to 20 nA and 15 nA respectively. PIN CONNECTIONS 8-Lead Hermetic DIP (Z Suffix) Epoxy Mini-DIP (P Suffix) 8-Lead SO (S Suffix) NC = NO CONNECT VOS TRIM –IN +IN VOS TRIM OUT NCV– OP37 The output stage has good load driving capability. A guaranteed swing of 10 V into 600 W and low output distortion make the OP37 an excellent choice for professional audio applications. PSRR and CMRR exceed 120 dB. These characteristics, coupled with long-term drift of 0.2 mV/month, allow the circuit designer to achieve performance levels previously attained only by discrete designs. Low-cost, high-volume production of the OP37 is achieved by using on-chip zener-zap trimming. This reliable and stable offset trimming scheme has proved its effectiveness over many years of production history. The OP37 brings low-noise instrumentation-type performance to such diverse applications as microphone, tapehead, and RIAA phono preamplifiers, high-speed signal conditioning for data acquisition systems, and wide-bandwidth instrumentation.

REV. B OP37 –2– ABSOLUTE MAXIMUM RATINGS 4 Operating Temperature Range Package Type /H9258JA 3 /H9258JC Unit 8-Lead Hermetic DIP (Z) 148 16 ∞C/W 8-Lead Plastic DIP (P) 103 43 ∞C/W 8-Lead SO (S) 158 43 ∞C/W NOTES 1For supply voltages less than 22 V, the absolute maximum input voltage is equal to the supply voltage. 2The OP37’s inputs are protected by back-to-back diodes. Current limiting resistors are not used in order to achieve low noise. If differential input voltage exceeds 0.7 V, the input Current should be limited to 25 mA. 3/H9258JA is specified for worst case mounting conditions, i.e., /H9258JA is specified for device in socket for TO, CerDIP, P-DIP, and LCC packages; /H9258JA is specified for device soldered to printed circuit board for SO package. 4Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. ORDERING GUIDE TA = 25∞CO perating VOS MAX CerDIP Plastic Temperature (/H9262V) 8-Lead 8-Lead Range

25 OP37AZ * MIL

25 OP37EZ OP37EP IND/COM

60 OP37FP * IND/COM

100 OP37GP XIND

100 OP37GZ OP37GS XIND

*Not for new design, obsolete, April 2002. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP37 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE

REV. B –3– OP37 SPECIFICATIONS( VS = /H1155015 V, TA = 25/H11543C, unless otherwise noted.) OP37A/E OP37F OP37G Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit Input Offset Voltage V OS Note 1 10 25 20 60 30 100 mV Long-Term Stability V Input Offset Current I OS 73 5 9 5 0 12 75 nA Input Bias Current I B ± 10 ± 40 ± 12 ± 55 ± 15 ± 80 nA Input Noise Voltage e Input Noise Voltage Density e Input Noise Current Density i Input Resistance Differential Mode R IN Note 7 1.3 6 0.9 4 5 0.7 4 M W Input Resistance Common Mode RINCM 3 2.5 2 G W Input Voltage Range IVR ± 11 ± 12.3 ± 11 ± 12.3 ± 11 ± 12.3 V Common Mode Rejection Ratio CMRR V CM = ± 11 V 114 126 106 123 100 120 dB Power Supply Rejection Ratio PSSR V S = ± 4 V 1 10 1 10 2 20 mV/ V to ±18 V Large Signal Voltage Gain A VO RL ≥ 2 kW, VO = ± 10 V 1000 1800 1000 1800 700 1500 V/mV RL ≥ 1 kW, Vo = ± 10 V 800 1500 800 1500 400 1500 V/mV RL ≥ 600 W, VO = ± 1 V, VS ±44 250 700 250 700 200 500 V/mV Output Voltage Swing V RL ≥ 600 W± 10 ± 11.5 ± 10 ± 11.5 ± 10 ± 11.5 V Slew Rate SR R L ≥ 2k W4 11 17 11 17 11 17 V/ ms Gain Bandwidth Product GBW f O = 10 kHz4 45 63 45 63 45 63 MHz fO = 1 MHz 40 40 40 MHz Open-Loop Output Resistance RO VO = 0, IO = 0 70 70 70 W Power Consumption P d VO = 0 90 140 90 140 100 170 mW Offset Adjustment Range R P = 10 kW± 4 ± 4 ± 4m V NOTES 1Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of powe r. A/E grades guaranteed fully warmed up. 2Long term input offset voltage stability refers to the average trend line of V OS vs. Time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in V OS during the first 30 days are typically 2.5 mV—refer to typical performance curve. 3Sample tested. 4Guaranteed by design. 5See test circuit and frequency response curve for 0.1 Hz to 10 Hz tester. 6See test circuit for current noise measurement. 7Guaranteed by input bias current.

REV. B–4– OP37–SPECIFICATIONS

Electrical Characteristics

Parameter Symbol Conditions Min Typ Max Min Typ Max Unit Input Offset Voltage V OS Note 1 10 25 30 100 mV Average Input Offset Drift TCV OS Note 2 TCVOSN Note 3 0.2 0.6 0.4 1.8 mV/∞C Input Offset Current I OS 15 50 30 135 nA Input Bias Current I B ±20 ± 60 ±35 ±150 nA Input Voltage Range IVR ±10.3 ±11.5 ±10.2 ±11.5 V Common Mode Rejection Ratio CMRR V CM = ± 10 V 108 122 94 116 dB Power Supply Rejection Ratio PSRR V S = ±4.5 V to ± 18 V 2 16 4 51 mV/ V Large-Signal Voltage Gain A VO RL ≥ 2 kW, VO = ± 10 V 600 1200 300 800 V/mV Output Voltage Swing V O RL ≥ 2 kW± 11.5 ±13.5 ±10.5 ±13.0 V Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit Input Offset Voltage V OS 20 50 40 140 55 220 mV Average Input Offset Drift TCV OS Note 2 Input Offset Current I OS 10 50 14 85 20 135 nA Input Bias Current I Input Voltage Common Mode Rejection Ratio CMRR V CM = ±10 V 108 122 100 119 94 116 dB Power Supply Rejection Ratio PSRR V S = ± 4.5 V to ±18 V 2 15 2 16 4 32 mV/ V Large-Signal Voltage Gain A VO RL ≥ 2 kW, VO = ±10 V 750 1500 700 1300 450 1000 V/mV Output Voltage NOTES 1Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of powe r. A/E grades guaranteed fully warmed up. 2The TC VOS performance is within the specifications unnulled or when nulled withRP = 8 kW to 20 kW. TC VOS is 100% tested for A/E grades, sample tested for F/G grades. 3Guaranteed by design. ( VS = /H1155015 V, –55 /H11543C < TA < +125/H11543C, unless otherwise noted.) (VS = /H1155015 V, –25 /H11543C < TA < +85/H11543C for OP37EZ/FZ, 0/H11543C < TA < 70/H11543C for OP37EP/FP, and –40 /H11543C < TA < +85/H11543C for OP37GP/GS/GZ, unless otherwise noted.)

REV. B OP37 –5– Wafer Test Limits OP37NT OP37N OP37GT OP37G OP37GR Parameter Symbol Conditions Limit Limit Limit Limit Limit Unit Input Offset Voltage V OS Note 1 60 35 200 60 100 mV MAX Input Offset Current I OS 50 35 85 50 75 nA MAX Input Bias Current I B ± 60 ± 40 ± 95 ± 55 ± 80 nA MAX Input Voltage Range IVR ± 10.3 ± 11 ± 10.3 ± 11 ± 11 V MIN Common Mode Rejection Ratio CMRR V CM = ± 11 V 108 114 100 106 100 dB MIN Power Supply Rejection Ratio PSRR T A = 25∞C, VS = ±4 V to ± 18 V 10 10 1 01 0 2 0 mV/V MAX TA = 125∞C, VS = ±4.5 V to ± 18 V 16 20 mV/V MAX Large-Signal Voltage Gain A VO RL ≥ 2 kW, VO = ±10 V 600 1000 500 1000 700 V/mV MIN RL ≥ 1 kW, VO = ±10 V 800 800 V/mV MIN Output Voltage Swing V O RL ≥ 2 kW± 11.5 ± 12 ± 11 ± 12 ± 11.5 V MIN RL ≥ 600 kW± 10 ± 10 ± 10 V MIN Power Consumption P d VO = 0 140 140 170 mW MAX NOTES For 25∞C characterlstics of OP37NT and OP37GT devices, see OP37N and OP37G characteristics, respectively. Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assem bly and testing. (VS = /H1155015 V, TA = 25/H11543C for OP37N, OP37G, and OP37GR devices; T A = 125/H11543C for OP37NT and OP37GT devices, unless otherwise noted.) BINDING DIAGRAM 4 6 1427U 1990 1. NULL 2. (–) INPUT 3. (+) INPUT 4. V– 6. OUTPUT 7. V+ 8. NULL

REV. B OP37 –6– Typical Electrical Characteristics OP37NT OP37N OP37GT OP37G OP37GR Parameter Symbol Conditions Typical Typical Typical Typical Typical Unit Average Input Offset Voltage Drift TCV OS or Nulled or TCVOSN Unnulled R P = 8 kW Average Input Offset Current Drift TCI OS 80 80 130 130 180 pA/ ∞C Average Input Bias Current Drift TCI B 100 100 160 160 200 pA/ ∞C Input Noise Voltage Density e Input Noise Current Density i Input Noise Voltage e n p-p 0.1 Hz to Slew Rate SR R L ≥ 2k W 17 17 17 17 17 V/ ms Gain Bandwidth Product GBW f O = 10 kHz 63 63 63 63 63 MHz (VS = /H1155015 V, TA = 25/H11543C, unless otherwise noted.)

REV. B –7– OP37 FREQUENCY – Hz GAIN – dB 100 0.01 0.1 1 10 100 TEST TIME OF 10sec MUST BE USED TO LIMIT LOW FREQUENCY (<0.1Hz) GAIN. TPC 1. Noise-Tester Frequency Response (0.1 Hz to 10 Hz) BANDWIDTH – Hz RMS VOL T AGE NOISE – /H9262V 100k 0.1 0.01 100 1k 10k TA = 25/H11543C VS = /H1155015V TPC 4. Input Wideband Voltage Noise vs. Bandwidth (0.1 Hz to Frequency Indicated) TOTAL SUPPL Y VOL T AGE (V+ – V–) – V olts VOLTAG E NOISE – nV/ Hz 01 0 4 0 20 30 TA = 25/H11543C AT 10Hz AT 1kHz TPC 7. Voltage Noise Density vs. Supply Voltage FREQUENCY – Hz TA = 25/H11543C VS = /H1155015V 10 100 1k VOLTAG E NOISE – nV/ Hz I/F CORNER = 2.7Hz TPC 2. Voltage Noise Density vs. Frequency SOURCE RESIST ANCE – /H9024 100 10k100 1k TOTAL NOISE – nV/ Hz TA = 25/H11543C VS = /H1155015V R2 RS – 2R1 AT 1kHz AT 10Hz RESISTOR NOISE ONL Y TPC 5. Total Noise vs. Source Resistance FREQUENCY – Hz CURRENT NOISE – pA/ Hz 10.0 0.1 10 10k 1.0 100 1k I/F CORNER = 140Hz TPC 8. Current Noise Density vs. Frequency FREQUENCY – Hz 100 10 100 1k VOLTAG E NOISE – nV/ Hz LOW NOISE AUDIO OP AMP INSTRUMENT A TION RANGE TO DC AUDIO RANGE TO 20kHz I/F CORNER 741 OP37 I/F CORNER I/F CORNER = 2.7Hz TPC 3. A Comparison of Op Amp Voltage Noise Spectra TEMPERA TURE – /H11543C VOLTAG E NOISE – nV/ Hz –50 –25 0 25 50 75 100 125 AT 10Hz AT 1kHz VS = /H1155015V TPC 6. Voltage Noise Density vs. Temperature TOTAL SUPPL Y VOL T AGE – V olts SUPPL Y CURRENT – mA 5.0 TA = +125/H11543C 4.0 3.0 2.0 1.0 15 25 35 45 TA = +25/H11543C TA = –55/H11543C TPC 9. Supply Current vs. Supply Voltage Typical Performance Characteristics–

REV. B OP37 –8– TEMPERA TURE – /H11543C OFFSET VOL T AGE – /H9262V –75 –20 –40 –60 –50 –25 0 25 50 75 100 125 150 175 –30 –70 –10 –50 TRIMMING WITH 10k/H9024 POT DOES NOT CHANGE TCV OS OP37C OP37B OP37A OP37B OP37A OP37A OP37B OP37C TPC 10. Offset Voltage Drift of Eight Representative Units vs. Temperature TIME – Seconds OPEN-LOOP GAIN – dB –20 02 0 4 0 60 80 100 TA = 25/H11543C TA = 70/H11543C DEVICE IMMERSED IN 70/H11543C OIL BA TH THERMAL SHOCK RESPONSE BAND VS = +15V TPC 13. Offset Voltage Change Due to Thermal Shock FREQUENCY – Hz OPEN-LOOP VOL T AGE GAIN – dB 140 TA = 25/H11543C VS = /H1155015V RL 2k/H9024 120 100 10 10 2 103 104 105 106 107 108 TPC 16. Open-Loop Gain vs. Frequency TIME – MONTHS CHANGE IN OFFSET VOL T AGE – /H9262V 1 234567 TPC 11. Long-Term Offset Voltage Drift of Six Representative Units TEMPERA TURE – /H11543C INPUT BIAS CURRENT – nA –50 –25 0 25 50 75 100 125 150 VS = +15V OP37A OP37B OP37C TPC 14. Input Bias Current vs. Temperature TEMPERA TURE – /H11543C SLEW RA TE – V//H9262s –50 –25 0 25 50 75 100 125 VS = /H1155015V SLEW /H9021M PHASE MARGIN – DEG GAIN-BANDWIDTH PRODUCT – MHz F = 10kHz GBW TPC 17. Slew Rate, Gain Bandwidth Product, Phase Margin vs. Temperature TIME AFTER POWER ON – MINUTES CHANGE IN INPUT OFFSET VOL T AGE – /H9262V 01 4 23 TA = 25/H11543C VS = /H1155015V OP37C/G OP37F OP37A/E TPC 12. Warm Up Offset Voltage Drift TEMPERA TURE – /H11543C INPUT OFFSET CURRENT – nA –75 –50 –25 0 25 50 75 100 125 VS = /H1155015V OP37A OP37B OP37C TPC 15. Input Offset Current vs. Temperature FREQUENCY – Hz 100k 1M 10M 100M GAIN – dB –10 TA = 25/H11543C VS = /H1155015V AV = 5 –80 –100 –120 –140 –160 –180 –200 –220 PHASE SHIFT – Degrees PHASE MARGIN = 71/H11543 TPC 18. Gain, Phase Shift vs. Frequency

REV. B –9– OP37 TOTAL SUPPL Y VOL T AGE – V olts OPEN-LOOP GAIN – V//H9262V 2.5 01 0 4 0 20 30 TA = 25/H11543C 2.0 1.5 1.0 0.5 RL = 2k/H9024 RL = 1k/H9024 TPC 19. Open-Loop Voltage Gain vs. Supply Voltage CAP ACITIVE LOAD – pF PERCENT OVERSHOOT 05 0 0 20001000 1500 VS = /H1155015V VIN = 20mV AV = +5 (1k/H9024, 250/H9024) TPC 22. Small-Signal Overshoot vs. Capacitive Load TIME FROM OUTPUT SHORTED TO GROUND – MINUTES SHORT -CIRCUIT CURRENT – mA 01 4 23 5 TA = 25/H11543C VS = /H1155015V ISC(+) ISC(–) TPC 25. Short-Circuit Current vs. Time FREQUENCY – Hz 104 105 106 107 PEAK-TO-PEAK AMPLITUDE – V olts TA = 25/H11543C VS = /H1155015V TPC 20. Maximum Output Swing vs. Frequency 5V 1µs +10V –10V TA = 25/H11543C VS = /H1155015V AV = +5 (1k/H9024, 250/H9024) TPC 23. Large-Signal Transient Response FREQUENCY – Hz CMRR – dB 140 120 100 10k 100k 1M 10M VS = /H1155015V TA = 25/H11543C VCM = /H1155010V TPC 26. CMRR vs. Frequency LOAD RESIST ANCE – /H9024 MAXIMUM OUTPUT – V olts 100 1k 10k TA = 25/H11543C VS = /H1155015V POSITIVE SWING NEGA TIVE SWING TPC 21. Maximum Output Voltage vs. Load Resistance 20mV 200ns +50mV –50mV TA = 25/H11543C VS = /H1155015V AV = +5 (1k/H9024, 250/H9024) TPC 24. Small-Signal Transient Response SUPPL Y VOL T AGE – V olts COMMON-MODE RANGE – V olts 0 /H115505 /H1155010 /H1155015 /H1155020 –12 –16 TA = –55/H11543C TA = +125/H11543C TA = +25/H11543C TA = +25/H11543C TA = –55/H11543C TA = +125/H11543C TPC 27. Common-Mode Input Range vs. Supply Voltage

REV. B OP37 –10– OP12 OP37 D.U.T. 100k/H9024 4.3k/H9024 4.7/H9262F 2k/H9024 24.3k/H9024 VOLTAG E GAIN = 50,000 2.2/H9262F 22/H9262F 110k/H9024 SCOPE /H11547 1 RIN = 1M/H9024 0.1/H9262F 10/H9024 100k/H9024 0.1/H9262F TPC 28. Noise Test Circuit (0.1 Hz to

10 Hz)

FREQUENCY – Hz POWER SUPPL Y REJECTION RA TIO – dB 140 TA = 25/H11543C 120 100 10 100 1k 10k 100k 1M 10M 100M 160 POSITIVE SWING NEGA TIVE SWING TPC 31. PSRR vs. Frequency

1 SEC/DIV

TPC 29. Low-Frequency Noise LOAD RESIST ANCE – /H9024 100 1k 10k 100k SLEW RA TE – V//H9262V TA = 25/H11543C VS = /H1155015V AV = 5 VO = 20V p-p18 TPC 32. Slew Rate vs. Load LOAD RESIST ANCE – /H9024 2.4 100 1k 10k 100k OPEN-LOOP VOL T AGE GAIN – V//H9262V TA = 25/H11543C VS = /H1155015V2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 TPC 30. Open-Loop Voltage Gain vs. Load Resistance SUPPL Y VOL T AGE – V olts VOLTAG E NOISE – V//H9262s /H115503 TA = 25/H11543C AVCL = 5 /H115506 /H115509 /H1155012 /H1155015 /H1155018 /H1155021 FALL RISE TPC 33. Slew Rate vs. Supply Voltage

mainly by operating the input stage at a high quiescent current.

1 RS UNMA TCHED

2 RS MA TCHED

Figure 5. Noise vs. Resistance (Including Resistor Noise in different circuit applications. the vertical scale by the square-root of the bandwidth. Figure 6. Peak-to-Peak Noise (0.1 Hz to 10 Hz) vs. Source At RS < 1 kW key the OP37’s low voltage noise is maintained. in the 15 kW to 40 kW region. Figure 7. Noise vs. Source resistance (Includes Resistor IOS error also can be three times the V OS spec.). expected, the results are between the previous two figures.

REV. B OP37 –15– OUTLINE DIMENSIONS 8-Lead Ceramic DIP – Glass Hermetic Seal [CERDIP] (Q-8) Dimensions shown in inches and (millimeters) 1 4 0.310 (7.87) 0.220 (5.59)PIN 1 0.005 (0.13) MIN 0.055 (1.40) MAX 0.100 (2.54) BSC 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) SEATING PLANE 0.200 (5.08) MAX 0.405 (10.29) MAX 0.150 (3.81) MIN 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 8-Lead Plastic Dual-in-Line Package [PDIP] (N-8) Dimensions shown in inches and (millimeters) SEATING PLANE 0.015 (0.38) MIN 0.180 (4.57) MAX 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 1 4 5 0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.100 (2.54) BSC 0.375 (9.53) 0.365 (9.27) 0.355 (9.02) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MO-095AA 8-Lead Standard Small Outline Package [SOIC] Narrow Body (RN-8) Dimensions shown in millimeters and (inches) 0.25 (0.0098) 0.19 (0.0075) 1.27 (0.0500) 0.41 (0.0160) 0.50 (0.0196) 0.25 (0.0099) /H11547 45/H11543 8/H11543 0/H11543 1.75 (0.0688) 1.35 (0.0532) SEATING PLANE 0.25 (0.0098) 0.10 (0.0040) 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) BSC 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.33 (0.0130) COPLANARITY 0.10 CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MS-012AA

REV. B–16– C00319–0–12/02(B) PRINTED IN U.S.A.

Revision History

12/02–Data Sheet changed from REV. A to REV. B. 2/02–Data Sheet changed from REV. 0 to REV. A. OP37