OP293ES-REEL

OP193 AD | Alldatasheet

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REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a Precision, Micropower Operational Amplifiers OP193/OP293/OP493*

FEATURES

Operates from +1.7 V to 618 V Low Supply Current: 15 mA/Amplifier Low Offset Voltage: 75 mV Outputs Sink and Source: 68 mA No Phase Reversal Single or Dual Supply Operation High Open-Loop Gain: 600 V/mV Unity-Gain Stable

APPLICATIONS

Portable Medical Equipment Battery Powered Instrumentation Temperature Transducer Amplifier GENERAL DESCRIPTION The OP193 family of single-supply operational amplifiers fea- tures a combination of high precision, low supply current and the ability to operate at low voltages. For high performance in single supply systems the input and output ranges include ground, and the outputs swing from the negative rail to within 600 mV of the positive supply. For low voltage operation the OP193 family can operate down to 1.7 volts or ± 0.85 volts. The combination of high accuracy and low power operation make the OP193 family useful for battery powered equipment. Its low current drain and low voltage operation allow it to con- tinue performing long after other amplifiers have ceased func- tioning either because of battery drain or headroom. The OP193 family is specified for single +2 volt through dual ± 15 volt operation over the HOT (–40 °C to +125°C) tempera- ture range. They are available in plastic DIPs, plus SOIC sur- face mount packages. *Patent pending. © Analog Devices, Inc., 1996 Tel: 617/329-4700 Fax: 617/326-8703 14-Lead Epoxy DIP (P Suffix) 16-Lead Wide Body SOL (S Suffix) 8-Lead Epoxy DIP (P Suffix) 8-Lead SO (S Suffix) 8-Lead Epoxy DIP (P Suffix) 8-Lead SO (S Suffix) OP293 OUT B –IN B +IN B V+OUT A –IN A +IN A OP293 OUT A –IN A +IN A OUT B –IN B +IN B NC = NO CONNECT OUT A NULL NCNULL –IN A +IN A OP193 OP193 OUT A NULL NCNULL –IN A +IN A OP493 OUT A –IN A +IN A +IN B –IN B OUT B OUT D –IN D +IN D +IN C –IN C OUT C OP493 OUT D –IN D +IN D +IN C –IN C OUT C NC OUT A –IN A +IN A +IN B –IN B OUT B NC NC = NO CONNECT

“E” Grade “F” Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Units INPUT CHARACTERISTICS Offset Voltage V OS OP193 75 150 µV OP193, –40°C ≤ TA ≤ +125°C 175 250 µV OP293 100 250 µV OP293, –40°C ≤ TA ≤ +125°C 200 350 µV OP493 125 275 µV OP493, –40°C ≤ TA ≤ +125°C 225 375 µV Input Bias Current I B VCM = 0 V, –40°C ≤ TA ≤ +125°C1 5 2 0 n A Input Offset Current I OS VCM = 0 V, –40°C ≤ TA ≤ +125°C2 4 n A Input Voltage Range V CM –14.9 +13.5 –14.9 +13.5 V Common-Mode Rejection CMRR –14.9 ≤ VCM ≤ +14 V 100 116 97 116 dB –40°C ≤ TA ≤ +125°C 9 79 4d B Large Signal Voltage Gain A VO RL = 100 kΩ , –10 V ≤ VOUT ≤ +10 V 500 500 V/mV –40°C ≤ TA ≤ +85°C 300 300 V/mV –40°C ≤ TA ≤ +125°C 300 300 V/mV Large Signal Voltage Gain A VO RL = 10 kΩ , –10 V ≤ VOUT ≤ +10 V 350 350 V/mV –40°C ≤ TA ≤ +85°C 200 200 V/mV –40°C ≤ TA ≤ +125°C 150 150 V/mV Large Signal Voltage Gain A VO RL = 2 kΩ , –10 V ≤ VOUT ≤ +10 V 200 200 V/mV –40°C ≤ TA ≤ +85°C 125 125 V/mV –40°C ≤ TA ≤ +125°C 100 100 V/mV Long Term Offset Voltage V OS Note 1 150 300 µV Offset Voltage Drift ΔVOS/Δ T Note 2 0.2 1.75 µV/°C OUTPUT CHARACTERISTICS Output Voltage Swing High V OH IL = 1 mA +14.1 14.2 +14.1 14.2 V IL = 1 mA, IL = 5 mA +13.9 14.1 +13.9 14.1 V Output Voltage Swing Low V OL IL = –1 mA –14.7 –14.6 -14.7 –14.6 V IL = –1 mA, IL = –5 mA 14.2 –14.1 14.2 –14.1 V Short Circuit Current I SC ± 25 ± 25 mA POWER SUPPLY Power Supply Rejection Ratio PSRR V S = ± 1.5 V to ± 18 V 100 120 97 120 dB VS = ± 1.5 V to ± 18 V, –40°C ≤ TA ≤ +125°C 9 79 4d B Supply Current/Amplifier I SY –40°C ≤ TA ≤ +125°C, RL = ∞ VOUT = 0 V, VS = ± 18 V 30 30 µA NOISE PERFORMANCE Voltage Noise Density e n f = 1 kHz 65 65 nV/ √Hz Current Noise Density i n f = 1 kHz 0.05 0.05 pA/ √Hz Voltage Noise e n p-p 0.1 Hz to 10 Hz 3 3 µV p-p DYNAMIC PERFORMANCE Slew Rate SR R L = 2 kΩ 15 15 V/ms Gain Bandwidth Product GBP 35 35 kHz Channel Separation V OUT = 10 V p-p, RL = 2 kΩ , f = 1 kHz 120 120 dB NOTES 1Long term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at +125 °C, with an LTPD of 1.3. 2Offset voltage drift is the average of the –40 °C to +25°C delta and the +25 °C to +125 °C delta. Specifications subject to change without notice. OP193/OP293/OP493–SPECIFICATIONS REV. A–2– (@ VS = 615.0 V, TA = +258C unless otherwise noted)

“E” Grade “F” Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Units INPUT CHARACTERISTICS Offset Voltage V OS OP193 75 150 µV OP193, –40°C ≤ TA ≤ +125°C 175 250 µV OP293 100 250 µV OP293, –40°C ≤ TA ≤ +125°C 200 350 µV OP493 125 275 µV OP493, –40°C ≤ TA ≤ +125°C 225 375 µV Input Bias Current I B –40°C ≤ TA ≤ +125°C1 5 2 0 n A Input Offset Current I OS –40°C ≤ TA ≤ +125°C2 4 n A Input Voltage Range V CM 04 04V Common-Mode Rejection CMRR 0.1 ≤ VCM ≤ +4 V 100 116 96 116 dB 0.1 ≤ VCM ≤ +4 V, –40°C ≤ TA ≤ +125°C9 2 9 2 d B Large Signal Voltage Gain A VO RL = 100 kΩ , 0.03 ≤ VOUT ≤ +4.0 V 200 200 V/mV –40°C ≤ TA ≤ +85°C 125 125 V/mV –40°C ≤ TA ≤ +125°C 130 130 V/mV Large Signal Voltage Gain A VO RL = 10 kΩ , 0.03 ≤ VOUT ≤ +4.0 V 75 75 V/mV –40°C ≤ TA ≤ +85°C 50 50 V/mV –40°C ≤ TA ≤ +125°C 70 70 V/mV Long Term Offset Voltage V OS Note 1 150 300 µV Offset Voltage Drift ΔVOS/ΔT Note 2 0.2 1.25 µV/°C OUTPUT CHARACTERISTICS Output Voltage Swing High V OH IL = 100 µA 4.4 4.4 V IL = 1 mA +4.1 4.4 +4.1 4.4 V IL = 1 mA, IL = 5 mA +4.0 4.4 +4.0 4.4 V Output Voltage Swing Low V OL IL = –100 µA 140 160 140 160 mV IL = –100 µA, –40°C ≤ TA ≤ +125°C 220 220 mV No Load 5 5 mV IL = –1 mA 280 400 280 400 mV IL = –1 mA, –40°C ≤ TA ≤ +125°C 500 500 mV IL = –5 mA 700 900 700 900 mV Short Circuit Current I SC ± 8 ± 8m A POWER SUPPLY Power Supply Rejection Ratio PSRR V S = ± 1.7 V to ± 6.0 V 100 120 97 120 dB VS = ± 1.5 V to ± 18 V, –40°C ≤ TA ≤ +125°C9 4 9 0 d B Supply Current/Amplifier I SY VCM = 2.5 V, RL = ∞ 14.5 14.5 µA NOISE PERFORMANCE Voltage Noise Density e n f = 1 kHz 65 65 nV/ √Hz Current Noise Density i n f = 1 kHz 0.05 0.05 pA/ √Hz Voltage Noise e n p-p 0.1 Hz to 10 Hz 3 3 µV p-p DYNAMIC PERFORMANCE Slew Rate SR R L = 2 kΩ 12 12 V/ms Gain Bandwidth Product GBP 35 35 kHz NOTES 1Long term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at +125 °C, with an LTPD of 1.3. 2Offset voltage drift is the average of the –40 °C to +25°C delta and the +25 °C to +125 °C delta. Specifications subject to change without notice. REV. A –3– (@ VS = +5.0 V, VCM = 0.1 V, TA = +258C unless otherwise noted) OP193/OP293/OP493

REV. A–4– OP193/OP293/OP493 ELECTRICAL SPECIFICATIONS “E” Grade “F” Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Units INPUT CHARACTERISTICS Offset Voltage V OS OP193 75 150 µV OP193, –40°C ≤ TA ≤ +125°C 175 250 µV OP293 100 250 µV OP293, –40°C ≤ TA ≤ +125°C 200 350 µV OP493 125 275 µV OP493, –40°C ≤ TA ≤ +125°C 225 375 µV Input Bias Current I B –40°C ≤ TA ≤ +125°C1 5 2 0 n A Input Offset Current I OS –40°C ≤ TA ≤ +125°C2 4 n A Input Voltage Range V CM 02 02 V Common-Mode Rejection CMRR 0.1 ≤ VCM ≤ +2 V 97 116 94 116 dB 0.1 ≤ VCM ≤ +2 V, –40°C ≤ TA ≤ +125°C 9 08 7d B Large Signal Voltage Gain A VO RL = 100 kΩ , 0.03 ≤ VOUT ≤ 2 V 100 100 V/mV –40°C ≤ TA ≤ +85°C 75 75 V/mV –40°C ≤ TA ≤ +125°C 100 100 V/mV Long Term Offset Voltage V OS Note 1 150 300 µV Offset Voltage Drift ΔVOS/ΔT Note 2 0.2 1.25 µV/°C OUTPUT CHARACTERISTICS Output Voltage Swing High V OH IL = 1 mA +2.1 2.14 +2.1 2.14 V IL = 1 mA, IL = 5 mA +1.9 2.1 +1.9 2.1 V Output Voltage Swing Low V OL IL = –1 mA 280 400 280 400 mV IL = –1 mA –40°C ≤ TA ≤ +125°C 500 500 mV IL = –5 mA 700 900 700 900 mV Short Circuit Current I SC ± 8 ± 8m A POWER SUPPLY Power Supply Rejection Ratio PSRR V S = +1.7 V to +6 V, 100 97 –40°C ≤ TA ≤ +125°C 9 49 0d B Supply Current/Amplifier I SY VCM = 1.5 V, RL = ∞ 14.5 22 14.5 22 µA –40°C ≤ TA ≤ +125°C2 2 2 2 µA Supply Voltage Range V S +2 ± 18 +2 ± 18 V NOISE PERFORMANCE Voltage Noise Density e n f = 1 kHz 65 65 nV/ √Hz Current Noise Density i n f = 1 kHz 0.05 0.05 pA/ √Hz Voltage Noise e n p-p 0.1 Hz to 10 Hz 3 3 µV p-p DYNAMIC PERFORMANCE Slew Rate SR R L = 2 kΩ 10 10 V/ms Gain Bandwidth Product GBP 25 25 kHz Channel Separation V OUT = 10 V p-p, RL = 2 kΩ , f = 1 kHz 120 120 dB NOTES 1Long term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at +125 °C, with an LTPD of 1.3. 2Offset voltage drift is the average of the –40 °C to +25°C delta and the +25 °C to +125 °C delta. Specifications subject to change without notice. (@ VS = +3.0 V, VCM = 0.1 V, TA = +258C unless otherwise noted)

“E” Grade “F” Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Units INPUT CHARACTERISTICS Offset Voltage V OS OP193 75 150 µV OP193, –40°C ≤ TA ≤ +125°C 175 250 µV OP293 100 250 µV OP293, –40°C ≤ TA ≤ +125°C 175 350 µV OP493 125 275 µV OP493, –40°C ≤ TA ≤ +125°C 225 375 µV Input Bias Current I B –40°C ≤ TA ≤ +125°C1 5 2 0 n A Input Offset Current I OS –40°C ≤ TA ≤ +125°C2 4 n A Input Voltage Range V CM 01 01 V Large Signal Voltage Gain A VO RL = 100 kΩ , 0.03 ≤ VOUT ≤ 1 V 60 60 V/mV –40°C ≤ TA ≤ +125°C 70 70 V/mV Long Term Offset Voltage V OS Note 1 150 300 µV POWER SUPPLY Power Supply Rejection Ratio PSRR V S = +1.7 V to +6 V, 100 97 –40°C ≤ TA ≤ +125°C 9 49 0d B Supply Current/Amplifier I SY VCM = 1.0 V, RL = ∞ 13.2 20 13.2 20 µA –40°C ≤ TA ≤ +125°C2 5 2 5 µA Supply Voltage Range V S +2 ± 18 +2 ± 18 V NOISE PERFORMANCE Voltage Noise Density e n f = 1 kHz 65 65 nV/ √Hz Current Noise Density i n f = 1 kHz 0.05 0.05 pA/ √Hz Voltage Noise e n p-p 0.1 Hz to 10 Hz 3 3 µV p-p DYNAMIC PERFORMANCE Slew Rate SR R L = 2 kΩ 10 10 V/ms Gain Bandwidth Product GBP 25 25 kHz WAFER TEST LIMITS Parameter Symbol Conditions Limit Units Offset Voltage V OS VS = ± 15 V, VOUT = 0 V ± 75 µV max VS = +2 V, VOUT = 1.0 V ± 75 µV max Input Bias Current I B VCM = 1.0 V 20 nA max Input Offset Current I OS VCM = 1.0 V 4 nA max Input Voltage Range 1 VCM 0 to 4 V min Common-Mode Rejection CMRR 0 ≤ VCM ≤ 4 V 96 dB min Power Supply Rejection Ratio PSRR V S = ± 1.5 V to ± 18 V 100 dB min Large Signal Voltage Gain A VO RL = 100 kΩ 100 V/mV min Output Voltage Swing High V OH IL = 1 mA 4.1 V min Output Voltage Swing Low V OL IL = –1 mA 400 mV max Supply Current/Amplifier I SY VO = 0 V, RL = ∞ , VS = ± 18 V 25 µA max NOTES Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. 1Guaranteed by CMRR test. Specifications subject to change without notice. (@ VS = +2.0 V, VCM = 0.1 V, TA = +258C unless otherwise noted) OP193/OP293/OP493 REV. A –5– (@ VS = +5.0 V, VCM = 0.1 V, VOUT = 2 V, TA = +258C unless otherwise noted)

REV. A–6– OP193/OP293/OP493 ABSOLUTE MAXIMUM RATINGS 1 Storage Temperature Range Operating Temperature Range Junction Temperature Range Package Type θJA 3 θJC Units 8-Pin Plastic DIP (P) 103 43 °C/W 8-Pin SOIC (S) 158 43 °C/W 14-Pin Plastic DIP (P) 83 39 °C/W 16-Pin SOL (S) 92 27 °C/W NOTES 1Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2For supply voltages less than ± 18 V, the input voltage is limited to the supply voltage. 3θJA is specified for the worst case conditions, i.e., θJA is specified for device in socket for P-DIP, and θJA is specified for device soldered in circuit board for SOIC package. WARNING! ESD SENSITIVE DEVICE CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP193/OP293/OP493 feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ORDERING GUIDE Temperature Package Package Model Range Description Option OP193EP –40 °C to +125°C 8-Pin Plastic DIP N-8 OP193ES –40 °C to +125°C 8-Pin SOIC SO-8 OP193ES-REEL –40 °C to +125°C 8-Pin SOIC SO-8 OP193ES-REEL7 –40 °C to +125°C 8-Pin SOIC SO-8 OP193FP –40 °C to +125°C 8-Pin Plastic DIP N-8 OP193FS –40 °C to +125°C 8-Pin SOIC SO-8 OP193FS-REEL –40 °C to +125°C 8-Pin SOIC SO-8 OP193FS-REEL7 –40 °C to +125°C 8-Pin SOIC SO-8 OP193GBC +25 °C DICE OP293EP –40 °C to +125°C 8-Pin Plastic DIP N-8 OP293ES –40 °C to +125°C 8-Pin SOIC SO-8 OP293ES-REEL –40 °C to +125°C 8-Pin SOIC SO-8 OP293ES-REEL7 –40 °C to +125°C 8-Pin SOIC SO-8 OP293FP –40 °C to +125°C 8-Pin Plastic DIP N-8 OP293FS –40 °C to +125°C 8-Pin SOIC SO-8 OP293FS-REEL –40 °C to +125°C 8-Pin SOIC SO-8 OP293FS-REEL7 –40 °C to +125°C 8-Pin SOIC SO-8 OP293GBC +25 °C DICE OP493EP –40 °C to +125°C 14-Pin Plastic DIP N-14 OP493ES –40 °C to +125°C 16-Pin SOL SOL-16 OP493ES-REEL –40 °C to +125°C 16-Pin SOL SOL-16 OP493FP –40 °C to +125°C 14-Pin Plastic DIP N-14 OP493FS –40 °C to +125°C 16-Pin SOL SOL-16 OP493FS-REEL –40 °C to +125°C 16-Pin SOL SOL-16 OP493GBC +25 °C DICE DICE CHARACTERISTICS OP493 Die Size 0.106 × 0.143 Inch, 15,158 Sq. Mils Substrate (Die Backside) Is Connected to V– Transistor Count, 215 OP193 Die Size 0.070 × 0.055 Inch, 3,850 Sq. Mils Substrate (Die Backside) Is Connected to V– Transistor Count, 55 OP293 Die Size 0.072 × 0.110 Inch, 7,920 Sq. Mils Substrate (Die Backside) Is Connected to V– Transistor Count, 105

Figure 27. High Resolution Offset Nulling Circuit buffered by an amplifier. One such circuit is shown in Figure 28. low dc resistance to the load, but its ac impedance is low as well. improves recovery time from transients in the load current. Figure 28. A Micropower False-Ground Generator alkaline cells can power this reference for more than 18 months. regulation is 85 µV/mA with line regulation at 120 µV/V. a larger temperature-proportional voltage across R4 and R5, V1. its positive input range limit and has an undefined output state. without significantly degrading the OP193’s offset drift.

5 VBE1

Figure 29. A Battery Powered Voltage Reference Figure 30. Single-Supply Current Monitor

which greatly simplifies the calibration procedure.

1 IN/OUT

2 OUT/IN

3 OUT/IN

4 IN/OUT

6 CONT

5 CONT

7 VSS

Figure 34. Micropower Voltage Controlled Oscillator put resistance (≈10 kΩ ) independent of the digital input code. The output amplifiers act as buffers to avoid loading the DACs.

24 IOUT 2C/2D

Figure 35. Micropower Single-Supply Quad Voltage-

10 MΩ resistors placed in parallel with the DAC feedback loop

the linear region providing maximum output swing.

7 R FB B

3 R FB A

22 R FB D

26 R FB C

Figure 36. Single-Supply Micropower Quad Programmable-Gain Amplifier

REV. A–16– OP193/OP293/OP493 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead SO (S Suffix) 8-Lead Epoxy DIP (P Suffix) 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 0.0196 (0.50) 0.0099 (0.25) x 45° PIN 1 0.1574 (4.00) 0.1497 (3.80) 0.2440 (6.20) 0.2284 (5.80) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) BSC 0.0688 (1.75) 0.0040 (0.10) 0.1968 (5.00) 0.1890 (4.80) PIN 1 0.280 (7.11) 0.240 (6.10) SEATING PLANE 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93) 0.430 (10.92) 0.348 (8.84) 0.022 (0.558) 0.014 (0.356) 0.070 (1.77) 0.045 (1.15) 0.100 (2.54) BSC 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 16-Lead Wide Body SOL (S Suffix) PIN 1 0.2992 (7.60) 0.2914 (7.40) 0.4193 (10.65) 0.3937 (10.00) 16 9 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) BSC 0.1043 (2.65) 0.0926 (2.35) 0.4133 (10.50) 0.3977 (10.00) 0.0118 (0.30) 0.0040 (0.10) 0.0125 (0.32) 0.0091 (0.23) 0.0500 (1.27) 0.0157 (0.40) 0.0291 (0.74) 0.0098 (0.25) x 45° 14-Lead Epoxy DIP (P Suffix) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93) 0.795 (20.19) 0.725 (18.42) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) BSC 0.070 (1.77) 0.045 (1.15) SEATING PLANE 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN PIN 1 0.280 (7.11) 0.240 (6.10) 814 PRINTED IN U.S.A. C1994–18–1/95