OP285

OP285 (Rev. C)

Document overview

• Manufacturer or author: Analog Devices, Inc.
• PDF pages: 15

Technical content

Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 ©1992–2018 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com

FEATURES

Low offset voltage: 250 μV Low noise: 6 nV/√Hz Low distortion: 0.0006% High slew rate: 22 V/μs Wide bandwidth: 9 MHz Low supply current: 5 mA Low offset current: 2 nA Unity-gain stable 8-lead SOIC_N package

APPLICATIONS

–IN A 2 +IN A 3 V– 4 V+8 OUT B7 –IN B6 +IN B5 OP285 (Not to Scale) 8-Lead Narrow Body SOIC GENERAL DESCRIPTION The OP285 is a precision high-speed amplifier featuring the Butler Amplifier front-end. This new front-end design combines the accuracy and low noise performance of bipolar transistors with the speed of JFETs. This yields an amplifier with high slew rates, low offset and good noise performance at low supply currents. Bias currents are also low compared to bipolar designs. The OP285 offers the slew rate and low power of a JFET amplifier combined with the precision, low noise and low drift of a bipolar amplifier. Input offset voltage is laser-trimmed and guaranteed less than 250 μV . This makes the OP285 useful in dc-coupled or summing applications without the need for special selections or the added noise of additional offset adjustment circuitry. Slew rates of 22 V/μs and a bandwidth of

9 MHz make the OP285 one of the most accurate medium

speed amplifiers available. The combination of low noise, speed and accuracy can be used to build high speed instrumentation systems. Circuits such as instrumentation amplifiers, ramp generators, bi-quad filters and dc-coupled audio systems are all practical with the OP285. For applications that require long term stability, the OP285 has a guaranteed maximum long term drift specification. The OP285 is specified over the XIND—extended industrial— (−40°C to +85°C) temperature range. The OP285 is available in an 8-lead SOIC_N surface mount package.

REV. C–2– OP285–SPECIFICATIONS(@ Vs = /H1155015.0 V, TA = 25/H11543C, unless otherwise noted.) Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage VOS 35 250 µV VOS –40°C ≤ TA ≤ +85°C 600 µV Input Bias Current I B VCM = 0 V 100 350 nA IB VCM = 0 V, –40°C ≤ TA ≤ +85°C 400 nA Input Offset Current I OS VCM = 0 V 2 ±50 nA IOS VCM = 0 V, –40°C ≤ TA ≤ +85°C2 ±100 nA Input Voltage Range V CM –10.5 10.5 V Common-Mode Rejection CMRR V CM = ±10.5 V, –40°C ≤ TA ≤ +85°C 80 106 dB Large-Signal Voltage Gain A VO RL = 2 kΩ 250 V/mV AVO RL = 2 kΩ, –40°C ≤ TA ≤ +85°C 175 V/mV AVO RL = 600 Ω 200 V/mV Common-Mode Input Capacitance 7.5 pF Differential Input Capacitance 3.7 pF Long-Term Offset Voltage ∆VOS Note 1 300 µV Offset Voltage Drift ∆VOS/∆T1 µV/°C OUTPUT CHARACTERISTICS Output Voltage Swing V O RL = 2 kΩ –13.5 +13.9 +13.5 V VO RL = 2 kΩ, –40°C ≤ TA ≤ +85°C –13 +13.9 +13 V RL = 600 Ω, VS = ±18 V –16/+14 V POWER SUPPLY Power Supply Rejection Ratio PSRR V S = ±4.5 V to ±18 V 85 111 dB PSRR V S = ±4.5 V to ±18 V, –40°C ≤ TA ≤ +85°C8 0 dB Supply Current ISY 4 5 mA ISY VS = ±4.5 V to ± 18 V, VO = 0 V, –40°C ≤ TA ≤ +85°C VS = ±22 V, VO = 0 V, Supply Voltage Range VS ±4.5 ±22 V DYNAMIC PERFORMANCE Slew Rate SR R L = 2 kΩ 15 22 V/ µs Gain Bandwidth Product GBP 9 MHz Phase Margin /H9258o 62 Degrees Settling Time t s To 0.1%, 10 V Step 625 ns ts To 0.01%, 10 V Step 750 ns Distortion AV = 1, VOUT = 8.5 V p-p, f = 1 kHz, RL = 2 kΩ –104 dB Voltage Noise Density e n f = 30 Hz 7 nV/√Hz en f = 1 kHz 6 nV/√Hz Current Noise Density in f = 1 kHz 0.9 pA/√Hz Headroom THD + Noise ≤ 0.01%, RL = 2 kΩ, VS = ±18 V >12.9 dBu NOTE 1Long-term offset voltage is guaranteed by a 1,000 hour life test performed on three independent wafer lots at 125 °C, with an LTPD of 1.3. Specifications subject to change without notice.

REV. C –3– OP285 ABSOLUTE MAXIMUM RATINGS 1 Storage Temperature Range Operating Temperature Range Junction Temperature Range Package Type /H9258JA 4 /H9258JC Unit 8- SOIC 158 43 °C/W NOTES 1Absolute Maximum Ratings apply to packaged parts, unless otherwise noted. 2For supply voltages less than ±7.5 V, the absolute maximum input voltage is equal to the supply voltage. 3Shorts to either supply may destroy the device. See data sheet for full details. 4/H9258JA is specified for the worst case conditions, i.e., /H9258JA is specified for device soldered in circuit board for SOIC package. ESD CAUTION Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. _NLead SOIC _N

REV. C OP285 –4– –25 –10 –20 –15 OUTPUT VOLTAGE SWING – V SUPPL Y VOL T AGE – V +VOM –VOM 0 /H115505/H1155010 /H1155015 /H1155020 /H1155025 TA = 25/H11543C RL = 2k/H9024 TPC 1. Output Voltage Swing vs. Supply Voltage –SR +SR 100–25–50 75 50 250 TEMPERATURE – /H11543C VS = /H1155015V RL = 2k/H9024 SLEW RATE – V//H9262s VS = /H1155015V RL = 2k/H9024 TPC 4. Slew Rate vs. Temperature 120 100 1k 10k 100k 1M 10M 100COMMON MODE REJECTION – dB FREQUENCY – Hz VS = /H1155015V TA = 25/H11543C TPC 7. Common-Mode Rejection vs. Frequency 1500 100 750 250 –25 500 –50 1250 1000 75 50 250 OPEN-LOOP GAIN – V/MV TEMPERATURE – C VS = /H1155015V VO = /H1155010V +GAIN RL = 2k/H9024 –GAIN RL = 2k/H9024 –GAIN RL = 600/H9024 +GAIN RL = 600/H9024 TPC 2. Open-Loop Gain vs. Temperature –30 10k 100k 1M 10M 100M –20 –10 CLOSED-LOOP GAIN – dB FREQUENCY – Hz VS = /H1155015V TA = +25/H11543C AVCL = +100 AVCL = +10 AVCL = +1 TPC 5. Closed-Loop Gain vs. Frequency 120 100 1k 10k 100k 1M 100 +PSRR –PSRR FREQUENCY – Hz POWER SUPPLY REJECTION – dB VS = /H1155015V TA = 25/H11543C TPC 8. Power Supply Rejection vs. Frequency 1.0 0.80.60.40.2 SLEW RATE – V//H9262s DIFFERENTIAL INPUT VOLTAGE – V –SR +SR VS = /H1155015V RL = 2k/H9024 TPC 3. Slew Rate vs. Differential Input Voltage 100 1k 10k 100k 1M 10M FREQUENCY – Hz IMPEDANCE – /H9024 AVCL = +1 AVCL = +100 AVCL = +10 VS = /H1155015V TA = 25/H11543C TPC 6. Closed-Loop Output Imped ance vs. Frequency 100 –60 10k 100k 1M 10M 100M –40 –20 135 180 225 270 OPEN-LOOP GMIN – dB PHASE – Degrees PHASE GAIN FREQUENCY – Hz VS = /H1155015V RL = 2k TA = 25/H11543C 0N = 58/H11543 TPC 9. Open-Loop Gain, Phase vs. Frequency

REV. C –5– Typical Performance Characteristics– OP285 –50 100 –25 75 50 250 TEMPERATURE – /H11543C GAIN BANDWIDTH PRODUCT – MHz PHASE MARGIN – Degrees GBW Mø TPC 10. Gain Bandwidth Product, Phase Margin vs. Temperature 1k 10k 10M 1M100k TA = 25/H11543C VS = 15V AVCL = +1 RL = 2k/H9024 FREQUENCY – Hz MAXIMUM OUTPUT SWING – V TPC 13. Maximum Output Swing vs. Frequency 300 100 150 –25 100 –50 250 200 75 50 250 VS = 15V TEMPERATURE – /H11543C INPUT BIAS CURRENT – nA TPC 16. Input Bias Current vs. Temperature 100 500 100 400200 300 LOAD CAPACITANCE – pF OVERSHOOT – % VS = 15V RL = 2k VIN = 100mV p-p A = +1 NEGATIVE EDGE VCL A = +1 POSITIVE EDGE VCL TPC 11. Small-Signal Overshoot vs.| Load Capacitance 5.0 3.0 4.5 3.5 4.0 15100 TA = +25/H11543C TA = +85/H11543C TA = –40/H11543C SUPPLY CURRENT – mA SUPPLY VOLTAGE – V TPC 14. Supply Current vs. Supply Voltage FREQUENCY – Hz 10 100 100k 1k CURRENT NOISE DENSITY – pA/ Hz VS = 15V TA = 25/H11543C TPC 17. Current Noise Density vs. Frequency 100 1k 10k LOAD RESISTANCE – /H9024 MAXIMUM OUTPUT SWING – Volts TA = 25/H11543C VS = 15V +VOM –VOM TPC 12. Maximum Output Voltage vs. Load Resistance 120 100 –25 –50 100 110 7525 500 TEMPERATURE – /H11543C ABSOLUTE OUTPUT CURRENT – mA VS = 15V SOURCE SINK TPC 15. Short Circuit Current vs. Temperature 250 150 100 200 9 8 7 6 5 4 3 2 UNITS TC VOS – /H9262V/ /H11543C –40/H11543C TA +85/H11543C

402 OP AMPS

TPC 18. tC VOS Distribution

REV. C OP285 –6– 250 250 150 100 –250 200 150500–150 UNITS TA= 25/H11543C 402 /H11547 OP AMPS INPUT OFFSET – /H9262V –50–100–200 200100 TPC 19. Input Offset (VOS) Distribution 100 200nS5V TPC 22. Negative Slew Rate RL =2 kΩ, VS = ±15 V, AV = +1 0 Hz 2.5 KHz BW: 15.0 MHzMKR: 1 000 Hz CH A: 80.0 /H9262V FS 10.0 /H9262V/DIV MKR: 6.23 /H9262V/Hz TPC 25. OP285 Voltage Noise Density vs. Frequency VS = ±15 V, AV = 1000 –10 900 100 800500 600300 400 700200 STEP SIZE – V SETTLING TIME – ns +0.1% +0.01% –0.1% –0.01% TPC 20. Settling Time vs. Step Size 100 200nS5V TPC 23. Positive Slew Rate RL = 2 kΩ, VS = ±15 V, AV = +1 500 100 400300200 CAPACITIVE LOAD – pF SLEW RATE – V//H9262S TA = 25/H11543C VS = 15V –SR +SR TPC 21. Slew Rate vs. Capacitive Load 100 100nS50mV TPC 24. Small Signal Response RL =2 kΩ, VS = ±15 V, AV = +1

Figure 13. Phase Error Comparison amplifiers, see Application Note AN-107. advantage of the OP285’s speed and high output current drive. Figure 14. A Fast Current Pump matching of the OP285, which is typically less than 250 µV. Figure 15. A High-Speed Instrumentation Amplifier speed signal conditioning applications.

2 Open 5 MHz 780 kHz

REV. C OP285 –12– OP285 SPICE Model *Node assignments * noninverting input * inverting input * positive supply * negative supply * output .SUBCKT OP285 1 2 99 50 34 * INPUT STAGE & POLE AT 100 MHZ R3 5 51 2.188 R4 6 51 2.188 CIN 1 2 1.5E-12 C2 5 6 364E-12 I1 97 4 100E-3 IOS 1 2 1E-9 EOS 9 3 POLY(1) 26 28 35E-6 1 Q1 5 2 7 QX Q2 6 9 8 QX R5 7 4 1.672 R6 8 4 1.672 D1 2 36 DZ D2 1 36 DZ EN 3 1 100 1 GN1 0 2 13 0 1 GN20 1 16 0 1 EREF 98 0 28 0 1 EP 97 0 99 0 l EM 510 50 0 1 * VOLTAGE NOISE SOURCE DN1 35 10 DEN DN2 10 11 DEN VN1 35 0 DC 2 VN2 0 11 DC 2 * CURRENT NOISE SOURCE DN3 12 13 DIN DN4 13 14 DIN VN3 12 0 DC 2 VN4 0 14 DC 2 CN1 13 0 7.53E-3 * CURRENT NOISE SOURCE DN5 15 16 DIN DN6 16 17 DIN VN5 15 0 DC 2 VN6 0 17 DC2 CN2 16 0 7.53E-3 * GAIN STAGE & DOMINANT POLE AT 32 HZ * R7 18 98 1.09E6 C3 18 98 4.55E-9 G1 98 18 5 6 4.57E-1 V2 97 19 1.4 V3 20 51 1.4 D3 18 19 DX D4 20 18 DX *POLE/ZERO PAIR AT 1.5MHz/2.7MHz R8 21 98 1E3 R9 21 22 1.25E3 C4 22 98 47.2E-12 G2 98 21 18 28 1E-3 * POLE AT 100 MHZ R10 23 98 1 C5 23 98 1.59E-9 G3 98 23 21 28 1 * POLE AT 100 MHZ R11 24 98 l C6 24 98 1.59E-9 G4 98 24 23 28 1 * COMMON-MODE GAIN NETWORK WITH ZERO AT 1 kHZ * R12 25 26 1E6 C7 25 26 1.59E-12 R13 26 98 1 E2 25 98 POLY(2) 1 98 2 98 0 2.506 2.506 * POLE AT 100 MHZ R14 27 98 1 C8 27 98 1.59E-9 G5 98 27 24 28 1 * OUTPUT STAGE Rl5 28 99 100E3 R16 28 50 100E3 C9 28 50 1 E-6 ISY 99 50 1.85E-3 R17 29 99 100 R18 29 50 100 L2 29 34 1E-9 G6 32 50 27 29 10E-3 G7 33 50 29 27 10E-3 G8 29 99 99 27 10E-3 G9 50 29 27 50 10E-3 V4 30 29 1.3 V5 29 31 3.8 F1 29 0 V4 1 F2 0 29 V5 1 D5 27 30 DX D6 31 27 DX D7 99 32 DX D8 99 33 DX D9 50 32 DY D10 50 33 DY * MODELS USED .MODEL QX PNP(BF = 5E5) .MODEL DX D(IS = lE-12) .MODEL DY D(IS = lE-15 BV = 50) .MODEL DZ D(IS = lE-15 BV = 7.0) .MODEL DEN D(IS = lE-12 RS = 4.35K KF = 1.95E-15 AF = l) .MODEL DIN D(IS = lE-12 RS = 77.3E-6 KF = 3.38E-15 AF = 1) .ENDS OP-285

Rev. C | Page 14 of 15 OUTLINE DIMENSIONS CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. COMPLIANT TO JEDEC STANDARDS MS-012-AA 012407-A 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45° 1.75 (0.0688) 1.35 (0.0532) SEATING PLANE 0.25 (0.0098) 0.10 (0.0040) 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) BSC 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) COPLANARITY 0.10 Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model1 Temperature Range Package Description Package Option OP285GS −40°C to +85°C 8-lead SOIC_N R-8 OP285GS-REEL −40°C to +85°C 8-lead SOIC_N R-8 OP285GS-REEL7 −40°C to +85°C 8-lead SOIC_N R-8 OP285GSZ −40°C to +85°C 8-lead SOIC_N R-8 OP285GSZ-REEL −40°C to +85°C 8-lead SOIC_N R-8 OP285GSZ-REEL7 −40°C to +85°C 8-lead SOIC_N R-8 1 Z = RoHS Compliant Part.

Rev. C | Page 15 of 15

REVISION HISTORY

1/2018—Rev. B to Rev. C 10/2017—Rev. A to Rev. B Changes to General Description Section and Pin Connection ... 1 Changes to Supply Current Parameter, Specifications Section ... 2 1/2002—Rev. 0 to Rev. A 7/1992—Revision 0: Initial Version ©1992–2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the prop erty of their respective owners. D00306-0-1/18(C)