OP27GJZ

OP27_V01 AD | Alldatasheet

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Rev. H | Page 2 of 21 TABLE OF CONTENTS

REVISION HISTORY

10/15—Rev. G to Rev. H 3/15—Rev. F to Rev. G Changes to Applications Information Section and Output 5/06—Rev. E to Rev. F 12/05—Rev. D to Rev. E 9/05—Rev. C to Rev. D 1/03—Rev. B to Rev. C 9/01—Rev. 0 to Rev. A

Rev. H | Page 3 of 21 GENERAL DESCRIPTION (Continued from Page 1) PSRR and CMRR exceed 120 dB. These characteristics, coupled with long-term drift of 0.2 µV/month, allow the circuit designer to achieve performance levels previously attained only by discrete designs. Low cost, high volume production of OP27 is achieved by using an on-chip Zener zap-trimming network. This reliable and stable offset trimming scheme has proven its effectiveness over many years of production history. The OP27 provides excellent performance in low noise, high accuracy amplification of low level signals. Applications include stable integrators, precision summing amplifiers, precision voltage threshold detectors, comparators, and professional audio circuits such as tape heads and microphone preamplifiers.

Rev. H | Page 4 of 21 SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

VS = ±15 V , T A = 25°C, unless otherwise noted. Table 1. OP27A/OP27E OP27G Parameter Symbol Test Conditions Min Typ Max Min Typ Max Unit INPUT OFFSET VOLTAGE 1 VOS 10 25 30 100 µV LONG-TERM V OS STABILITY 2, 3 V OS /Time 0.2 1.0 0.4 2.0 µV/M O INPUT OFFSET CURRENT I OS 7 35 12 75 nA INPUT BIAS CURRENT I B ±10 ±40 ±15 ±80 nA INPUT NOISE e n f O = 10 Hz 3.5 5.5 3.8 8.0 nV/√Hz Voltage Density 3 f O = 30 Hz 3.1 4.5 3.3 5.6 nV/√Hz f O = 1000 Hz 3.0 3.8 3.2 4.5 nV/√Hz INPUT NOISE i n f O = 10 Hz 1.7 4.0 1.7 pA/√Hz Current Density 3 f O = 30 Hz 1.0 2.3 1.0 pA/√Hz f O = 1000 Hz 0.4 0.6 0.4 0.6 pA/√Hz INPUT RESISTANCE Differential Mode 5 R IN 1.3 6 0.7 4 MΩ Common Mode R INCM 3 2 GΩ INPUT VOLTAGE RANGE IVR ±11.0 ±12.3 ±11.0 ±12. 3 V COMMON-MODE REJECTION RATIO CMRR V CM = ±11 V 114 126 100 120 dB POWER SUPPLY REJECTION RATIO PSRR V S = ±4 V to ±18 V 1 10 2 20 µV/V LARGE SIGNAL VOLTAGE GAIN A VO R L ≥ 2 kΩ, V O = ±10 V 1000 1800 700 1500 V/mV R L ≥ 600 Ω, V O = ±10 V 800 1500 600 1500 V/mV OUTPUT VOLTAGE SWING V O R L ≥ 2 kΩ ±12.0 ±13.8 ±11.5 ±13.5 V R L ≥ 600 Ω ±10.0 ±11.5 ±10.0 ±11.5 V SLEW RATE 6 SR R L ≥ 2 kΩ 1.7 2.8 1.7 2.8 V/µs GAIN BANDWIDTH PRODUCT 6 GBW 5.0 8.0 5.0 8.0 MHz OPEN-LOOP OUTPUT RESISTANCE R O V O = 0, I O = 0 70 70 Ω POWER CONSUMPTION P d V O 90 140 100 170 mW OFFSET ADJUSTMENT RANGE R P = 10 kΩ ±4.0 ±4.0 mV 1 Input offset voltage measurements are performed approximately 0.5 seconds after application of power. A/E grades guaranteed fully warmed up. 2 Long-term input offset voltage stability refers to the average trend line of V OS vs. time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in V OS during the first 30 days are typically 2.5 µV. Refer to the Typical Performance Characteristics section. 3 Sample tested. 4 See voltage noise test circuit (Figure 31). 5 Guaranteed by input bias current. 6 Guaranteed by design.

Rev. H | Page 5 of 21 VS = ±15 V , −55°C ≤ T A ≤ 125°C, unless otherwise noted. Table 2. OP27A Parameter Symbol Test Conditions Min Typ Max Unit INPUT OFFSET VOLTAGE 1 V OS 30 60 µV AVERAGE INPUT OFFSET DRIFT TCV OS 2 TCV OSn 3 0.2 0.6 µV/°C INPUT OFFSET CURRENT I OS 15 50 nA INPUT BIAS CURRENT IB ±20 ±60 nA INPUT VOLTAGE RANGE IVR ±10.3 ±11.5 V COMMON-MODE REJECTION RATIO CMRR V CM = ±10 V 108 122 dB POWER SUPPLY REJECTION RATIO PSRR V S = ±4.5 V to ±18 V 2 16 µV/V LARGE SIGNAL VOLTAGE GAIN A VO R L ≥ 2 kΩ, V O = ±10 V 600 1200 V/mV OUTPUT VOLTAGE SWING V O R L ≥ 2 kΩ ±11.5 ±13.5 V 1 Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power. A/E grades guaranteed fully warmed up. 2 The TCV OS performance is within the specifications unnulled or when nulled with R P = 8 kΩ to 20 kΩ. TCV OS is 100% tested for A/E grades, sample tested for G grades. 3 Guaranteed by design. VS = ±15 V , −25°C ≤ T A ≤ 85°C for OP27J and OP27Z and −40°C ≤ T A ≤ 85°C for OP27GS , unless otherwise noted. Table 3. OP27E OP27G Parameter Symbol Test Conditions Min Typ Max Min Typ Max Unit INPUT ONSET VOLTAGE V OS 20 50 55 220 µV AVERAGE INPUT OFFSET DRIFT TCV OS 1 0.2 0.6 0 4 1.8 µV/°C TCV OSn 2 0.2 0.6 0 4 1.8 µV/°C INPUT OFFSET CURRENT I OS 10 50 20 135 nA INPUT BIAS CURRENT I B ±14 ±60 ±25 ±150 nA INPUT VOLTAGE RANGE IVR ±10.5 ±11.8 ±10.5 ±1 1.8 V COMMON-MODE REJECTION RATIO CMRR VCM = ±10 V 110 124 96 118 dB POWER SUPPLY REJECTION RATIO PSRR V S = ±4.5 V to ±18 V 2 15 2 32 µV/V LARGE SIGNAL VOLTAGE GAIN A VO R L ≥ 2 kΩ, V O = ±10 V 750 1500 450 1000 V/mV OUTPUT VOLTAGE SWING VO RL ≥ 2 kΩ ±11.7 ±13.6 ±11.0 ±13.3 V 1 The TCV OS performance is within the specifications unnulled or when nulled with R P = 8 kΩ to 20 kΩ. TCV OS is 100% tested for A/E grades, sample tested for C/G grades. 2 Guaranteed by design.

Rev. H | Page 6 of 21 TYPICAL ELECTRICAL CHARACTERISTICS VS = ±15 V , T A = 25°C unless otherwise noted. Table 4. Parameter Symbol Test Conditions OP27N Typical Unit AVERAGE INPUT OFFSET VOLTAGE DRIFT 1 TCV OS or TCV OSn Nulled or unnulled, R P = 8 kΩ to 20 kΩ 0.2 µV/°C AVERAGE INPUT OFFSET CURRENT DRIFT TCI OS 80 pA/°C AVERAGE INPUT BIAS CURRENT DRIFT TCI B 100 pA/°C INPUT NOISE VOLTAGE DENSITY e n f O = 10 Hz 3.5 nV/√Hz f O = 30 Hz 3.1 nV/√Hz f O = 1000 Hz 3.0 nV/√Hz INPUT NOISE CURRENT DENSITY i n f O = 10 Hz 1.7 pA/√Hz f O = 30 Hz 1.0 pA/√Hz f O = 1000 Hz 0.4 pA/√Hz INPUT NOISE VOLTAGE SLEW RATE e np-p 0.1 Hz to 10 Hz 0.08 µV p-p SR R L ≥ 2 kΩ 2.8 V/µs GAIN BANDWIDTH PRODUCT GBW 8 MHz 1 Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.

Rev. H | Page 7 of 21 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Rating Supply Voltage ±22 V Input Voltage 1 ±22 V Output Short-Circuit Duration Indefinite Differential Input Voltage 2 ±0.7 V Differential Input Current 2 ±25 mA Storage Temperature Range −65°C to +150°C Operating Temperature Range OP27A (J, Z) −55°C to +125°C OP27E (Z) −25°C to +85°C OP27E (P) 0°C to 70°C OP27G (P , S, J, Z) −40°C to +85°C Lead Temperature Range (Soldering, 60 sec) 300°C Junction Temperature −65°C to +150°C

1 For supply voltages less than ±22 V, the absolute maximum input voltage is

equal to the supply voltage.

2 The inputs of the

OP27 are protected by back-to-back diodes. Current limiting resistors are not used in order to achieve low noise. If differential input voltage exceeds ±0.7 V, the input current should be limited to 25 mA. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, θJA is specified for device in socket for TO-99, CERDIP , and PDIP packages; θ JA is specified for device soldered to printed circuit board for SOIC package. Absolute maximum ratings apply to both dice and packaged parts, unless otherwise noted. Table 6. Package Type θ JA θ JC Unit 8-Lead Metal Can (TO-99) (J) 150 18 °C/W 8-Lead CERDIP (Z) 148 16 °C/W 8-Lead PDIP (P) 103 43 °C/W 8-Lead SOIC_N (S) 158 43 °C/W ESD CAUTION

Figure 28. Short-Circuit Current vs. Time Figure 29. CMRR vs. Frequency Figure 30. Common-Mode Input Range vs. Supply Voltage Figure 31. Voltage Noise Test Circuit (0.1 Hz to 10 Hz) Figure 32. Open-Loop Voltage Gain vs. Load Resistance

1 SEC/DIV

Figure 33. Low Frequency Noise

Figure 34. PSRR vs. Frequency

desired setting) using a potentiometer (see Figure 35). input terminal contacts can degrade the drift performance. maintained at the same temperature. Figure 35. Offset Nulling Circuit The input offset voltage of the OP27 is trimmed at wafer level. potentiometer can be used. TCV OS is not degraded (see Figure 35). with a slight degradation (0.1 µV/°C to 0.2 µV/°C) of TCV OS . Figure 36. Offset Voltage Adjustment x The device must be warmed up for at least five minutes. from air currents. Shielding minimizes thermocouple effects. feedthrough to increase the observed noise.

10 Hz p-p noise reading, since both results are determined

pulsed operation diagram (see Figure 37). parallel with R f eliminates this problem. Figure 37. Pulsed Operation

performance of other devices in different circuit applications. the vertical scale by the square root of the bandwidth.

1 RS UNMATCHED

2 RS MA TCHED

Figure 38. Noise vs. Source Resistance (Including Resistor Noise) at 1000 Hz At R S < 1 kΩ, the low voltage noise of the OP27 is maintained. error also can be 3× the V OS spec).

1 RS UNMA TCHED

Figure 39. Peak-to-Peak Noise (0.1 Hz to 10 Hz) as Source Resistance between the previous two figures. Figure 40. 10 Hz Noise vs. Source Resistance (Includes Resistor Noise)

Rev. H | Page 18 of 21 A 150 Ω resistor and R1 and R2 gain resistors connec ted to a noiseless amplifier generate 220 nV of noise in a 20 kHz bandwidth, or 73 dB below a 1 mV reference level. Any practical amplifier can only approach this noise level; it can never exceed it. With the OP27 and T1 specified, the additional noise degradation is close to 3.6 dB (or −69.5 referenced to 1 mV). REFERENCES 1. Lipshitz, S. R, “On RIAA Equalization Networks, ” JAES, Vol. 27, June 1979, p. 458–481. and Company, 1980. Sams and Company, 1978. February and March, 1980. 5. Otala, M., “Feedback-Generated Phase Nonlinearity in Audio Amplifiers, ” London AES Convention, March 1980, preprint 1976. 6. Stout, D. F ., and Kaufman, M., Handbook of Operational Amplifier Circuit Design , New Y ork, McGraw-Hill, 1976.

Rev. H | Page 21 of 21 ORDERING GUIDE Model 1 Temperature Range Package Description Package Option OP27AJ/883C −55°C to +125°C 8-Lead Metal Can (TO-99) J-Suffix (H-08) OP27GJZ −40°C to +85°C 8-Lead Metal Can (TO-99) J-Suff ix (H-08) OP27AZ −55°C to +125°C 8-Lead CERDIP Z-Suffix (Q-8) OP27AZ/883C −55°C to +125°C 8-Lead CERDIP Z-Suffix (Q -8) OP27EZ −25°C to +85°C 8-Lead CERDIP Z-Suffix (Q-8) OP27GZ −40°C to +85°C 8-Lead CERDIP Z-Suffix (Q-8) OP27EPZ 0°C to +70°C 8-Lead PDIP P-Suffix (N-8) OP27GPZ −40°C to +85°C 8-Lead PDIP P-Suffix (N-8) OP27GS −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) OP27GS-REEL7 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8 ) OP27GSZ −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) OP27GSZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8 ) OP27GSZ-REEL7 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8) OP27NBC Die 1 The OP27GJZ, OP27EPZ, OP27GPZ, OP27GSZ, OP27GSZ-REEL, and OP27GSZ-REEL7 are RoHS compliant parts. ©1981–2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their re spective owners. D00317-0-10/15(H)