OP27 AD | Alldatasheet
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REV.A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a OP27 Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 Low-Noise, Precision Operational Amplifier PIN CONNECTIONS TO-99 (J-Suffix) OUT NC 4V– (CASE) BAL BAL 1 –IN 2 +IN 3 OP27 NC = NO CONNECT
FEATURES
Low Noise: 80 nV p-p (0.1 Hz to 10 Hz), 3 nV/ √Hz Low Drift: 0.2 /H9262V//H11543C High Speed: 2.8 V/ /H9262s Slew Rate, 8 MHz Gain Bandwidth Low VOS: 10 /H9262V Excellent CMRR: 126 dB at V CM of ±11 V High Open-Loop Gain: 1.8 Million Fits 725, OP07, 5534A Sockets Available in Die Form GENERAL DESCRIPTION The OP27 precision operational amplifier combines the low offset and drift of the OP07 with both high speed and low noise. Offsets down to 25 µV and drift of 0.6 µV/°C maximum make the OP27 ideal for precision instrumentation applications. Exceptionally low noise, e n = 3.5 nV/√Hz, at 10 Hz, a low 1/f noise corner frequency of 2.7 Hz, and high gain (1.8 million), allow accurate high-gain amplification of low-level signals. A gain-bandwidth product of 8 MHz and a 2.8 V/ µsec slew rate provides excellent dynamic accuracy in high-speed, data- acquisition systems. A low input bias current of ± 10 nA is achieved by use of a bias-current-cancellation circuit. Over the military temperature range, this circuit typically holds I B and IOS to ±20 nA and 15 nA, respectively. The output stage has good load driving capability. A guaranteed swing of ± 10 V into 600 Ω and low output distortion make the OP27 an excellent choice for professional audio applications. (Continued on page 7) Q2B R2* Q2AQ1A Q1B R1* R3 18 VOS ADJ. R1 AND R2 ARE PERMANENTL Y ADJUSTED A T WAFER TEST FOR MINIMUM OFFSET VOL T AGE. NONINVERTING INPUT (+) INVERTING INPUT (–) Q21 R23 R24 Q23 Q24 Q22 Q11 Q12 Q27 Q28 R12 C3 C4 Q26 Q20 Q19 Q46 Q45 OUTPUT Figure 1. Simplified Schematic
REV. A–2– OP27
ELECTRICAL CHARACTERISTICS
Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit INPUT OFFSET VOLTAGE1 VOS 10 25 20 60 30 100 µV LONG-TERM VOS INPUT OFFSET CURRENT I OS 7 35 9 50 12 75 nA INPUT BIAS CURRENT I B ± 10 ± 40 ± 12 ± 55 ± 15 ± 80 nA INPUT NOISE INPUT RESISTANCE Differential-Mode6 RIN 1.3 6 0.94 5 0.7 4 M Ω Common-Mode R INCM 3 2.5 2 G Ω INPUT VOLTAGE COMMON-MODE REJECTION RATIO CMRR V CM = ± 11 V 114 126 106 123 100 120 dB POWER SUPPLY PSRR V S = ± 4 V REJECTION RATIO to ± 18 V 1 10 1 10 2 20 µV/V LARGE-SIGNAL A VO RL ≥ 2 kΩ, VOLTAGE GAIN V O = ± 10 V 1000 1800 1000 1800 700 1500 V/mV RL ≥ 600 Ω, VO = ± 10 V 800 1500 800 1500 600 1500 V/mV OUTPUT GAIN BANDWIDTH OPEN-LOOP OUTPUT RESISTANCE R O VO = 0, IO = 0 7 07 0 7 0 Ω POWER CONSUMPTION P d VO 90 140 90 140 100 170 mW OFFSET ADJUSTMENT RANGE R P = 10 kΩ± 4.0 ± 4.0 ± 4.0 mV NOTES 1Input offset voltage measurements are performed ~ 0.5 seconds after application of power. A/E grades guaranteed fully warmed up . 2Long-term input offset voltage stability refers to the average trend line of V OS versus. Time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in V OS during the first 30 days are typically 2.5 µV. Refer to typical performance curve. 3Sample tested. 4See test circuit and frequency response curve for 0.1 Hz to 10 Hz tester. 5See test circuit for current noise measurement. 6Guaranteed by input bias current. 7Guaranteed by design. (@ VS = ±15 V, TA = 25/H11543C, unless otherwise noted.) –SPECIFICATIONS
REV. A –3– OP27 (@ VS = ±15 V, –55 /H11543C ≤ TA ≤ 125/H11543C, unless otherwise noted.)ELECTRICAL CHARACTERISTICS OP27A OP27C Parameter Symbol Conditions Min Typ Max Min Typ Max Unit INPUT OFFSET VOLTAGE1 VOS 30 60 70 300 µV AVERAGE INPUT OFFSET DRIFT TCV OS TCVOSn 3 0.2 0.6 4 1.8 µV/°C INPUT OFFSET CURRENT I OS 15 50 30 135 nA INPUT BIAS CURRENT I B ± 20 ± 60 ± 35 ± 150 nA INPUT VOLTAGE RANGE IVR ± 10.3 ± 11.5 ± 10.2 ± 11.5 V COMMON-MODE REJECTION RATIO CMRR V CM = ± 10 V 108 122 94 118 dB POWER SUPPLY REJECTION RATIO PSRR V S = ± 4.5 V to ± 18 V 2 16 4 51 µV/V LARGE-SIGNAL VOLTAGE GAIN A VO RL ≥ 2 kΩ, VO = ± 10 V 600 1200 300 800 V/mV OUTPUT VOLTAGE SWING V O RL ≥ 2 kΩ± 11.5 ± 13.5 ± 10.5 ± 13.0 V NOTES 1Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of powe r. A/E grades guaranteed fully warmed up. 2The TCVOS performance is within the specifications unnulled or when nulled with R P = 8 kΩ to 20 kΩ. TCVOS is 100% tested for A/E grades, sample tested for C/F/G grades. 3Guaranteed by design.
REV. A–4– OP27 (@ VS = ±15 V, –25 /H11543C¯ ≤ TA ≤ 85/H11543C for OP27J, OP27Z, 0/H11543C ≤ TA ≤ 70/H11543C for OP27EP, OP27FP, and –40 /H11543C ≤ TA ≤ 85/H11543C for OP27GP, OP27GS, unless otherwise noted.) OP27E OP27F OP27G Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit INPUT ONSET VOLTAGE V OS 20 50 40 140 55 220 µV AVERAGE INPUT OFFSET DRIFT TCV OS TCVOSn INPUT OFFSET CURRENT I OS 10 50 14 85 20 135 nA INPUT BIAS CURRENT I B ± 14 ± 60 ± 18 ± 95 ± 25 ± 150 nA INPUT VOLTAGE COMMON-MODE REJECTION RATIO CMRR V CM = ± 10 V 110 124 102 121 96 118 dB POWER SUPPLY REJECTION RATIO PSRR V S = ± 4.5 V 2 15 2 16 2 32 µV/V to ± 18 V LARGE-SIGNAL VOLTAGE GAIN A VO RL ≥ 2 kΩ, VO = ± 10 V 750 1500 700 1300 450 1000 V/mV OUTPUT NOTES 1The TCVOS performance is within the specifications unnulled or when nulled with R P = 8 kΩ to 20 kΩ. TCVOS is 100% tested for A/E grades, sample tested for C/F/G grades. 2Guaranteed by design.
REV. A –5– OP27 OP27N OP27G OP27GR Parameter Symbol Conditions Limit Limit Limit Unit INPUT OFFSET VOLTAGE * VOS 35 60 100 µV Max INPUT OFFSET CURRENT I OS 35 50 75 nA Max INPUT BIAS CURRENT IB ± 40 ± 55 ± 80 nA Max INPUT VOLTAGE RANGE IVR ± 11 ± 11 ± 11 V Min COMMON-MODE REJECTION RATIO CMRR V CM = IVR 114 106 100 dB Min POWER SUPPLY PSRR V S = ± 4 V to ± 18 V 10 10 20 µV/V Max LARGE-SIGNAL VOLTAGE GAIN A VO RL ≥ 2 kΩ, VO = ± 10 V 1000 1000 700 V/mV Min AVO RL ≥ 600 Ω, VO = ± 10 V 800 800 600 V/mV Min OUTPUT VOLTAGE SWING V O RL ≥ 2 kΩ± 12.0 ± 12.0 +11.5 V Min VO RL2600n ± 10.0 ± 10.0 ± 10.0 V Min POWER CONSUMPTION P d VO = 0 140 140 170 mW Max NOTE *Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assem bly and testing. WAFER TEST LIMITS (@ VS = ±15 V, TA = 25/H11543C unless otherwise noted.) DICE CHARACTERISTICS 1. NULL 2. (–) INPUT 3. (+) INPUT 4. V– 6. OUTPUT 7. V+ 8. NULL DIE SIZE 0.109 /H11547 0.055 INCH, 5995 SQ. MILS (2.77 /H11547 1.40mm, 3.88 SQ. mm)
REV. A–6– OP27 OP27N OP27G OP27GR Parameter Symbol Conditions Typical Typical Typical Unit AVERAGE INPUT OFFSET VOLTAGE DRIFT* TCVOS or Nulled or Unnulled 0.2 0.3 0.4 µV/°C TCVOSn RP = 8 kΩ to 20 kΩ AVERAGE INPUT OFFSET CURRENT DRIFT TCI OS 80 130 180 pA/ °C AVERAGE INPUT BIAS CURRENT DRIFT TCI B 100 160 200 pA/ °C INPUT NOISE VOLTAGE DENSITY e n fO = 10 Hz 3.5 3.5 3.8 nV/ √Hz en fO = 30 Hz 3.1 3.1 3.3 nV/ √Hz en fO = 1000 Hz 3.0 3.0 3.2 nV/ √Hz INPUT NOISE CURRENT DENSITY i n fO = 10 Hz 1.7 1.7 1.7 pA/ √Hz in fO = 30 Hz 1.0 1.0 1.0 pA/ √Hz in fO = 1000 Hz 0.4 0.4 0.4 pA/ √Hz INPUT NOISE VOLTAGE e np-p 0.1 Hz to 10 Hz 0.08 0.08 0.09 µV p-p SLEW RATE SR R L ≥ 2 kΩ 2.8 2.8 2.8 V/ µs GAIN BANDWIDTH PRODUCT GBW 8 8 8 MHz NOTE *Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of powe r. TYPICAL ELECTRICAL CHARACTERISTICS(@ VS = ±15 V, TA = 25/H11543C unless otherwise noted.)
REV. A OP27 –7– Package Type /H9258JA 3 /H9258JC Unit TO 99 (J) 150 18 °C/W 8-Lead Hermetic DlP (Z) 148 16 °C/W 8-Lead Plastic DIP (P) 103 43 °C/W 20-Contact LCC (RC) 98 38 °C/W 8-Lead SO (S) 158 43 °C/W NOTES 1For supply voltages less than ± 22 V, the absolute maximum input voltage is equal to the supply voltage. 2The OP27’s inputs are protected by back-to-back diodes. Current limiting resistors are not used in order to achieve low noise. If differential input voltage exceeds ± 0.7 V, the input current should be limited to 25 mA. 3/H9258JA is specified for worst-case mounting conditions, i.e., /H9258JA is specified for device in socket for TO, CERDIP, and P-DIP packages; /H9258JA is specified for device soldered to printed circuit board for SO package. 4Absolute Maximum Ratings apply to both DICE and packaged parts, unless otherwise noted. ABSOLUTE MAXIMUM RATINGS 4 Operating Temperature Range ORDERING INFORMATION1 Package TA = 25°C Operating VOS Max CERDIP Plastic Temperature (µV) TO-99 8-Lead 8-Lead Range
25 OP27AJ 2, 3 OP27AZ2 MIL
25 OP27EJ 2, 3 OP27EZ OP27EP IND/COM
60 OP27FP 3 IND/COM
100 OP27CZ 3 MIL
100 OP27GJ OP27GZ OP27GP XIND
100 OP27GS 4 XIND
1Burn-in is available on commercial and industrial temperature range parts in CERDIP, plastic DIP, and TO-can packages. 2For devices processed in total compliance to MIL-STD-883, add /883 after part number. Consult factory for 883 data sheet. 3Not for new design; obsolete April 2002. 4For availability and burn-in information on SO and PLCC packages, contact your local sales office. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP27 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE (Continued from page 1) PSRR and CMRR exceed 120 dB. These characteristics, coupled with long-term drift of 0.2 µV/month, allow the circuit designer to achieve performance levels previously attained only by dis- crete designs. Low-cost, high-volume production of OP27 is achieved by using an on-chip Zener zap-trimming network. This reliable and stable offset trimming scheme has proved its effectiveness over many years of production history. The OP27 provides excellent performance in low-noise, high- accuracy amplification of low-level signals. Applications include stable integrators, precision summing amplifiers, precision voltage- threshold detectors, comparators, and professional audio circuits such as tape-head and microphone preamplifiers. The OP27 is a direct replacement for 725, OP06, OP07, and OP45 amplifiers; 741 types may be directly replaced by remov- ing the 741’s nulling potentiometer.
REV. A OP27 –8– FREQUENCY – Hz GAIN – dB 100 0.01 0.1 1 10 100 TEST TIME OF 10sec FURTHER LIMITS LOW FREQUENCY (<0.1Hz) GAIN TPC 1. 0.1 Hz to 10 Hzp-p Noise Tester Frequency Response BANDWIDTH – Hz RMS VOL T AGE NOISE – /H9262V 100k 0.1 0.01 100 1k 10k TA = 25/H11543C VS = /H1155015V TPC 4. Input Wideband Voltage Noise vs. Bandwidth (0.1 Hz to Frequency Indicated) TOT AL SUPPL Y VOL T AGE (V+ – V–) – V VOL T AGE NOISE – nV/ Hz 01 0 4 0 20 30 TA = 25/H11543C A T 10Hz A T 1kHz TPC 7. Voltage Noise Density vs. Supply Voltage – Typical Performance Characteristics FREQUENCY – Hz TA = 25/H11543C VS = /H1155015V 10 100 1k VOL T AGE NOISE – nV/ Hz I/F CORNER = 2.7Hz TPC 2. Voltage Noise Density vs. Frequency SOURCE RESIST ANCE – /H9024 100 10k100 1k TOT AL NOISE – nV/ Hz TA = 25/H11543C VS = /H1155015V R2 RS – 2R1 A T 1kHz A T 10Hz RESISTOR NOISE ONL Y TPC 5. Total Noise vs. Sourced Resistance FREQUENCY – Hz CURRENT NOISE – pA/ Hz 10.0 0.1 10 10k 1.0 100 1k I/F CORNER = 140Hz TPC 8. Current Noise Density vs. Frequency FREQUENCY – Hz 100 10 100 1k VOL T AGE NOISE – nV/ Hz LOW NOISE AUDIO OP AMP INSTRUMENT A TION RANGE TO DC AUDIO RANGE TO 20kHz I/F CORNER 741 OP27 I/F CORNER I/F CORNER = 2.7Hz TPC 3. A Comparison of Op Amp Voltage Noise Spectra TEMPERA TURE – /H11543C VOL T AGE NOISE – nV/ Hz –50 –25 0 25 50 75 100 125 A T 10Hz A T 1kHz VS = /H1155015V TPC 6. Voltage Noise Density vs. Temperature TOT AL SUPPL Y VOL T AGE – V SUPPL Y CURRENT – mA 5.0 TA = +125/H11543C 4.0 3.0 2.0 1.0 15 25 35 45 TA = +25/H11543C TA = –55/H11543C TPC 9. Supply Current vs. Supply Voltage
REV. A –9– OP27 TEMPERA TURE – /H11543C OFFSET VOL T AGE – /H9262V –75 –20 –40 –60 –50 –25 0 25 50 75 100 125 150 175 –30 –70 –10 –50 TRIMMING WITH 10k/H9024 POT DOES NOT CHANGE TCV OS OP27C OP27A OP27A OP27A OP27C TPC 10. Offset Voltage Drift of Five Representative Units vs. Temperature TIME – Sec OPEN-LOOP GAIN – dB –20 02 0 4 0 60 80 100 TA = 25/H11543C TA = 70/H11543C DEVICE IMMERSED IN 70/H11543C OIL BA TH VS = /H1155015V THERMAL SHOCK RESPONSE BAND TPC 13. Offset Voltage Change Due to Thermal Shock FREQUENCY – Hz VOL T AGE GAIN – dB 130 110 –10 10 100 1k 10k 100k 1M 10M 100M TPC 16. Open-Loop Gain vs. Frequency TIME – Months CHANGE IN OFFSET VOL T AGE – /H9262V 1234567 TPC 11. Long-Term Offset Voltage Drift of Six Representative Units TEMPERA TURE – /H11543C INPUT BIAS CURRENT – nA –50 –25 0 25 50 75 100 125 150 VS = /H1155015V OP27A OP27C TPC 14. Input Bias Current vs. Temperature TEMPERA TURE – /H11543C SLEW RA TE – V//H9262s –50 –25 0 25 50 75 100 125 VS = /H1155015V SLEW PHASE MARGIN – Degrees GAIN BANDWIDTH PRODUCT – MHz GBW –75 /H9021M TPC 17. Slew Rate, Gain-Bandwidth Product, Phase Margin vs. Temperature TIME AFTER POWER ON – Min CHANGE IN INPUT OFFSET VOL T AGE – /H9262V 01 4 23 TA = 25/H11543C VS = 15V OP27 C/G OP27 F OP27 A/E TPC 12. Warm-Up Offset Voltage Drift TEMPERA TURE – /H11543C INPUT OFFSET CURRENT – nA –75 –50 –25 0 25 50 75 100 125 VS = /H1155015V OP27A OP27C TPC 15. Input Offset Current vs. Temperature FREQUENCY – Hz 1M 10M 100M GAIN – dB –10 100 120 140 160 180 200 220 PHASE SHIFT – Degrees TA = 25/H11543C VS = /H1155015V/H9021 GAIN PHASE MARGIN = 70/H11543 TPC 18. Gain, Phase Shift vs. Frequency
REV. A OP27 –10– TOT AL SUPPL Y VOL T AGE – V OPEN-LOOP GAIN – V//H9262V 2.5 01 0 4 0 20 30 TA = 25/H11543C 2.0 1.5 1.0 0.5 RL = 2k/H9024 RL = 1k/H9024 TPC 19. Open-Loop Voltage Gain vs. Supply Voltage CAP ACITIVE LOAD – pF % OVERSHOOT 0 500 2000 1000 1500 VS = /H1155015V VIN = 100mV AV = +1 100 2500 TPC 22. Small-Signal Overshoot vs. Capacitive Load TIME FROM OUTPUT SHORTED TO GROUND – Min SHORT -CIRCUIT CURRENT – mA 01 4 23 5 TA = 25/H11543C VS = /H1155015V ISC(+) ISC(–) TPC 25. Short-Circuit Current vs. Time FREQUENCY – Hz 1k 10k 100k 1M PEAK-TO-PEAK AMPLITUDE – V24 TA = 25/H11543C VS = /H1155015V 10M TPC 20. Maximum Output Swing vs. Frequency 20mV 500ns 50mV –50mV AVCL = +1 CL = 15pF VS = /H1155015V TA = 25/H11543C TPC 23. Small-Signal Transient Response FREQUENCY – Hz CMRR – dB 140 120 100 10k 100k 1M100 VS = /H1155015V TA = 25/H11543C VCM = /H1155010V TPC 26. CMRR vs. Frequency LOAD RESIST ANCE – /H9024 MAXIMUM OUTPUT – V 100 1k 10k TA = 25/H11543C VS = /H1155015V POSITIVE SWING NEGA TIVE SWING TPC 21. Maximum Output Voltage vs. Load Resistance 2V 2/H9262s +5V –5V AVCL = +1 VS = /H1155015V TA = 25/H11543C TPC 24. Large-Signal Transient Response SUPPL Y VOL T AGE – V COMMON-MODE RANGE – V 0 /H115505 /H1155010 /H1155015 /H1155020 –12 –16 TA = –55/H11543C TA = +125/H11543C TA = +25/H11543C TA = +25/H11543C TA = –55/H11543C TA = +125/H11543C TPC 27. Common-Mode Input Range vs. Supply Voltage
REV. A –11– OP27 OP12 OP27 D.U.T. 100k/H9024 4.3k/H9024 4.7/H9262F 2k/H9024 24.3k/H9024 VO LTAG E GAIN = 50,000 2.2/H9262F 22/H9262F 110k/H9024 SCOPE /H11547 1 RIN = 1M/H9024 0.1/H9262F 10/H9024 100k/H9024 0.1/H9262F TPC 28. Voltage Noise Test Circuit (0.1 Hz to 10 Hz) LOAD RESIST ANCE – /H9024 2.4 100 1k 10k 100k OPEN-LOOP VOL T AGE GAIN – V//H9262V TA = 25/H11543C VS = /H1155015V2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 TPC 29. Open-Loop Voltage Gain vs. Load Resistance
1 SEC/DIV
–40 –90 –120 VOL T AGE NOISE – nV 0.1Hz to 10Hz p-p NOISE TPC 30. Low-Frequency Noise
APPLICATION INFORMATION
OP27 series units may be inserted directly into 725 and OP07 sockets with or without removal of external compensation or nulling components. Additionally, the OP27 may be fitted to unnulled 741-type sockets; however, if conventional 741 nulling circuitry is in use, it should be modified or removed to ensure correct OP27 operation. OP27 offset voltage may be nulled to zero (or another desired setting) using a potentiometer (see Offset Nulling Circuit). The OP27 provides stable operation with load capacitances of up to 2000 pF and ± 10 V swings; larger capacitances should be decoupled with a 50 Ω resistor inside the feedback loop. The OP27 is unity-gain stable. Thermoelectric voltages generated by dissimilar metals at the input terminal contacts can degrade the drift performance. Best operation will be obtained when both input contacts are main- tained at the same temperature. OFFSET VOLTAGE ADJUSTMENT The input offset voltage of the OP27 is trimmed at wafer level. However, if further adjustment of V OS is necessary, a 10 k Ω trim potentiometer can be used. TCV OS is not degraded (see Offset Nulling Circuit). Other potentiometer values from 1 kΩ to 1 MΩ can be used with a slight degradation (0.1 µV/°C to 0.2 µV/°C) of TCVOS. Trimming to a value other than zero creates a drift of approximately (V OS/300) µV/°C. For example, the change in TCVOS will be 0.33 µV/°C if V OS is adjusted to 100 µV. The offset voltage adjustment range with a 10 k Ω potentiometer is ± 4 mV. If smaller adjustment range is required, the nulling sensitivity can be reduced by using a smaller pot in conjuction with fixed resistors. For example, the network below will have a ± 280 µV adjustment range. 1 84.7k/H90244.7k/H90241k/H9024 POT Figure 2. NOISE MEASUREMENTS To measure the 80 nV peak-to-peak noise specification of the OP27 in the 0.1 Hz to 10 Hz range, the following precautions must be observed: 1. The device must be warmed up for at least five minutes. As shown in the warm-up drift curve, the offset voltage typically changes 4 µV due to increasing chip temperature after power-up. In the 10-second measurement interval, these temperature-induced effects can exceed tens-of- nanovolts. 2. For similar reasons, the device has to be well-shielded from air currents. Shielding minimizes thermocouple effects. FREQUENCY – Hz POWER SUPPL Y REJECTION RA TIO – dB140 TA = 25/H11543C 120 100 10 100 1k 10k 100k 1M 10M 100M 160 POSITIVE SWING NEGA TIVE SWING TPC 31. PSRR vs. Frequency
- Sudden motion in the vicinity of the device can also
“feedthrough” to increase the observed noise.
- The test time to measure 0.1 Hz to 10 Hz noise should not
- A noise-voltage-density test is recommended when measuring
by the white noise and the location of the 1/f corner frequency. pulsed operation diagram (Figure 3). f will eliminate this problem. Figure 3. Pulsed Operation to reasonable values by the input bias-current cancellation circuit. in different circuit applications. the vertical scale by the square root of the bandwidth.
1 RS UNMA TCHED
2 RS MA TCHED
Figure 4. Noise vs. Source Resistance (Including Resistor and IOS error also can be three times the V OS spec.). Figure 5. Peak-to-Peak Noise (0.1 Hz to 10 Hz) as Source
Phonograph direct coupled applications. Transformer interest is 400 Hz to 5 kHz.
3 Hz 100 dB 124 dB 125 dB
10 Hz 100 dB 120 dB 125 dB
30 Hz 90 dB 110 dB 124 dB
in Op Amp Applications, ” Application Note AN-15. Figure 6. 10 Hz Noise vs. Source Resistance (Includes constants of 3180, 318, and 75 µs. dissipation factors, and dielectric absorption. For the values shown, the gain is just under 100 (or 40 dB). the 8 MHz gain-bandwidth of the OP27. at frequencies up to 20 kHz.
Figure 12. Offset Nulling Circuit
- Lipshitz, S.R, “On RIAA Equalization Networks, ” JAES,
- Otala, M., “Feedback-Generated Phase Nonlinearity in
- Stout, D.F., and Kautman, M., Handbook of Operational
Amplifier Circuit Design , New York, McGraw-Hill, 1976. Dimensions shown in inches and (mm).
45 BSC
–16– C00317–0–1/02(A) PRINTED IN U.S.A.
Revision History
9/01—Data Sheet changed from REV. 0 to REV. A.