OP27A_14 TI1 | Alldatasheet
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OP27A, OP27C LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL AMPLIFIERS SLOS100E − FEBRUARY 1989 − REVISED FEBRUARY 2010 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Replacements for ADI, PMI and LTC OP27 Series Features of OP27A and OP27C: /C0068Maximum Equivalent Input Noise Voltage: 3.8 nV/√Hz at 1 kHz 5.5 nV/√Hz at 10 kHz /C0068Very Low Peak-to-Peak Noise Voltage at 0.1 Hz to 10 Hz . . . 80 nV Typ /C0068Low Input Offset Voltage OP27A ...2 5 μV Max OP27C . . . 100 μV Max /C0068High Voltage Amplification OP27A ...1 V / μV Min OP27C ...0 . 7 V /μV Min
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The OP27 operational amplifiers combine out- standing noise performance with excellent precision and high-speed specifications. The wideband noise is only 3 nV/√Hz and with the 1/f noise corner at 2.7 Hz, low noise is maintained for all low-frequency applications. The outstanding characteristics of the OP27 make these devices excellent choices for low-noise amplifier applications requiring precision performance and reliability. The OP27 series is compensated for unity gain. The OP27A and OP27C are characterized for operation over the full military temperature range of −55°C to 125°C. AVAILABLE OPTIONS V max STABLE PACKAGE TA VIOmax AT 25°C STABLE GAIN CERAMIC DIP (JG) CHIP CARRIER (FK) 55°C to 125°C 25 μV 1 OP27AJG OP27AFK −55°C to 125°C 100 μV 1 OP27CJG — Copyright © 2010, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning avail ability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. VIOTRIM IN− IN + VCC − VIOTRIM VCC + OUT NC JG PACKAGE (TOP VIEW) IN+ IN − OUT VIO TRIM symbol 3 2 1 20 19 91 0 1 1 1 2 1 3 NC VCC + NC OUT NC NC 1N− NC IN+ NC FK PACKAGE (TOP VIEW)NC NC NC NC NC NC NC − No internal connection CC −V Pin numbers are for the JG packages. IOV TRIM NC IOV TRIM
OP27A, OP27C LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL-AMPLIFIER Template Release Date: 7−11−94 SLOS100E − FEBRUARY 1989 − REVISED FEBRUARY 2010 2POST OFFICE BOX 655303 DALLAS, TEXAS 75265• schematic IN + IN − Q1A Q1B Q2B Q2A Q11 Q12 Q27 Q28 Q26 Q46 Q19 Q20 Q45 Q22 Q24Q23 Q21 VIO TRIM V IO TRIM VCC + OUT VCC − 480 μA 750 μA 260 μA 240 μA 120 μA 340 μA C1† † C1 = 120 pF for OP27
OP27A, OP27C LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL-AMPLIFIER SLOS100E − FEBRUARY 1989 − REVISED FEBRUARY 2010 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) NOTES: 1. All voltage values are with respect to the midpoint between V CC + and VCC − unless otherwise noted. 2. The inputs are protected by back-to-back diodes. Current-limiting resistors are not used in order to achieve low noise. Exces sive input current will flow if a differential input voltage in excess of approximately ±0.7 V is applied between the inputs unless some limiting resistance is used. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 85°C POWER RATING TA = 125°C POWER RATING JG FK 1050 mW 1375 mW 8.4 mW/°C 11.0 mW/°C 546 mW 715 mW 210 mW 275 mW
OP27A, OP27C LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL-AMPLIFIER SLOS100E − FEBRUARY 1989 − REVISED FEBRUARY 2010
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions OP27A OP27C UNITMIN NOM MAX MIN NOM MAX UNIT Supply voltage, VCC + 4 15 22 4 15 22 V Supply voltage, VCC − −4 −15 −22 −4 −15 −22 V Common mode input voltage V VCC ± = ± 15 V, T A = 25°C ± 11 ±11 VCommon-mode input voltage, VIC VCC ± = ± 15 V, T A = − 55°C to 125°C ±10.3 ±10.2 V Operating free-air temperature, TA −55 125 −55 125 °C electrical characteristics at specified free-air temperature, VCC± = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS T † OP27A OP27C UNITPARAMETER TEST CONDITIONS TA† MIN TYP MAX MIN TYP MAX UNIT V Input offset voltage VO = 0, V IC = 0 25°C 10 25 30 100 VVIO Input offset voltage VO = 0, VIC = 0 RS = 50 Ω, See Note 3 Full range 60 300 μV αVIO Average temperature coefficient of input offset voltage Full range 0.2 0.6 0.4 1.8 μV/°C Long-term drift of input offset voltage See Note 4 0.2 1 0.4 2 μV/mo I Input offset current V 0V 0 25°C 7 35 12 75 nAIIO Input offset current V O = 0, V IC = 0 Full range 50 135 nA I Input bias current V 0V 0 25°C ±10 ±40 ±15 ±80 nAIIB Input bias current V O = 0, V IC = 0 Full range ±60 ±150 nA V Common-mode input 25°C to −1 1 to −1 1 VVICR Common mode input voltage range Full range 10.3 to −10.3 10.5 to −10.5 V VOM Peak output voltage swing RL ≥ 0.6 kΩ ±10 ±11.5 ±10 ±11.5 VVOM Peak output voltage swing RL ≥ 2 kΩ Full range ±11.5 10.5 V RL ≥ 2 kΩ, V O = ±10 V 1000 1800 700 1500 Large signal differential RL ≥ 1 kΩ, V O = ±10 V 800 1500 1500 AVD Large-signal differential voltage amplification RL ≥ 0.6 kΩ, V O = ±1 V, VCC± = ± 4 V 250 700 200 500 V/mV RL ≥ 2 kΩ, V O = ±10 V Full range 600 300 ri(CM) Common-mode input resistance 3 2 GΩ ro Output resistance VO = 0, I O = 0 25°C 70 70 Ω CMRR Common-mode rejection VIC = ±11 V 25°C 114 126 100 120 dBCMRR Common mode rejection ratio VIC = ±10 V Full range 110 94 dB k Supply voltage rejection VCC ± = ±4 V to ±18 V 25°C 100 120 94 118 dBkSVR Supply voltage rejection ratio VCC ± = ±4.5 V to ±18 V Full range 96 86 dB † Full range is − 55°C to 125°C. NOTES: 3. Input offset voltage measurements are performed by automatic test equipment approximately 0.5 seconds after applying po wer. 4. Long-term drift of input offset voltage refers to the average trend line of offset voltage versus time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in V IO during the first 30 days are typically 2.5 μV (see Figure 3).
OP27A, OP27C LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL-AMPLIFIER SLOS100E − FEBRUARY 1989 − REVISED FEBRUARY 2010 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 OP27 operating characteristics, VCC± = ±15 V, TA = 25/C0053C PARAMETER TEST CONDITIONS OP27A OP27C UNITPARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNIT SR Slew rate AVD ≥ 1, R L ≥ 2 kΩ 1.7 2.8 1.7 2.8 V/μs VN(PP) Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 10 Hz, R S = 20 Ω, See Figure 26 0.225 0.375 0.225 0.375 μV V Equivalent input noise voltage f = 10 Hz, R S = 20 Ω 3.5 8 3.8 8 nV/√HVn Equivalent input noise voltage f = 1 kHz, R S = 20 Ω 3 4 3.2 4 nV/√Hz I Equivalent input noise current f = 10 Hz, See Figure 27 5 25 5 25 pA/√HIn Equivalent input noise current f = 1 kHz, See Figure 27 0.7 2.5 0.7 2.5 pA/√Hz Gain-bandwidth product f = 100 kHz 5 8 5 8 MHz
OP27A, OP27C LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL-AMPLIFIER SLOS100E − FEBRUARY 1989 − REVISED FEBRUARY 2010
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VIO Input offset voltage vs Temperature 1 ΔVIO Change in input offset voltage vs Time after power on vs Time (long-term drift) IIO Input offset current vs Temperature 4 IIB Input bias current vs Temperature 5 VICR Common-mode input voltage range vs Supply voltage 6 VOM Maximum peak output voltage vs Load resistance 7 VO(PP) Maximum peak-to-peak output voltage vs Frequency 8 AVD Differential voltage amplification vs Supply voltage vs Load resistance vs Frequency 11, 12 CMRR Common-mode rejection ratio vs Frequency 13 kSVR Supply voltage rejection ratio vs Frequency 14 SR Slew rate vs Temperature 15 φm Phase margin vs Temperature 16 φ Phase shift vs Frequency 11 Vn Equivalent input noise voltage vs Bandwidth vs Source resistance vs Supply voltage vs Temperature vs Frequency Gain-bandwidth product vs Temperature 16 IOS Short-circuit output current vs Time 22 ICC Supply current vs Supply voltage 23 Pulse response Small signal Large signal
OP27A, OP27C LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL-AMPLIFIER SLOS100E − FEBRUARY 1989 − REVISED FEBRUARY 2010
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− Input Offset Current − nA TA − Free-Air Temperature − °C − 75 − 50 − 25 0 50 75 100 12525 VCC ± = ±15 V OP27C OP27A INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE TA − Free-Air Temperature − °C ± 50 ± 40 ± 30 ± 20 ± 10 − 50 − 25 0 50 75 100 12525 IIO − Input Bias Current − nAIIB − 75 OP27C OP27A VCC ± = ±15 V Figure 4 Figure 5 COMMON-MODE INPUT VOLTAGE RANGE LIMITS vs SUPPLY VOLTAGE 0 ±5 ±10 ±15 ±20 VCC + − Supply Voltage − V VICR − Common-Mode Input Voltage Range Limits − V TA = −55°C TA = 125°C TA = − 55°C TA = 125°C TA = 25°C TA = 25°C − Maximum Peak Output Voltage − VVOM MAXIMUM PEAK OUTPUT VOLTAGE vs LOAD RESISTANCE 0.1 1 10 R L − Load Resistance − kΩ − 4 − 8 − 12 − 16 VCC ± = ± 15 V TA = 25°C Positive Swing Negative Swing ÁÁ ÁÁ ÁÁ VICR Figure 6 Figure 7
OP27A, OP27C LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL-AMPLIFIER SLOS100E − FEBRUARY 1989 − REVISED FEBRUARY 2010
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY − 5 10 100 f − Frequency − Hz − 10 − Differential Voltage Amplification − dBAVD 80° 100° 120° 140° 160° 180° 200° 220° Phase Shift AVD φm = 70° VCC ± = ±15 V RL = 1 kΩ TA = 25°C Figure 11. OP27A LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREQUENCY f − Frequency − Hz VCC ± = ±15 V RL = 2 kΩ TA = 25°C CMRR − Common-Mode Rejection Ratio − dB 1 k OP27A COMMON-MODE REJECTION RATIO vs FREQUENCY 140 10 k 100 k 1 M 10 M f − Frenquency − Hz VCC ± = ±15 V VIC = ± 10 V TA = 25°C 120 100 140 120 100 −20 0.1 1 10 100 1 k 10 k 1 M 100 M − Differential Voltage Amplification − dBAVD OP27A OP27A Figure 12 Figure 13
OP27A, OP27C LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL-AMPLIFIER SLOS100E − FEBRUARY 1989 − REVISED FEBRUARY 2010
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
V EQUIVALENT INPUT NOISE VOLTAGE vs BANDWIDTH VCC ± = ±15 V RS = 20 Ω TA = 25°C nV/ Hz n − Equivalent Input Noise Voltage − Total Equivalent Input Noise Voltage − μV 0.1 0.01 0.1 11 0 100 Bandwidth − kHz (0.1 Hz to frequency indicated) TOTAL EQUIVALENT INPUT NOISE VOLTAGE vs SOURCE RESISTANCE 10 k1 k100 100 RS − Source Resistance − Ω RS = R1 + R2 f = 1 kHz Resistor Noise Only f = 10 Hz VCC ± = ±15 V BW = 1 Hz TA = 25°C Figure 17 Figure 18 nV/ Hz OP27A EQUIVALENT INPUT NOISE VOLTAGE vs TOTAL SUPPLY VOLTAGE VCC +− VCC − − Total Supply Voltage − V RS = 20 Ω BW = 1 Hz TA = 25°C f = 10 Hz 01 0 2 0 3 0 4 0 f = 1 kHz − 50 − 25 0 25 50 75 100 12 5 TA − Free-Air Temperature − °C OP27A EQUIVALENT INPUT NOISE VOLTAGE vs FREE-AIR TEMPERATURE VCC ± = ±15 V RS = 20 Ω BW = 1 Hz Vn − Equivalent Input Noise Voltage − nV/ HzVn − Equivalent Input Noise Voltage − f = 10 Hz f = 1 kHz Figure 19 Figure 20
OP27A, OP27C LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL-AMPLIFIER SLOS100E − FEBRUARY 1989 − REVISED FEBRUARY 2010
14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
V OP27 VOLTAGE FOLLOWER SMALL-SIGNAL PULSE RESPONSE − 20 − 40 − 60 − 80 O − Output Voltage − mV t − Time − μs 0 0.5 1 1.5 2 2.5 3 VCC ± = ±15 V AV = 1 CL = 15 pF TA = 25°C VO − Output Voltage − V OP27 VOLTAGE FOLLOWER LARGE-SIGNAL PULSE RESPONSE − 2 − 4 − 6 − 8 t − Time − μs 02468 1 0 1 2 VCC ± = ± 15 V AV = − 1 TA = 25°C Figure 24 Figure 25
APPLICATION INFORMATION
The OP27 series devices can be inserted directly onto OP07, OP05, μA725, and SE5534 sockets with or without removing external compensation or nulling components. In addition, the OP27 can be fitted to μA741 sockets by removing or modifying external nulling components. noise testing Figure 26 shows a test circuit for 0.1-Hz to 10-Hz peak-to-peak noise measurement of the OP27. The frequency response of this noise tester indicates that the 0.1-Hz corner is defined by only one zero. Because the time limit acts as an additional zero to eliminate noise contributions from the frequency band below 0.1 Hz, the test time to measure 0.1-Hz to 10-Hz noise should not exceed 10 seconds. Measuring the typical 80-nV peak-to-peak noise performance of the OP27 requires the following special test precautions:
OP27A, OP27C LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL-AMPLIFIER SLOS100E − FEBRUARY 1989 − REVISED FEBRUARY 2010 15POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 noise testing (continued) 1. The device should be warmed up for at least five minutes. As the operational amplifier warms up, the offset voltage typically changes 4 μV due to the chip temperature increasing from 10°C to 20°C starting from the moment the power supplies are turned on. In the 10-s measurement interval, these temperature-induced effects can easily exceed tens of nanovolts. 2. For similar reasons, the device should be well shielded from air currents to eliminate the possibility of thermoelectric effects in excess of a few nanovolts, which would invalidate the measurements. 3. Sudden motion in the vicinity of the device should be avoided, as it produces a feedthrough effect that increases observed noise. 4.3 kΩ 110 kΩ2.2 μF Oscilloscope Rin = 1 MΩ 22 μF 100 kΩ 0.1 μF LT1001 4.7 μF 2 kΩ 100 kΩ 10 Ω 0.1 μF Voltage Gain = 50,000 OP27 Device Under Test 24.3 kΩ 0.01 0.1 1 10 100 AVD − Differential Voltage Amplification − dB 100 f − Frequency − Hz NOTE: All capacitor values are for nonpolarized capacitors only. Figure 26. 0.1-Hz to 10-Hz Peak-to-Peak Noise Test Circuit and Frequency Response
OP27A, OP27C LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL-AMPLIFIER SLOS100E − FEBRUARY 1989 − REVISED FEBRUARY 2010
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noise testing (continued) When measuring noise on a large number of units, a noise-voltage density test is recommended. A 10-Hz noise-voltage density measurement correlates well with a 0.1-Hz to 10-Hz peak-to-peak noise reading since both results are determined by the white noise and the location of the 1/f corner frequency. Figure 27 shows a circuit measuring current noise and the formula for calculating current noise. 10kΩ Vno 100 Ω 500 kΩ 500 kΩ
1 MΩ × 100
In = Figure 27. Current Noise Test Circuit and Formula αVIO of VIO/300 μV/°C. For example, if VIO is adjusted to 300 μV, the change in αVIO is 1 μV/°C. Figure 28. Standard Input Offset Figure 29. Input Offset Voltage Adjustment With close together and at the same temperature.
OP27A, OP27C LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL-AMPLIFIER SLOS100E − FEBRUARY 1989 − REVISED FEBRUARY 2010 17POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 offset voltage and drift (continued) The circuit shown in Figure 30 measures offset voltage. This circuit can also be used as the burn-in configuration for the OP27 with the supply voltage increased to 20 V, R1 = R3 = 10 k Ω, R2 = 200 Ω, and AVD = 100. 15 V −15 V 50 kΩ 100 Ω 50 kΩ VO = 1000 VIO NOTE A: Resistors must have low thermoelectric potential. Figure 30. Test Circuit for Offset Voltage and Offset Voltage Temperature Coefficient is shown in the pulsed-operation diagram in Figure 31.
2.8 V/μs
Figure 31. Pulsed Operation reducing the phase margin. A small capacitor (20 pF to 50 pF) in parallel with Rf eliminates this problem.
OP27A, OP27C LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL-AMPLIFIER SLOS100E − FEBRUARY 1989 − REVISED FEBRUARY 2010
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unity gain buffer applications (continued) To Gate Drive Typical Multiplexing FET Switches #24 Cold-Junction Circuitry + − Output 0.05 μF 100 kΩ High-Quality Single-Point Ground 10 Ω AVD = 10,000 Type S Thermocouples 5.4 μV/°C at 0°C 0246 Noise Voltage − nV 100 t − Time − seconds 120 81 0 OP27 NOTE A: If 24 channels are multiplexed per second and the output is required to settle to 0.1 % accuracy, the amplifier’s bandwidth cannot be limited to less than 30 Hz. The peak-to-peak noise contribution of the OP27 will still be only 0.11 μV, which is equivalent to an error of only 0.02°C. Figure 32. Low-Noise, Multiplexed Thermocouple Amplifier and
www.ti.com 31-May-2014 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples JM38510/13506BPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510 /13506BPA M38510/13506BPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510 /13506BPA OP27AFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 OP27AFKB OP27AJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 OP27AJGB OP27CJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 OP27CJGB (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width.
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MCER001A – JANUARY 1995 – REVISED JANUARY 1997 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.310 (7,87) 0.290 (7,37) 0.014 (0,36) 0.008 (0,20) Seating Plane 4040107/C 08/96 0.065 (1,65) 0.045 (1,14) 0.020 (0,51) MIN 0.400 (10,16) 0.355 (9,00) 0.015 (0,38) 0.023 (0,58) 0.063 (1,60) 0.015 (0,38) 0.200 (5,08) MAX 0.130 (3,30) MIN 0.245 (6,22) 0.280 (7,11) 0.100 (2,54) 0°–15° NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification. E. Falls within MIL STD 1835 GDIP1-T8
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