OP249 AD | Alldatasheet
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REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a OP249 Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1998 Dual, Precision JFET High Speed Operational Amplifier PIN CONNECTIONSFEATURES Fast Slew Rate:␣ 22 V/ms typ Settling Time (0.01%):␣ 1.2 ms max Offset Voltage:␣ 300 mV max High Open-Loop Gain:␣ 1000 V/mV min Low Total Harmonic Distortion:␣ 0.002% typ Improved Replacement for AD712, LT1057, OP215, TL072 and MC34082 Available in Die Form
APPLICATIONS
Output Amplifier for Fast D/As Signal Processing Instrumentation Amplifiers Fast Sample/Holds Active Filters Low Distortion Audio Amplifiers Input Buffer for A/D Converters Servo Controllers GENERAL DESCRIPTION The OP249 is a high speed, precision dual JFET op amp, simi- lar to the popular single op amp, the OP42. The OP249 outper- forms available dual amplifiers by providing superior speed with excellent dc performance. Ultrahigh open-loop gain (1 kV/mV minimum), low offset voltage and superb gain linearity, makes the OP249 the industry’s first true precision, dual high speed amplifier. With a slew rate of 22 V/ ms typical, and a fast settling time of less than 1.2 ms maximum to 0.01%, the OP249 is an ideal choice for high speed bipolar D/A and A/D converter applica- tions. The excellent dc performance of the OP249 allows the full accuracy of high resolution CMOS D/As to be realized. Symmetrical slew rate, even when driving large load, such as
600 W or 200 pF of capacitance, and ultralow distortion, make
the OP249 ideal for professional audio applications, active fil- ters, high speed integrators, servo systems and buffer amplifiers. The OP249 provides significant performance upgrades to the TL072, AD712, OP215, MC34082 and the LT1057. 8-Lead Cerdip (Z Suffix), 8-Lead Plastic Mini-DIP (P Suffix) A B ++–+IN A V– +IN B –IN B –IN A OUT A V+ OUT B TO-99 (J Suffix) OUTA 1 –IN A 2 +IN A 3 5 +IN B 6 –IN B
7 OUT B
B+ –A +– 8-Lead SO (S Suffix) A B +IN A +IN B –IN B –IN A OUT A OUT B 100 500ns10mV 870ns Figure 1. Fast Settling (0.01%) Figure 2. Low Distortion A V = +1, Figure 3. Excellent Output Drive,
–2– REV. C OP249–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
␣ OP249A OP249E OP249F Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Units Long Term Offset Voltage V OS (Note 1) 0.8 0.6 1.0 mV Offset Stability 1.5 1.5 1.5 mV/Month Input Bias Current I B VCM = 0 V, TJ = +25°C 3 07 5 2 05 0 3 07 5p A Input Offset Current I OS VCM = 0 V, TJ = +25°C 6 25 4 15 6 25 pA Input Voltage Range IVR (Note 2) +12.5 +12.5 +12.5 V – 11 – 11 – 11 V Common-Mode Rejection CMR V CM = – 1 1 V 8 09 0 8 69 5 8 0 9 0 d B Power-Supply Rejection Ratio PSRR V S = – 4.5 V to – 18 V 12 31.6 9 31.6 12 50 mV/V Large-Signal Voltage Gain A VO VO = – 10 V, RL = 2 kW 1000 1400 1000 1400 500 1200 V/mV Output Voltage Swing V O RL = 2 kW +12.5 +12.5 +12.5 V Short-Circuit Current Limit I SC Output Shorted to +36 +36 +36 mA ␣ ␣ Ground – 20 – 50 – 20 – 50 – 20 – 50 mA –33 –33 –33 mA Slew Rate SR R L = 2 kW , CL = 50 pF 18 22 18 22 18 22 V/ ms Phase Margin q0 0 dB Gain 55 55 55 Degrees Differential Input Impedance Z IN 1012i61 0 12i61 0 12i6 W ipF Open-Loop Output Resistance R O 35 35 35 W Voltage Noise e n p-p 0.1 Hz to 10 Hz 2 2 2 mV p-p Voltage Noise Density e n fO = 10 Hz 75 75 75 nV/ ÖHz fO = 100 Hz 26 26 26 nV/ ÖHz fO = 1 kHz 17 17 17 nV/ ÖHz fO = 10 kHz 16 16 16 nV/ ÖHz Current Noise Density i n fO = 1 kHz 0.003 0.003 0.003 pA/ ÖHz Voltage Supply Range V S – 4.5 – 15 – 18 – 4.5 – 15 – 18 – 4.5 – 15 – 18 V NOTES 1Long-term offset voltage is guaranteed by a 1000 HR life test performed on three independent wafer lots at +125 °C with LTPD of three. 2Guaranteed by CMR test. 3Settling time is sample tested. 4Guaranteed by design. Specifications subject to change without notice. Parameter Symbol Conditions Min Typ Max Units Offset Voltage V OS 0.4 0.2 mV Input Bias Current I B VCM = 0 V, TJ = +25°C4 0 7 5 p A Input Offset Current I OS VCM = 0 V, TJ = +25°C1 0 2 5 p A Input Voltage Range IVR (Note 1) +12.5 V – 11 V –12.0 V Common-Mode Rejection CMR V CM = – 11 V 76 90 dB Power Supply Rejection Ratio PSRR V S = – 4.5 V to – 18 V 12 50 mV/V Large Signal Voltage Gain A VO VO = – 10 V; RL = 2 kW 500 1100 V/mV Output Voltage Swing V O RL = 2 kW +12.5 V – 12.0 V –12.5 V Short-Circuit Current Limit I SC Output Shorted to Ground +36 mA – 20 – 50 mA –33 mA Supply Current I SY No Load; VO = 0 V 5.6 7.0 mA Slew Rate SR R L = 2 kW , CL = 50 pF 18 22 V/ ms Gain Bandwidth Product GBW (Note 2) 4.7 MHz Settling Time t S 10 V Step 0.01% 0.9 1.2 ms Phase Margin q0 0 dB Gain 55 Degree Differential Input Impedance Z IN 1012i6 W ipF (@ VS = 615 V, TA = +258C, unless otherwise noted) (@ VS = 615 V, TA = +258C, unless otherwise noted)
–3–REV. C OP249 OP249G Parameter Symbol Conditions Min Typ Max Units Open Loop Output Resistance R O 35 W Voltage Noise e n p-p 0.1 Hz to 10 Hz 2 mV p-p Voltage Noise Density e n fO = 10 Hz 75 nV/ ÖHz fO = 100 Hz 26 nV/ ÖHz fO = 1 kHz 17 nV/ ÖHz fO = 10 kHz 16 nV/ ÖHz Current Noise Density i n fO = 1 kHz 0.003 pA/ ÖHz Voltage Supply Range V S – 4.5 – 15 – 18 V NOTES 1Guaranteed by CMR test. 2Guaranteed by design. Specifications subject to change without notice. ␣ OP249A OP249E OP249F Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Units Offset Voltage Temperature Coefficient TCV OS 15 13 2 . 2 6 mV/°C Input Bias Current I B (Note 1) 4 20 0.25 3.0 0.3 4.0 nA Input Voltage Range IVR (Note 2) +12.5 +12.5 +12.5 V – 11 – 11 – 11 V Common-Mode Rejection CMR V CM = – 11 V 76 110 86 100 80 90 dB Power-Supply Rejection Ratio PSRR V S = – 4.5 V to – 18 V 5 50 5 50 7 100 mV/V Large-Signal Voltage Gain A VO RL = 2 kW ; VO = – 10 V 500 1400 750 1400 250 1200 V/mV Output Voltage Swing V O RL = 2 kW +12.5 +12.5 +12.5 V Short-Circuit Current Limit I SC Output Shorted to ␣ ␣ Ground – 10 – 60 – 18 – 60 – 18 – 60 mA NOTES 1TJ = +85°C for E/F Grades; T J = +125°C for A Grade. 2Guaranteed by CMR test. Specifications subject to change without notice. (@ VS = 615 V, –40 8C £ TA £ +858C for E/F grades, and –55 8C £ TA £ +1258C for A grade unless otherwise noted) Parameter Symbol Conditions Min Typ Max Units Offset Voltage V OS 1.0 3.6 mV Offset Voltage Temperature Coefficient TCV OS 62 5 mV/°C Input Bias Current I B (Note 1) 0.5 4.5 nA Input Offset Current I OS (Note 1) 0.04 1.5 nA Input Voltage Range IVR (Note 2) +12.5 V – 11 V –12.5 V Common-Mode Rejection CMR V CM = – 11 V 76 95 dB Power-Supply Rejection Ratio PSRR V S = – 4.5 V to – 18 V 10 100 mV/V Large-Signal Voltage Gain A VO RL = 2 kW ; VO = – 10 V 250 1200 V/mV Output Voltage Swing V O RL = 2 kW +12.5 V – 12.0 V –12.5 V Short-Circuit Current Limit I SC Output Shorted to ␣ ␣ Ground – 18 – 60 mA Supply Current I SY No Load, VO = 0 V 5.6 7.0 mA NOTES 1TJ = +85°C . 2Guaranteed by CMR test. Specifications subject to change without notice. (@ VS = 615 V, –40 8C £ TA £ +858C for unless otherwise noted)
–4– REV. C ABSOLUTE MAXIMUM RATINGS 1 Operating Temperature Range Junction Temperature ORDERING GUIDE1 Model Temperature Range Package Descriptions 2 Package Options OP249AZ2 –55°C to +125°C 8-Lead Cerdip Q-8 OP249ARC/883 –55 °C to +125°C 20-Terminal LCC E-20A OP249EJ –40 °C to +85°C TO-99 H-08A H-08A OP249FZ –40 °C to +85°C 8-Lead Cerdip Q-8 OP249GP –40 °C to +85°C 8-Lead Plastic DIP N-8 OP249GS3 –40°C to +85°C 8-Lead SO SO-8 OP249GS-REEL –40 °C to +85°C 8-Lead SO SO-8 OP249GS-REEL7 –40 °C to +85°C 8-Lead SO SO-8 NOTES 1Burn-in is available on commercial and industrial temperature range parts in cerdip, plastic DIP, and TO-can packages. 2For devices processed in total compliance to MIL-STD-883, add/883 after part number. Consult factory for 883 data sheet. 3For availability and burn-in information on SO and PLCC packages, contact your local sales office. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP249 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE Package Type uJA 3 uJC Units TO-99 (J) 145 16 °C/W 8-Lead Hermetic DIP (Z) 134 12 °C/W 8-Lead Plastic DIP (P) 96 37 °C/W 20-Terminal LCC (RC) 88 33 °C/W 8-Lead SO (S) 150 41 °C/W NOTES 1Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2For supply voltages less than – 18 V, the absolute maximum input voltage is equal to the supply voltage. 3qJA is specified for worst case mounting conditions, i.e., qJA is specified for device in socket for TO, cerdip, P-DIP, and LCC packages; qJA is specified for device soldered to printed circuit board for SO package.
–5–REV. C DICE CHARACTERISTICS WAFER TEST LIMITS OP249GBC Parameter Symbol Conditions Limits Units Offset Voltage V OS 0.5 mV max Offset Voltage Temperature Coefficient TCV OS –40°C £ TJ £ 85°C 6.0 mV/°C max Input Bias Current I B VCM = 0 V 225 pA max Input Offset Current I OS VCM = 0 V 75 pA max Input Voltage Range IVR (Note 1) – 11 V min Common-Mode Rejection CMR V CM = – 11 V 76 dB min Power Supply Rejection Ratio PSRR V S = – 4.5 V to – 18 V 100 mV/V max Large-Signal Voltage Gain A VO RL = 2 kW 250 V/mV min Output Voltage Swing V O RL = 2 kW– 12.0 V min Short-Circuit Current Limit I SC Output Shorted to Ground – 20/– 60 mA min/max Supply Current I SY No Load; VO = 0 V 7.0 mA max Slew Rate SR R L = 2 kW , CL = 50 pF 16.5 V/ ms min NOTES 1Guaranteed by CMR test. Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot asse mbly and testing. (@ VS = 615 V, TJ = +258C unless otherwise noted) OUT (A) –IN (A) +IN (A) +IN (B) –IN (B) OUT (B) DIE SIZE 0.072 3 0.112 inch, 8,064 sq. mils (1.83 3 2.84 mm, 5.2 sq. mm)
quency are also simulated by the model. Figure 53. OP249 Macro-Model
–16– REV. C OP249 MACRO-MODEL
- subckt OP249 1 2 30 99 50 INPUT STAGE & POLE AT 100MHz r1 2 3 5E11 r2 1 3 5E11 r3 5 50 652.3 r4 6 50 652.3 cin 1 2 5E-12 c2 5 6 1.22E-12 i1 99 4 1E-3 ios 1 2 3.1E-12 eos 7 1 poly(1) 20 24 150E-6 1 j1 5 2 4 jx j2 6 7 4 jx * SECOND STAGE & POLE AT 12.2Hz r5 9 99 326.1E6 r6 9 50 326.1E6 c3 9 99 40E-12 c4 9 50 40E-12 g1 99 9 poly(1) 5 6 4.25E-3 1.533E-3 g2 9 50 poly(1) 6 5 4.25E-3 1.533E-3 v2 99 8 2.9 v3 10 50 2.9 d1 9 8 dx d2 10 9 dx * POLE-ZERO PAIR AT 2MHz/4.0MHz r7 11 99 1E6 r8 11 50 1E6 r9 11 12 1E6 r10 11 13 1E6 c5 12 99 37.79E-15 c6 13 50 37.79E-15 g3 99 11 9 24 1E-6 g4 11 50 24 9 1E-6 * ZERO-POLE PAIR AT 4MHz/8MHz r11 99 15 IE6 r12 14 15 1E6 r13 14 16 1E6 r14 50 16 1E6 I1 99 15 19.89E-3 I2 50 16 19.89E-3 g5 99 14 11 24 1E-6 g6 14 50 24 11 1E-6 * POLE AT 20MHz r15 17 99 1E6 r16 17 50 1E6 c9 17 99 7.96E-15 c10 17 50 7.96E-15 g7 99 17 14 24 1E-6 g8 17 50 24 14 1E-6 * POLE AT 50MHz r17 18 99 1E6 r18 18 50 1E6 c11 18 99 3.18E-15 c12 18 50 3.18E-15 g9 99 18 17 24 1E-6 g10 18 50 24 17 1E-6 Table I. SPICE Net List * POLE AT 50MHz r19 19 99 1E6 r20 19 50 1E6 c13 19 99 3.18E-15 c14 19 50 3.18E-15 g11 99 19 18 24 1E-6 g12 19 50 24 18 1E-6 * COMMON-MODE GAIN NETWORK WITH ZERO AT 60kHZ r21 20 21 1E6 r22 20 22 1E6 I3 21 99 2.65 I4 22 50 2.65 g13 99 20 3 24 1.78E-11 g14 20 50 24 3 1.78E-11 * POLE AT 50MHZ r23 23 99 1E6 r24 23 50 1E6 c15 23 99 3.18E-15 c16 23 50 3.18E-15 g15 99 23 19 24 1E-6 g16 23 50 24 19 1E-6 * OUTPUT STAGE r25 24 99 135E3 r26 24 50 135E3 r27 29 99 70 r28 29 50 70 I5 29 30 4E-7 g17 27 50 23 29 14.3E-3 g18 28 50 29 23 14.3E-3 g19 29 99 99 23 14.3E-3 g20 50 29 23 50 14.3E-3 v4 25 29 .4 v5 29 26 .4 d3 23 25 dx d4 26 23 dx d5 99 27 dx d6 99 28 dx d7 50 27 dy d8 50 28 dy MODELS USED
- model jx PJF(BETA=1.175E-3 VTO=–2.000 IS=21E-12)
- model dx D(IS=1E-15)
- model dy D(IS=1E-15 BV=50)
- ends OP249 PSpice is a registered trademark of MicroSim Corporation. HSPICE is a tradename of Meta-Software, Inc.
–17–REV. C 8-Lead Cerdip (Q-8) 1 4 0.310 (7.87) 0.220 (5.59) PIN 1 0.005 (0.13) MIN 0.055 (1.4) MAX SEATING PLANE0.023 (0.58) 0.014 (0.36) 0.200 (5.08) MAX 0.150 (3.81) MIN 0.070 (1.78) 0.030 (0.76) 0.200 (5.08) 0.125 (3.18) 0.100 (2.54) BSC 0.060 (1.52) 0.015 (0.38) 0.405 (10.29) MAX 158 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 20-Terminal Leadless Chip Carrier (E-20A) TOP VIEW 0.358 (9.09) 0.342 (8.69) SQ 20 4 BOTTOM VIEW 0.028 (0.71) 0.022 (0.56) 45° TYP 0.015 (0.38) MIN 0.055 (1.40) 0.045 (1.14) 0.050 (1.27) BSC0.075 (1.91) REF 0.011 (0.28) 0.007 (0.18) R TYP 0.095 (2.41) 0.075 (1.90) 0.100 (2.54) BSC 0.200 (5.08) BSC 0.150 (3.81) BSC 0.075 (1.91) REF 0.358 (9.09) MAX SQ 0.100 (2.54) 0.064 (1.63) 0.088 (2.24) 0.054 (1.37) 8-Lead Metal Can (TO-99) (H-08A) 0.250 (6.35) MIN 0.750 (19.05) 0.165 (4.19) REFERENCE PLANE 0.050 (1.27) MAX 0.019 (0.48) 0.016 (0.41) 0.021 (0.53) 0.016 (0.41) 0.045 (1.14) 0.010 (0.25) 0.040 (1.02) MAX BASE & SEATING PLANE 0.335 (8.51) 0.305 (7.75) 0.370 (9.40) 0.335 (8.51) 0.034 (0.86) 0.027 (0.69) 0.045 (1.14) 0.027 (0.69) 0.160 (4.06) 0.110 (2.79) 0.100 (2.54) BSC 2 8 0.200 (5.08) BSC 0.100 (2.54) BSC
458 BSC
(N-8) 0.430 (10.92) 0.348 (8.84) 0.280 (7.11) 0.240 (6.10) PIN 1 SEATING PLANE0.022 (0.558) 0.014 (0.356) 0.060 (1.52) 0.015 (0.38) 0.210 (5.33) MAX 0.130 (3.30) MIN 0.070 (1.77) 0.045 (1.15) 0.100 (2.54) BSC 0.160 (4.06) 0.115 (2.93) 0.325 (8.25) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 8-Lead Narrow Body (SOIC) (SO-8) 0.1968 (5.00) 0.1890 (4.80) 8 5 0.2440 (6.20) 0.2284 (5.80) PIN 1 0.1574 (4.00) 0.1497 (3.80) 0.0688 (1.75) 0.0532 (1.35) SEATING PLANE 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) BSC 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 0.0196 (0.50) 0.0099 (0.25)x 45° C1976a–0–6/98PRINTED IN U.S.A.