OP221GZ

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REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a OP221 Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 Dual Low Power Operational Amplifier, Single or Dual Supply

FEATURES

Excellent TCV OS Match, 2 /H9262V//H11543C Max Low Input Offset Voltage, 150 /H9262V Max Low Supply Current, 550 /H9262A Max Single Supply Operation, 5 V to 30 V Low Input Offset Voltage Drift, 0.75 /H9262V//H11543C High Open-Loop Gain, 1500 V/mV Min High PSRR, 3 /H9262V/V Wide Common-Mode Voltage Range, V– to within 1.5 V of V+ Pin Compatible with 1458, LM158, LM2904 Available in Die Form GENERAL DESCRIPTION The OP221 is a monolithic dual operational amplifier that can be used either in single or dual supply operation. The wide supply voltage range, wide input voltage range, and low supply current drain of the OP221 make it well-suited for operation from batteries or unregulated power supplies. The excellent specifications of the individual amplifiers combined with the tight matching and temperature tracking between channels SIMPLIFIED SCHEMATIC Q1–IN +IN *ACCESSIBLE IN CHIP FORM ONL Y Q3 Q4 Q5 Q6 Q9 Q10 Q12 Q11 Q13 NULL* Q26 Q28 Q27 Q29 Q33 OUTPUT 8-Lead SOIC (S-Suffix) NC = NO CONNECT +IN A +IN B –IN A OUT A OUT B–IN B PIN CONNECTIONS provide high performance in instrumentation amplifier designs. The individual amplifiers feature very low input offset voltage, low offset voltage drift, low noise voltage, and low bias current. They are fully compensated and protected. Matching between channels is provided on all critical parameters including input offset voltage, tracking of offset voltage vs. tem- perature, non-inverting bias currents, and common-mode rejection.

REV. C–2– OP221–SPECIFICATIONS OP221G Parameter Symbol Conditions Min Typ Max Unit Input Offset Voltage V OS 250 500 mV Input Offset Current Ios V CM = 0 1.5 7 nA Input Bias Current I B VCM = 0 70 120 nA Input Voltage Range IVR V+ = 5 V, V– = 0 V 1 0/3.5 VVS = ±15 V –15/13.5 Common-Mode CMRR V+ = –5 V, V– = 0 V Rejection Ratio 0 V £ VCM £ 3.5 V 75 85 VS = ±15 V dB –15 V £ VCM £ 13.5 V 80 90 Power Supply PSRR V S = ±2.5 V to ± 15 V 32 100 mV/VRejection Ratio V– = 0 V, V+ = 5 V to 30 V 57 180 Large-Signal Avo V S = ±15 V, RL = 10 kW Voltage Gain V O = ±10 V 800 V/mV Output Voltage V O V+ = 5 V, V– = 0 V 0.8/4 V Swing R L = 10 kW VS = 15 V, RL = 10 kW± 13.5 Slew Rate SR R L = 10 kW2 0.2 0.3 V/ mS Bandwidth BW 600 kHz Supply Current I SY VS = ±2.5 V, No Load 550 650 mA(Both Amplifiers) V S = ±15 V, No Load 850 900 (Electrical Characteristics at Vs = /H115502.5 V to /H1155015 V, TA = 25/H11543C, unless otherwise noted.)

REV. C –3– OP221 SPECIFICATIONS(Electrical Characteristics at V S = /H115502.5 V to /H1155015 V, –40 /H11543C £ TA £ +85/H11543C, unless otherwise noted.) OP221G Parameter Symbol Conditions Min Typ Max Unit Average Input TCV OS 23 mV/∞C Offset Voltage Drift1 Input Offset Voltage V OS 400 700 mV Input Offset Current I OS VCM = 0 2 10 nA Input Bias Current I B VCM = 0 80 140 nA Input Voltage Range IVR V+ = 5 V, V– = 0 V 2 0/3.2 VVS = ±15 V –15/13.2 Common-Mode CMRR V+ = –5 V, V– = 0 V Rejection Ratio 0 V £ VCM £ 3.5 V 70 80 VS = ±15 V dB –15 V £ VCM £ 13.5 V 75 85 Power Supply PSRR V S = ±2.5 V to ± 15 V 57 180 mV/VRejection Ratio V– = 0 V, V+ = 5 V to 30 V 100 320 Large-Signal A VO VS = ±15 V, RL = 10 kW Voltage Gain V O = ±10 V 600 V/mV Output Voltage V O V+ = 5 V, V– = 0 V 0.9/3.7 Swing R L = 10 kW V VS = 15 V, RL = 10 kW 13.2 Supply Current I SY VS = ±2.5 V, No Load 600 750 mA (Both Amplifiers) V S = ±15 V, No Load 950 1000 NOTES 1Sample tested. 2Guaranteed by CMRR test limits. OP221G Parameter Symbol Conditions Min Typ Max Unit Input Offset Voltage Match DVOS 250 600 mV Average Noninverting Bias Current I B+ 120 nA Noninverting Input I OS+4 1 0 n A Offset Current Common-Mode Rejection Ratio DCMRR V CM = –15 V to 13.5 V 72 dB Match1 Power Supply Rejection Ratio DPSRR V S = ±2.5 V to ± 15 V 140 mV/V Match2 NOTES 1DCMRR is 20 log10 VCM/DCME, where V CM is the voltage applied to both noninverting inputs and DCME is the difference in common-mode input-referred error. 2DPSRR is: Input-Referred Differential Error DVS Matching Characteristics at V s = /H1155015 V, TA = 25/H11543C, unless otherwise noted.

REV. C–4– OP221–SPECIFICATIONS OP221G Parameter Symbol Conditions Min Typ Max Unit Input Offset Voltage Match DVOS 400 800 mV Average Noninverting I B+V CM = 0 140 nA Bias Current Input Offset IC DVOS 35 mV∞C Voltage Tracking Noninverting Input I OS+V CM = 0 6 12 nA Offset Current Common-Mode Rejection Ratio DCMRR V CM = –15 V to 13.2 V 72 80 dB Match1 Power Supply Rejection Ratio DPSRR 140 mV/V Match2 NOTES 1DCMRR is 20 log10 VCM/DCME, where V CM is the voltage applied to both noninverting inputs and DCME is the difference in common-mode input-referred error. 2DPSRR is: Input-Referred Differential Error DVS (Matching Characteristics at Vs = /H1155015 V, –40/H11543C £ TA £ +85/H11543C for OP221G, unless other- wise noted. G is sample tested.)

recommended to avoid performance degradation or loss of functionality. Figure 1. Dice Characteristics 2/H9258JA is specified for device soldered to printed circuit board for SOIC package.

500 OP221GS XIND RN-8

REV. C OP221–Typical Perfomance Characteristics –6– TEMPERA TURE – /H11543C OPEN-LOOP GAIN – dB 140 –50 120 100 –25 0 25 50 75 100 125 dc 10Hz 100Hz 1kHz VS = /H1155015V TPC 1. Open-Loop Gain at ±15 V vs. Temperature FREQUENCY – Hz OPEN-LOOP GAIN – dB 120 0.1 100 11 0 100 1k 10k 100k 1M 10M VS = /H115505V VS = /H1155015V TPC 4. Open-Loop Gain at ±15 V vs. Frequency TEMPERA TURE – /H11543C PHASE MARGIN – Degrees –50 0.35 0.30 0.25 0.20 –25 0 25 50 75 100 125 850k 800k 750k 700k 650k GAIN BANDWIDTH – Hz SLEW RA TE – V//H9262sec SLEW RA TE GAIN BANDWIDTH PHASE MARGIN VS = /H1155015V TPC 7 . Phase Margin, Gain Bandwidth, and Slew Rate vs. Temperature TEMPERA TURE – /H11543C OPEN-LOOP GAIN – dB 140 –50 120 100 –25 0 25 50 75 100 125 dc 10Hz 100Hz 1kHz VS = /H1155015V TPC 2. Open-Loop Gain at ± 5 V vs. Temperature FREQUENCY – Hz 11 0 100 CLOSED-LOOP GAIN – dB –10 1k 10k 100k 1M 10M TPC 5. Closed-Loop Gain vs. Frequency FREQUENCY – Hz PSRR – dB 120 +PSRR –PSRR 100 TA = 25/H11543C VS = /H1155015V 100 1k 10k 100k TPC 8. PSRR vs. Frequency SUPPL Y VOL T AGE – V OPEN-LOOP GAIN – dB 140 120 100 /H115505 /H1155010 /H1155015 RL = 15k/H9024 TA = 25/H11543C TPC 3. Open-Loop Gain at vs. Supply Voltage FREQUENCY – Hz VOLTAG E GAIN – dB –10 100k 1M 10M PHASE SHIFT – Degrees 220 200 180 140 160 120 100TA = 25/H11543C VS = /H1155015V GAIN PHASE /H11632m = 42/H11543 TPC 6. Gain and Phase Shift vs. FrequencyCMRR – Hz TA = 25/H11543C VS = /H1155015V FREQUENCY – Hz 120 100 10 100 1k 10k 100k TPC 9. CMRR vs. Frequency

REV. C OP221 –7– FREQUENCY – Hz PEAK-TO-PEAK AMPLITUTDE – V 1K 1M 10k 100k TA = 25/H11543C VS = /H1155015V RL = 10k/H9024 TPC 10. Maximum Output Swing vs. Frequency FREQUENCY – Hz VOLTAGE N OISE – nV/ Hz 11 k 10 100 100 TPC 13. Voltage Noise Density vs. Frequency LOAD RESIST ANCE – /H9024 MAXIMUM OUTPUT – V 100 100k 1k 10k TA = 25/H11543C VS = /H1155015V POSITIVE NEGA TIVE TPC 11. Maximum Output Voltage vs. Load Resistance FREQUENCY – Hz CURRENT NOISE – pA Hz 0.1 11 k 1.0 10 100 TPC 13. Current Noise Density vs. Frequency LOAD RESIST ANCE – /H9024 MAXIMUM OUTPUT – V 100 100k 1k 10k 2.0 1.0 TA = 25/H11543C VS = /H115502.5V NEGA TIVE POSITIVE TPC 12. Maximum Output Voltage vs. Load Resistance

REV. C OP221 –10– OUTLINE DIMENSIONS 8-Lead Standard Small Outline Package [SOIC] Narrow Body (RN-8) Dimensions shown in millimeters and (inches) 0.25 (0.0098) 0.19 (0.0075) 1.27 (0.0500) 0.41 (0.0160) 0.50 (0.0196) 0.25 (0.0099) /H11547 45/H11543 8/H11543 0/H11543 1.75 (0.0688) 1.35 (0.0532) SEATING PLANE 0.25 (0.0098) 0.10 (0.0040) 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) BSC 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.33 (0.0130) COPLANARITY 0.10 CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MS-012AA

REV. C OP221 –11–

Revision History

10/02—Data Sheet changed from REV. B to REV. C. 6/02—Data Sheet changed from REV. A to REV. B. 09/01—Data Sheet changed from REV. 0 to REV. A.

–12– PRINTED IN U.S.A. C00324–0–10/02(C)