OP181

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REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a OP181/OP281/OP481 Tel: 617/329-4700 World Wide Web Site: http://www.analog.com Fax: 617/326-8703 © Analog Devices, Inc., 1996 Ultralow Power, Rail-to-Rail Output Operational Amplifiers PIN CONFIGURATIONSFEATURES Low Supply Current: 4 mA/Amplifier max Single-Supply Operation: 2.7 V to 12 V Wide Input Voltage Range Rail-to-Rail Output Swing Low Offset Voltage: 1.5 mV No Phase Reversal

APPLICATIONS

Battery Powered Instrumentation Safety Monitoring Remote Sensors Low Voltage Strain Gage Amplifiers GENERAL DESCRIPTION The OP181, OP281 and OP481 are single, dual and quad ultralow power, single-supply amplifiers featuring rail-to-rail outputs. All operate from supplies as low as 2.0 V and are specified at +3 V and +5 V single supply as well as ± 5 V dual supplies. Fabricated on Analog Devices’ CBCMOS process, the OP181 family features a precision bipolar input and an output that swings to within millivolts of the supplies and continues to sink or source current all the way to the supplies. Applications for these amplifiers include safety monitoring, portable equipment, battery and power supply control, and signal conditioning and interface for transducers in very low power systems. The output’s ability to swing rail-to-rail and not increase supply current, when the output is driven to a supply voltage, enables the OP181 family to be used as comparators in very low power systems. This is enhanced by their fast saturation recovery time. Propagation delays are 250 µs. The OP181/OP281/OP481 are specified over the extended industrial (–40°C to +85°C) temperature range. The OP181, single, and OP281, dual, amplifiers are available in 8-pin plastic DIPs and SO surface mount packages. The OP281 is also available in 8-lead TSSOP. The OP481 quad is available in 14- pin DIPs, narrow 14-pin SO and TSSOP packages. NC = NO CONNECT NULL NULL NC OUT A –IN A +IN A OP181 NC = NO CONNECT NULL NULL NC OUT A –IN A +IN A 4 5 OP181 8-Lead SO 8-Lead Epoxy DIP (S Suffix) (P Suffix) OP281OUT A V+ +IN B –IN B OUT B–IN A +IN A OUT A V+ OUT B–IN A +IN A V– +IN B –IN B 4 5 OP281 8-Lead SO 8-Lead Epoxy DIP (S Suffix) (P Suffix) 14-Lead Epoxy DIP 14-Lead (P Suffix) Narrow-Body SO (S Suffix) 8-Lead TSSOP (RU Suffix) OP281 4 5 OUT A +IN D –IN D OUT D –IN A +IN A OUT C –IN C +IN C+IN B –IN B OUT B OP481 7 8 OP481 14-Lead TSSOP (RU Suffix) OP481 NOTE: PIN ORIENTATION IS EQUIVALENT FOR EACH PACKAGE VARIATION

–2– REV. 0 OP181/OP281/OP481–SPECIFICATIONS ELECTRICAL SPECIFICATIONS Parameter Symbol Conditions Min Typ Max Units INPUT CHARACTERISTICS Offset Voltage V OS Note 1 1.5 mV Input Bias Current I B –40°C ≤ TA ≤ +85°C3 1 0 n A Input Offset Current I OS –40°C ≤ TA ≤ +85°C 0.1 7 nA Input Voltage Range 0 2 V Common-Mode Rejection Ratio CMRR V CM = 0 V to 2.0 V, –40°C ≤ TA ≤ +85°C6 5 9 5 d B Large Signal Voltage Gain A VO RL = 1 MΩ , VO = 0.3 V to 2.7 V 5 13 V/mV –40°C ≤ TA ≤ +85°C 2 V/mV Offset Voltage Drift ΔVOS/ΔT1 0 µV/°C Bias Current Drift ΔIB/ΔT 20 pA/ °C Offset Current Drift ΔIOS/ΔT 2 pA/ °C OUTPUT CHARACTERISTICS Output Voltage High V OH RL = 100 kΩ to GND, Output Voltage Low V OL RL = 100 kΩ to V+, –40°C ≤ TA ≤ +85°C2 5 7 5 m V Short Circuit Limit I SC ± 1.1 mA POWER SUPPLY Power Supply Rejection Ratio PSRR V S = 2.7 V to 12 V –40°C ≤ TA ≤ +85°C7 6 9 5 d B Supply Current/Amplifier I SY VO = 0 V 3 4 µA –40°C ≤ TA ≤ +85°C5 µA DYNAMIC PERFORMANCE Slew Rate SR R L = 100 kΩ , CL = 50 pF 25 V/ms Turn On Time A V = 1, VO = 1 40 µs Turn On Time A V = 20, VO = 1 50 µs Saturation Recovery Time 65 µs Gain Bandwidth Product GBP 95 kHz Phase Margin φo 70 Degrees NOISE PERFORMANCE Voltage Noise e n p-p 0.1 Hz to 10 Hz 10 µV p-p Voltage Noise Density e n f = 1 kHz 75 nV/ √Hz Current Noise Density i n <1 pA/ √Hz NOTES 1VOS is tested under no load condition. Specifications subject to change without notice. (@ VS = +3.0 V, VCM = 1.5 V, TA = +258C unless otherwise noted)

–3–REV. 0 OP181/OP281/OP481 ELECTRICAL SPECIFICATIONS Parameter Symbol Conditions Min Typ Max Units INPUT CHARACTERISTICS Offset Voltage V OS Note 1 0.1 1.5 mV Input Bias Current I B –40°C ≤ TA ≤ +85°C3 1 0 n A Input Offset Current I OS –40°C ≤ TA ≤ +85°C 0.1 7 nA Input Voltage Range 0 4 V Common-Mode Rejection Ratio CMRR V CM = 0 V to 4.0 V, –40°C ≤ TA ≤ +85°C6 5 9 0 d B Large Signal Voltage Gain A VO RL = 1 MΩ , VO = 0.5 V to 4.5 V 5 15 V/mV –40°C ≤ TA ≤ +85°C 2 V/mV Offset Voltage Drift ΔVOS/ΔT –40 °C to +85°C1 0 µV/°C Bias Current Drift ΔIB/ΔT2 0 p A / °C Offset Current Drift ΔIOS/ΔT2 p A / °C OUTPUT CHARACTERISTICS Output Voltage High V OH RL = 100 kΩ to GND, Output Voltage Low V OL RL = 100 kΩ to V+, –40°C ≤ TA ≤ +85°C2 5 7 5 m V Short Circuit Limit I SC ± 3.5 mA POWER SUPPLY Power Supply Rejection Ratio PSRR V S = 2.7 V to 12 V, –40°C ≤ TA ≤ +85°C7 6 9 5 d B Supply Current/Amplifier I SY VO = 0 V 3.2 4 µA –40°C ≤ TA ≤ +85°C5 µA DYNAMIC PERFORMANCE Slew Rate SR R L = 100 kΩ , CL = 50 pF 27 V/ms Saturation Recovery Time 120 µs Gain Bandwidth Product GBP 100 kHz Phase Margin φo 74 Degrees NOISE PERFORMANCE Voltage Noise e n p-p 0.1 Hz to 10 Hz 10 µV p-p Voltage Noise Density e n f = 1 kHz 75 nV/ √Hz Current Noise Density i n <1 pA/ √Hz NOTES 1VOS is tested under a no load condition. Specifications subject to change without notice. (@ VS = +5.0 V, VCM = 2.5 V, TA = +258C unless otherwise noted1)

–4– REV. 0 OP181/OP281/OP481–SPECIFICATIONS ELECTRICAL SPECIFICATIONS Parameter Symbol Conditions Min Typ Max Units INPUT CHARACTERISTICS Offset Voltage V OS Note 1 0.1 1.5 mV –40°C ≤ T A ≤ +85°C 2.5 mV Input Bias Current I B –40°C ≤ TA ≤ +85°C3 1 0 n A Input Offset Current I OS –40°C ≤ TA ≤ +85°C 0.1 7 nA Input Voltage Range –5 +4 V Common-Mode Rejection CMRR V CM = –5.0 V to +4.0 V, –40°C ≤ TA ≤ +85°C6 5 9 5d B Large Signal Voltage Gain A VO RL = 1 MΩ , VO = ± 4.0 V, 5 13 V/mV –40°C ≤ TA ≤ +85°C 2 V/mV Offset Voltage Drift ΔVOS/ΔT –40 °C to +85°C1 0 µV/°C Bias Current Drift ΔIB/ΔT 20 pA/ °C Offset Current Drift ΔIOS/ΔT 2 pA/ °C OUTPUT CHARACTERISTICS Output Voltage Swing V O RL = 100 kΩ to GND, Short Circuit Limit I SC 12 mA POWER SUPPLY Power Supply Rejection Ratio PSRR V S = ± 1.35 V to ± 6V , –40°C ≤ TA ≤ +85°C7 6 9 5d B Supply Current/Amplifier I SY VO = 0 V 3.3 5 µA –40°C ≤ TA ≤ +85°C6 µA DYNAMIC PERFORMANCE Slew Rate ± SR R L = 100 kΩ , CL = 50 pF 28 V/ms Gain Bandwidth Product GBP 105 kHz Phase Margin φo 75 Degrees NOISE PERFORMANCE Voltage Noise e n p-p 0.1 Hz to 10 Hz 10 µV p-p Voltage Noise Density e n f = 1 kHz 85 nV/ √Hz Voltage Noise Density e n f = 10 kHz 75 nV/ √Hz Current Noise Density i n <1 pA/ √Hz NOTES 1VOS is tested under no load condition. Specifications subject to change without notice. (@ VS = ±5 V, TA = +258C unless otherwise noted)

–5–REV. 0 WARNING! ESD SENSITIVE DEVICE CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP181/OP281/OP481 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precau- tions are recommended to avoid performance degradation or loss of functionality. ABSOLUTE MAXIMUM RATINGS Storage Temperature Range Operating Temperature Range Junction Temperature Range Package Type uJA* uJC Units 8-Pin Plastic DIP (P) 103 43 °C/W 8-Pin SOIC (S) 158 43 °C/W 8-Pin TSSOP (RU) 240 43 °C/W 14-Pin Plastic DIP (P) 76 33 °C/W 14-Pin SOIC (S) 120 36 °C/W 14-Pin TSSOP (RU) 240 43 °C/W *θJA is specified for the worst case conditions, i.e., θJA is specified for device in socket for P-DIP packages; θJA is specified for device soldered in circuit board for TSSOP and SOIC packages. ORDERING GUIDE Temperature Package Package Model Range Description Option OP181GP –40 °C to +85°C 8-Pin Plastic DIP N-8 OP181GS –40 °C to +85°C 8-Pin SOIC SO-8 OP281GP –40 °C to +85°C 8-Pin Plastic DIP N-8 OP281GS –40 °C to +85°C 8-Pin SOIC SO-8 OP281GRU –40 °C to +85°C 8-Pin TSSOP RU-8 OP481GP –40 °C to +85°C 14-Pin Plastic DIP N-14 OP481GS –40 °C to +85°C 14-Pin SOIC SO-14 OP481GRU –40 °C to +85°C 14-Pin TSSOP RU-14

–14– REV. 0 ECM1 11 98 POLY(2) (1, 98) (2, 98) 0 .5 .5 R1 11 12 1.59E6 C1 11 12 100E-12 R2 12 98 283 * POLE AT 900kHz EREF 98 0 (90, 0) 1 G1 98 20 (4, 6) 1E-6 R3 20 98 1E6 C2 20 98 177E-15 * POLE AT 500kHz E2 21 98 (20, 98) 1 R4 21 22 1E6 C3 22 98 320E-15 * GAIN STAGE CF 45 40 8. 5E-12 R5 40 98 65. 65E6 G3 98 40 (22, 98) 4.08E-7 D3 40 41 DX D4 42 40 DX V3 99 41 DC 0.5 V4 42 50 DC 0.5 * OUTPUT STAGE ISY 99 50 1.375E-6 RS1 99 90 10E6 RS2 90 50 10E6 M1 45 46 99 99 POX L=1.5u W=300u M2 45 47 50 50 NOX L=1.5u W=300u EG1 99 46 POLY(1) (98, 40) 0.77 1 EG2 47 50 POLY(1) (40, 98) 0.77 1 * MODELS .MODEL POX PMOS (LEVEL=2, KP=25E-6, VTO=-0.75, LAMBDA=0.01) .MODEL NOX NMOS (LEVEL=2, KP=25E-6, VTO=0.75, LAMBDA=0.01) .MODEL PIX PNP (BF=200) .MODEL DX D(IS=1E-14) .ENDS

–15–REV. 0 14-Lead Plastic DIP (N-14) 0.795 (20.19) 0.725 (18.42) 0.280 (7.11) 0.240 (6.10) PIN 1 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) SEATING PLANE 0.022 (0.558) 0.014 (0.356) 0.060 (1.52) 0.015 (0.38) 0.210 (5.33) MAX 0.130 (3.30) MIN 0.070 (1.77) 0.045 (1.15) 0.100 (2.54) BSC 0.160 (4.06) 0.115 (2.93) 14-Lead Narrow Body SOIC (SO-14) 14 8 0.3444 (8.75) 0.3367 (8.55) 0.2440 (6.20) 0.2284 (5.80) 0.1574 (4.00) 0.1497 (3.80) PIN 1 SEATING PLANE 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0688 (1.75) 0.0532 (1.35) 0.0500 (1.27) BSC 0.0099 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 0.0196 (0.50) 0.0099 (0.25)x 45° 14-Lead TSSOP (RU-14) 14 8 0.201 (5.10) 0.193 (4.90) 0.256 (6.50) 0.246 (6.25) 0.177 (4.50) 0.169 (4.30) PIN 1 SEATING PLANE 0.006 (0.15) 0.002 (0.05) 0.0118 (0.30) 0.0075 (0.19) 0.0256 (0.65) BSC 0.0433 (1.10) MAX 0.0079 (0.20) 0.0035 (0.090) 0.028 (0.70) 0.020 (0.50) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Plastic DIP (N-8) 0.430 (10.92) 0.348 (8.84) 0.280 (7.11) 0.240 (6.10) PIN 1 SEATING PLANE0.022 (0.558) 0.014 (0.356) 0.060 (1.52) 0.015 (0.38) 0.210 (5.33) MAX 0.130 (3.30) MIN 0.070 (1.77) 0.045 (1.15) 0.100 (2.54) BSC 0.160 (4.06) 0.115 (2.93) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 8-Lead SOIC (SO-8) 0.1968 (5.00) 0.1890 (4.80) 8 5 0.2440 (6.20) 0.2284 (5.80) PIN 1 0.1574 (4.00) 0.1497 (3.80) 0.0688 (1.75) 0.0532 (1.35)SEATING PLANE 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) BSC 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 0.0196 (0.50) 0.0099 (0.25)x 45° 8-Lead TSSOP (RU-8) 8 5 0.122 (3.10) 0.114 (2.90) 0.256 (6.50) 0.246 (6.25) 0.177 (4.50) 0.169 (4.30) PIN 1 0.0256 (0.65) BSC SEATING PLANE 0.006 (0.15) 0.002 (0.05) 0.0118 (0.30) 0.0075 (0.19) 0.0433 (1.10) MAX 0.0079 (0.20) 0.0035 (0.090) 0.028 (0.70) 0.020 (0.50)

C2195–12–10/96PRINTED IN U.S.A. –16–