OP162DRM-REEL

OP162_05 AD | Alldatasheet

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Technical content

15 MHz Rail-to-Rail

Rev. F Information furn ished by An alog D evices is believed to be accurate and reliable. However, n o resp onsibility is assume d b y A nalog De vices fo r its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or p atent rights of Analog De vices. Trademarks an d registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2005 Analog Devices, Inc. All rights reserved.

FEATURES

Wide bandwidth: 15 MHz Low offset voltage: 325 µV max Low noise: 9.5 nV/√Hz @ 1 kHz Single-supply operation: 2.7 V to 12 V Rail-to-rail output swing Low TCVOS: 1 µV/°C typ High slew rate: 13 V/µs No phase inversion Unity-gain stable

APPLICATIONS

The OP162 (single), OP262 (dual), and OP462 (quad) rail-to- rail 15 MHz amplifiers feature the extra speed new designs require, with the benefits of precision and low power operation. With their incredibly low offset voltage of 45 µV (typical) and low noise, they are perfectly suited for precision filter applica- tions and instrumentation. The low supply current of 500 µA (typical) is critical for portable or densely packed designs. In addition, the rail-to-rail output swing provides greater dynamic range and control than standard video amplifiers. These products operate from single supplies as low as 2.7 V to dual supplies of ±6 V. The fast settling times and wide output swings recommend them for buffers to sampling A/D converters. The output drive of 30 mA (sink and source) is needed for many audio and display applications; more output current can be supplied for limited durations. The OPx62 family is specified over the extended industrial temperature range (–40°C to +125°C). The single OP162 amplifiers are available in 8-lead SOIC, MSOP, and TSSOP packages. The dual OP262 amplifiers are available in 8-lead SOIC and TSSOP packages. The quad OP462 amplifiers are available in 14-lead, narrow-body SOIC and TSSOP packages. PIN CONFIGURATIONS NULL 1 –IN A 2 +IN A 3 V– 4 NULL8 V+7 OUT A6 NC5 NC = NO CONNECT OP162 TOP VIEW (Not to Scale) 00288-001 Figure 1. 8-Lead Narrow-Body SOIC (S Suffix) Figure 2. 8-Lead TSSOP (RU Suffix) Figure 3. 8-Lead Narrow-Body SOIC (S Suffix) Figure 4. 8-Lead TSSOP (RU Suffix) Figure 5. 14-Lead Narrow-Body SOIC (S Suffix) Figure 6. 14-Lead TSSOP (RU Suffix)

Rev. F | Page 2 of 20 TABLE OF CONTENTS

REVISION HISTORY

1/05—Rev. E to Rev. F Changes to Absolute Maximum Ratings Table 4 and Table 5 .... 6 12/04—Rev. D to Rev. E 10/02—Rev. C to Rev. D

@ VS = 5.0 V , VCM = 0 V , TA = 25°C, unless otherwise noted. Table 1. Electrical Characteristics 1 Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125°C, with an LTPD of 1.3. 2 Offset voltage drift is the average of the −40°C to +25°C delta and the +25°C to +125°C delta.

@ VS = 3.0 V , VCM = 0 V , TA = 25°C, unless otherwise noted. Table 2. Electrical Characteristics 1 Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125°C, with an LTPD of 1.3.

@ VS = ±5.0 V , VCM = 0 V , TA = 25°C, unless otherwise noted. Table 3. Electrical Characteristics 1 Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at +125°C, with an LTPD of 1.3. 2 Offset voltage drift is the average of the −40°C to +25°C delta and the +25°C to +125°C delta.

Rev. F | Page 6 of 20 ABSOLUTE MAXIMUM RATINGS Table 4. Parameter Min Supply Voltage ±6 V Input Voltage1 ±6 V Differential Input Voltage2 ±0.6 V Internal Power Dissipation SOIC (S) Observe Derating Curves MSOP (RM) Observe Derating Curves TSSOP (RU) Observe Derating Curves Output Short-Circuit Duration Observe Derating Curves Storage Temperature Range –65°C to +150°C Operating Temperature Range –40°C to +125°C Junction Temperature Range –65°C to +150°C Lead Temperature Range (Soldering, 10 sec) 300°C

1 For supply voltages greater than 6 V, the input voltage is limited to less than

or equal to the supply voltage. 2 For differential input voltages greater than 0.6 V, the input current should be limited to less than 5 mA to prevent degradation or destruction of the input devices. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 5. Package Type θJA1 θJC Unit 8-Lead SOIC (S) 157 56 °C/W 8-Lead TSSOP (RU) 208 °C/W 8-Lead MSOP (RM) 190 44 °C/W 14-Lead SOIC (S) 105 °C/W 14-Lead TSSOP (RU) 148 °C/W 1 θJA is specified for the worst-case conditions, that is, θJA is specified for a device soldered in circuit board for SOIC, MSOP, and TSSOP packages. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

720 OP AMPS

Figure 7. OP462 Input Offset Voltage Distribution

360 OP AMPS

Figure 8. OP462 Input Offset Voltage Drift (TCVOS) Figure 9. OP462 Input Bias Current vs. Common-Mode Voltage Figure 10. OP462 Input Offset Voltage vs. Temperature Figure 11. OP462 Input Bias Current vs. Temperature Figure 12. OP462 Input Offset Current vs. Temperature

Figure 37. Maximum Power Dissipation vs. Temperature for the output, and the noninverting input tied to the ground plane. can be produced after power-up is important. The OPx62 family has a rapid settling time after power-up. used to find the power-on settling times for the device. Figure 38. Oscilloscope Photo of VS and VOUT

0 TO +5V

Figure 39. Test Circuit for Power-On Settling Time resistor and 300 pF capacitor placed in parallel. output response with the network added. Figure 40. Snubber Network Compensation for Capacitive Loads Figure 41. A Photo of a Ringing Square Wave

the volume control potentiometers. Figure 46. Headphone Output Amplifier

10 TURN

Figure 47. High Speed Instrumentation Amplifier to optimize common-mode rejection. time of 3.9 µs for the negative slope.

Rev. F | Page 18 of 20 SPICE MACRO-MODEL * OP162/OP262/OP462 SPICE Macro-model * 7/96, Ver. 1 * Troy Murphy / ADSC * Copyright 1996 by Analog Devices Refer to “README.DOC” file for License Statement. Use of this model * indicates your acceptance of the terms and provisions in the License * Statement Node Assignments * noninverting input * | inverting input * | | positive supply * | | | negative supply .SUBCKT OP162 1 2 99 50 45 *INPUT STAGE Q1 5 7 3 PIX 5 Q2 6 2 4 PIX 5 Ios 1 2 1.25E-9 I1 99 15 85E-6 EOS 7 1 POLY(1) (14, 20) 45E-6 1 RC1 5 50 3.035E+3 RC2 6 50 3.035E+3 RE1 3 15 607 RE2 4 15 607 C1 5 6 600E-15 D1 3 8 DX D2 4 9 DX V1 99 8 DC 1 V2 99 9 DC 1 * 1st GAIN STAGE EREF 98 0 (20, 0) 1 G1 98 10 (5, 6) 10.5 R1 10 98 1 C2 10 98 3.3E-9 * COMMON-MODE STAGE WITH ZERO AT 4kHz ECM 13 98 POLY (2) (1, 98) (2, 98) 0 0.5 0.5 R2 13 14 1E+6 R3 14 98 70 C3 13 14 80E-12 * POLE AT 1.5MHz, ZERO AT 3MHz G2 21 98 (10, 98) .588E-6 R4 21 98 1.7E6 R5 21 22 1.7E6 C4 22 98 31.21E-15 * POLE AT 6MHz, ZERO AT 3MHz E1 23 98 (21, 98) 2 R6 23 24 53E+3 R7 24 98 53E+3 C5 23 24 1E-12 * SECOND GAIN STAGE G3 25 98 (24, 98) 40E-6 R8 25 98 1.65E+6 D3 25 99 DX D4 50 25 DX * OUTPUT STAGE GSY 99 50 POLY (1) (99, 50) 277.5E-6 7.5E-6 R9 99 20 100E3 R10 20 50 100E3 Q3 45 41 99 POUT 4 Q4 45 43 50 NOUT 2 EB1 99 40 POLY (1) (98, 25) 0.70366 1 EB2 42 50 POLY (1) (25, 98) 0.73419 1 RB1 40 41 500 RB2 42 43 500 CF 45 25 11E-12 D5 46 99 DX D6 47 43 DX V3 46 41 0.7 V4 47 50 0.7 MODEL PIX PNP (Bf=117.7) .MODEL POUT PNP (BF=119, IS=2.782E-17, VAF=28, KF=3E-7) .MODEL NOUT NPN (BF=110, IS=1.786E-17, VAF=90, KF=3E-7) .MODEL DX D() .ENDS

Figure 51. 8-Lead Standard Small Outline Package [SOIC] Narrow Body

0.65 BSC

1.10 MAX

Figure 52. 8-Lead Mini Small Outline Package [MSOP]

6.40 BSC

Figure 53. 8-Lead Thin Shrink Small Outline Package [TSSOP) Figure 54. 14-Lead Thin Shrink Small Outline Package [TSSOP] Figure 55. 14-Lead Standard Small Outline Package [SOIC] Narrow Body

Rev. F | Page 20 of 20 ORDERING GUIDE Model Temperature Range Package Description Package Option Branding OP162GS −40°C to +125°C 8-Lead SOIC S-Suffix (R-8) OP162GS-REEL −40°C to +125°C 8-Lead SOIC S-Suffix (R-8) OP162GS-REEL7 −40°C to +125°C 8-Lead SOIC S-Suffix (R-8) OP162GSZ1 −40°C to +125°C 8-Lead SOIC S-Suffix (R-8) OP162GSZ-REEL1 −40°C to +125°C 8-Lead SOIC S-Suffix (R-8) OP162GSZ-REEL71 −40°C to +125°C 8-Lead SOIC S-Suffix (R-8) OP162DRU-REEL −40°C to +125°C 8-Lead TSSOP RU-8 OP162DRUZ-REEL1 −40°C to +125°C 8-Lead TSSOP RU-8 OP162HRU-REEL −40°C to +125°C 8-Lead TSSOP RU-8 OP162HRUZ-REEL1 −40°C to +125°C 8-Lead TSSOP RU-8 OP162DRM-REEL −40°C to +125°C 8-Lead MSOP RM-8 AND OP162DRMZ-REEL1 −40°C to +125°C 8-Lead MSOP RM-8 AOJ OP262DRU-REEL −40°C to +125°C 8-Lead TSSOP RU-8 OP262DRUZ-REEL1 −40°C to +125°C 8-Lead TSSOP RU-8 OP262GS −40°C to +125°C 8-Lead SOIC S-Suffix (R-8) OP262GS-REEL −40°C to +125°C 8-Lead SOIC S-Suffix (R-8) OP262GS-REEL7 −40°C to +125°C 8-Lead SOIC S-Suffix (R-8) OP262GSZ1 −40°C to +125°C 8-Lead SOIC S-Suffix (R-8) OP262GSZ-REEL1 −40°C to +125°C 8-Lead SOIC S-Suffix (R-8) OP262GSZ-REEL71 −40°C to +125°C 8-Lead SOIC S-Suffix (R-8) OP262HRU-REEL −40°C to +125°C 8-Lead TSSOP RU-8 OP262HRUZ-REEL1 −40°C to +125°C 8-Lead TSSOP RU-8 OP462DRU-REEL −40°C to +125°C 14-Lead TSSOP RU-14 OP462DRUZ-REEL1 −40°C to +125°C 14-Lead TSSOP RU-14 OP462DS −40°C to +125°C 14-Lead SOIC S-Suffix (R-14) OP462DS-REEL −40°C to +125°C 14-Lead SOIC S-Suffix (R-14) OP462DS-REEL7 −40°C to +125°C 14-Lead SOIC S-Suffix (R-14) OP462DSZ1 −40°C to +125°C 14-Lead SOIC S-Suffix (R-14) OP462DSZ-REEL1 −40°C to +125°C 14-Lead SOIC S-Suffix (R-14) OP462DSZ-REEL71 −40°C to +125°C 14-Lead SOIC S-Suffix (R-14) OP462GS −40°C to +125°C 14-Lead SOIC S-Suffix (R-14) OP462GS-REEL −40°C to +125°C 14-Lead SOIC S-Suffix (R-14) OP462GS-REEL7 −40°C to +125°C 14-Lead SOIC S-Suffix (R-14) OP462GSZ1 −40°C to +125°C 14-Lead SOIC S-Suffix (R-14) OP462GSZ-REEL1 −40°C to +125°C 14-Lead SOIC S-Suffix (R-14) OP462GSZ-REEL71 −40°C to +125°C 14-Lead SOIC S-Suffix (R-14) OP462HRU-REEL −40°C to +125°C 14-Lead TSSOP RU-14 OP462HRUZ-REEL1 −40°C to +125°C 14-Lead TSSOP RU-14 1 Z = Pb-free part. © 2005 Analo g De vices, Inc. All rights reserve d. Tra demarks and registered tra demarks are the prop erty of their respective owners . C00288–0–1/05(F)