OP113FS

OP113 AD | Alldatasheet

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REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a Low Noise, Low Drift Single-Supply Operational Amplifiers OP113/OP213/OP413 Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1998

FEATURES

Single- or Dual-Supply Operation Low Noise: 4.7 nV/ √Hz @ 1 kHz Wide Bandwidth: 3.4 MHz Low Offset Voltage: 100 mV Very Low Drift: 0.2 mV/8C Unity Gain Stable No Phase Reversal

APPLICATIONS

Battery Powered Instrumentation Temperature Transducer Amplifier GENERAL DESCRIPTION The OP113 family of single supply operational am plifiers fea- tures both low noise and drift. It has been designed for sys- tems with inter nal calibration. Often these processor-based systems are capable of calibrating corrections for offset and gain, but they cannot correct for temperature drifts and noise. Optimized for these parameters, the OP113 family can be used to take advantage of superior analog performance combined with digital correction. Many systems using internal calibration operate from unipolar supplies, usually either +5 volts or +12 volts. The OP113 family is designed to operate from single supplies from +4 volts to +36 volts, and to maintain its low noise and precision performance. The OP113 family is unity gain stable and has a typical gain bandwidth product of 3.4 MHz. Slew rate is in excess of 1 V/ µs. Noise density is a very low 4.7 nV/ √ Hz, and noise in the 0.1 Hz to 10 Hz band is 120 nV p-p. Input offset voltage is guaranteed and offset drift is guaranteed to be less than 0.8 µV/°C. Input common-mode range includes the negative supply and to within 1 volt of the positive supply over the full supply range. Phase reversal protection is designed into the OP113 family for cases where input voltage range is exceeded. Output voltage swings also include the negative supply and go to within 1 volt of the positive rail. The output is capable of sinking and sourcing current throughout its range and is specified with 600 Ω loads. Digital scales and other strain gage applications benefit from the very low noise and low drift of the OP113 family. Other appli- cations include use as a buffer or amplifier for both A/D and 8-Lead Plastic DIP8-Lead Narrow-Body SO OP213 OUT A –IN A +IN A OUT B –IN B +IN B OP213 OUT A –IN A +IN A OUT B –IN B +IN B 16-Lead Wide-Body SO14-Lead Plastic DIP OP413 OUT A –IN A +IN A V+ V– OUT B –IN B +IN B OUT D –IN D +IN D +IN C –IN C OUT C OUT COUT B OP413 OUT A –IN A +IN A –IN B +IN B NC OUT D –IN D +IN D +IN C –IN C NC NC = NO CONNECT 11 6 8-Lead Narrow-Body SO OP113 OP113 NULL –IN A +IN A NC OUT A NULL NULL –IN A +IN A NC OUT A NULL NC = NO CONNECT NC = NO CONNECT 8-Lead Plastic DIP D/A sigma-delta converters. Often these converters have high resolutions requiring the lowest noise amplifier to utilize their full potential. Many of these converters operate in either single supply or low supply voltage systems, and attaining the greater signal swing possible increases system performance. The OP113 family is specified for single +5 volt and dual ± 15 volt operation over the XIND—extended industrial (–40 °C to +85°C) temperature range. They are available in plastic and SOIC surface mount packages.

OP113/OP213/OP413–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

“E” Grade “F” Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Units INPUT CHARACTERISTICS Offset Voltage V OS OP113 75 150 µV –40°C ≤ TA ≤ +85°C 125 225 µV OP213 100 250 µV –40°C ≤ TA ≤ +85°C 150 325 µV OP413 125 275 µV –40°C ≤ TA ≤ +85°C 175 350 µV Input Bias Current I B VCM = 0 V, 240 600 600 nA –40°C ≤ TA ≤ +85°C 700 700 nA Input Offset Current I OS VCM = 0 V –40°C ≤ TA ≤ +85°C5 0 5 0 n A Input Voltage Range V CM –15 +14 –15 +14 V Common-Mode Rejection CMR –15 V ≤ VCM ≤ +14 V 100 116 96 dB –15 V ≤ VCM ≤ +14 V, –40°C ≤ TA ≤ +85°C 97 116 94 dB Large Signal Voltage Gain A VO OP113, OP213, R L = 600 Ω , –40°C ≤ TA ≤ +85°C 1 2.4 1 V/ µV OP413, RL = 1 kΩ , –40°C ≤ TA ≤ +85°C 1 2.4 1 V/ µV RL = 2 kΩ , –40°C ≤ TA ≤ +85°C2 8 2 V / µV Long-Term Offset Voltage 1 VOS Note 1 150 300 µV Offset Voltage Drift Δ VOS/Δ T Note 2 0.2 0.8 1.5 µV/°C OUTPUT CHARACTERISTICS Output Voltage Swing High V OH RL = 2 kΩ +14 +14 V RL = 2 kΩ , Output Voltage Swing Low V OL RL = 2 kΩ –14.5 –14.5 V RL = 2 kΩ , Short Circuit Limit I SC ± 40 ± 40 mA POWER SUPPLY Power Supply Rejection Ratio PSRR V S = ± 2 V to ± 18 V 103 120 100 dB VS = ± 2 V to ± 18 V –40°C ≤ TA ≤ +85°C 100 120 97 dB Supply Current/Amplifier I SY VOUT = 0 V, RL = ∞ , VS = ± 18 V 3 3 mA Supply Voltage Range V S +4 ± 18 +4 ± 18 V AUDIO PERFORMANCE THD + Noise V IN = 3 V rms, R L = 2 kΩ f = 1 kHz, 0.0009 0.0009 % Voltage Noise Density e n f = 10 Hz 9 9 nV/ √Hz f = 1 kHz 4.7 4.7 nV/ √Hz Current Noise Density i n f = 1 kHz 0.4 0.4 pA/ √Hz Voltage Noise e n p-p 0.1 Hz to 10 Hz 120 120 nV p-p DYNAMIC PERFORMANCE Slew Rate SR R L = 2 kΩ 0.8 1.2 0.8 1.2 V/ µs Gain Bandwidth Product GBP 3.4 3.4 MHz Channel Separation V OUT = 10 V p-p RL = 2 kΩ , f = 1 kHz 105 105 dB Settling Time t S to 0.01%, 0 V to 10 V Step 9 9 µs NOTES 1Long-term offset voltage is guaranteed by a 1000-hour life test performed on three independent lots at 125 °C, with an LTPD of 1.3. 2Guaranteed specifications, based on characterization data. Specifications subject to change without notice. REV. C (@ VS = 615.0 V, TA = +258C unless otherwise noted) –2–

REV. C –3– “E” Grade “F” Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Units INPUT CHARACTERISTICS Offset Voltage V OS OP113 125 175 µV –40°C ≤ TA ≤ +85°C 175 250 µV OP213 150 300 µV –40°C ≤ TA ≤ +85°C 225 375 µV OP413 175 325 µV –40°C ≤ TA ≤ +85°C 250 400 µV Input Bias Current I B VCM = 0 V, VOUT = 2 300 650 650 nA –40°C ≤ TA ≤ +85°C 750 750 nA Input Offset Current I OS VCM = 0 V, VOUT = 2 –40°C ≤ TA ≤ +85°C5 0 5 0 n A Input Voltage Range V CM 0+ 4 + 4 V Common-Mode Rejection CMR 0 V ≤ VCM ≤ 4 V 93 106 90 dB

0 V ≤ VCM ≤ 4 V,

–40°C ≤ TA ≤ +85°C9 0 8 7 d B Large Signal Voltage Gain A VO OP113, OP213, R L = 600 Ω , 2 kΩ 0.01 V ≤ VOUT ≤ 3.9 V 2 2 V/ µV OP413, RL = 600, 2 kΩ , 0.01 V ≤ VOUT ≤ 3.9 V 1 1 V/ µV Long-Term Offset Voltage 1 VOS Note 1 200 350 µV Offset Voltage Drift Δ VOS/Δ T Note 2 0.2 1.0 1.5 µV/°C OUTPUT CHARACTERISTICS Output Voltage Swing High V OH RL = 600 kΩ 4.0 4.0 V RL = 100 kΩ , –40°C ≤ TA ≤ +85°C 4.1 4.1 V RL = 600 Ω , –40°C ≤ TA ≤ +85°C 3.9 3.9 V Output Voltage Swing Low V OL RL = 600 Ω , –40°C ≤ TA ≤ +85°C8 8 m V RL = 100 kΩ , –40°C ≤ TA ≤ +85°C8 8 m V Short Circuit Limit I SC ± 30 ± 30 mA POWER SUPPLY Supply Current I SY VOUT = 2.0 V, No Load 1.6 2.7 2.7 mA Supply Current I SY –40°C ≤ TA ≤ +85°C 3.0 3.0 mA AUDIO PERFORMANCE THD + Noise V OUT = 0 dBu, f = 1 kHz 0.001 0.001 % Voltage Noise Density e n f = 10 Hz 9 9 nV/ √Hz f = 1 kHz 4.7 4.7 nV/ √Hz Current Noise Density i n f = 1 kHz 0.45 0.45 pA/ √Hz Voltage Noise e n p-p 0.1 Hz to 10 Hz 120 120 nV p-p DYNAMIC PERFORMANCE Slew Rate SR R L = 2 kΩ 0.6 0.9 0.6 V/ µs Gain Bandwidth Product GBP 3.5 3.5 MHz Settling Time t S to 0.01%, 2 V Step 5.8 5.8 µs NOTES 1Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 °C, with an LTPD of 1.3. 2Guaranteed specifications, based on characterization data. Specifications subject to change without notice. (@ VS = +5.0 V, TA = +258C unless otherwise noted)

–4– REV. C ABSOLUTE MAXIMUM RATINGS 1 Storage Temperature Range Operating Temperature Range Junction Temperature Range Package Type uJA2 uJC Units 8-Lead Plastic DIP (P) 103 43 °C/W 8-Lead SOIC (S) 158 43 °C/W 14-Lead Plastic DIP (P) 83 39 °C/W 16-Lead SOIC (S) 92 27 °C/W NOTES 1Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2θJA is specified for the worst case conditions, i.e., θJA is specified for device in socket for cerdip, P-DIP, and LCC packages; θJA is specified for device soldered in circuit board for SOIC package. ORDERING GUIDE Temperature Package Package Model Range Description Options OP113EP –40 °C to +85°C 8-Lead Plastic DIP N-8 OP113ES –40 °C to +85°C 8-Lead SOIC SO-8 OP113FP –40 °C to +85°C 8-Lead Plastic DIP N-8 OP113FS –40 °C to +85°C 8-Lead SOIC SO-8 OP213EP –40 °C to +85°C 8-Lead Plastic DIP N-8 OP213ES –40 °C to +85°C 8-Lead SOIC SO-8 OP213FP –40 °C to +85°C 8-Lead Plastic DIP N-8 OP213FS –40 °C to +85°C 8-Lead SOIC SO-8 OP413EP –40 °C to +85°C 14-Lead Plastic DIP N-14 OP413ES –40 °C to +85°C 16-Lead Wide SOIC R-16 OP413FP –40 °C to +85°C 14-Lead Plastic DIP N-14 OP413FS –40 °C to +85°C 16-Lead Wide SOIC R-16

REV. C –5– 2 mV trim range may be somewhat excessive. Reducing the trimming potentiometer to a 2 k Ω value will give a more reason- able range of ± 400 µV. 162 136 711 124

3 AD588BD

+10.000V +15V –15V 10mF OP213 +10.000V 5 4 OP213 17.2kV 0.1% 500V CMRR TRIM 10-TURN T.C. LESS THAN 50ppm/8C OUTPUT 0 10V F.S. –15V 350V LOAD CELL 100mV F.S. 17.2kV 0.1% 301V 0.1% Figure 1. Precision Load Cell Scale Amplifier Figure 2. Single Supply Strain-Gage Amplifier The OP113, OP213 and OP413 form a new family of high performance amplifiers that feature precision performance in standard dual supply configurations and, more importantly, maintain precision performance when a single power supply is used. In addition to accurate dc specifications, it is the lowest noise single supply amplifier available with only 4.7 nV/ √Hz typical noise density. Single supply applications have special requirements due to the generally reduced dynamic range of the output signal. Single supply applications are often operated at voltages of +5 volts or +12 volts, compared to dual supply applications with supplies of ± 12 volts or ± 15 volts. This results in reduced output swings. Where a dual supply application may often have 20 volts of signal output swing, single supply applications are limited to, at most, the supply range and, more commonly, several volts be- low the supply. In order to attain the greatest swing the single supply output stage must swing closer to the supply rails than in dual supply applications. The OP113 family has a new patented output stage that allows the output to swing closer to ground, or the negative supply, than previous bipolar output stages. Previous op amps had outputs that could swing to within about ten millivolts of the negative supply in single supply applications. However, the OP113 family combines both a bipolar and a CMOS device in the output stage, enabling it to swing to within a few hundred microvolts of ground. When operating with reduced supply voltages, the input range is also reduced. This reduction in signal range results in reduced signal-to-noise ratio, for any given amplifier. There are only two ways to improve this: increase the signal range or reduce the noise. The OP113 family addresses both of these parameters. Input signal range is from the negative supply to within one volt of the positive supply over the full supply range. Com- petitive parts have input ranges that are a half a volt to five volts less than this. Noise has also been optimized in the OP113 family. At 4.7 nV/√ Hz, it is less than one fourth that of competi- tive devices. Phase Reversal The OP113 family is protected against phase reversal as long as both of the inputs are within the supply ranges. However, if there is a possibility of either input going below the negative supply (or ground in the single supply case), the inputs should be pro- tected with a series resistor to limit input current to 2 mA. OP113 Offset Adjust The OP113 has the facility for external offset adjustment, using the industry standard arrangement. Pins 1 and 5 are used in conjunction with a potentiometer of 10 k Ω total resistance, connected with the wiper to V– (or ground in single supply applications). The total adjustment range is about ± 2 mV using this configuration. Adjusting the offset to zero has minimal effect on offset drift (assuming the potentiometer has a tempco of less than 1000 ppm/ °C). Adjustment away from zero, however, (like all bipolar amplifiers) will result in a TCV OS of approximately 3.3 µV/°C for every millivolt of induced offset. It is therefore not generally recommended that this trim be used to compensate for system errors originating outside of the OP113. The initial offset of the OP113 is low enough that external trimming is almost never required but, if necessary, the

Figure 4. Accurate K-Type Thermocouple Amplifier tive direction until the output just stops changing. common mode to not less than 0.33 V. Figure 5. Ultralow Noise, Single Supply Instrumentation

5.000 V bridge excitation is derived from the extremely stable

AD588 reference device with 1.5 ppm/ °C drift performance. will be linearly proportional to the temperature of the RTD. Figure 3. Ultraprecision RTD Amplifier LINEARITY ADJUST potentiometer for a 2.500 V output. Check and readjust the full-scale and half-scale as needed. can be calibrated to a higher temperature range, up to 850 °C.

2 OUTPUT+

Figure 6. False Ground Generator SoundPort is a registered trademark of Analog Devices, Inc. ence. Total noise measures 3 µV p-p. Figure 7. Low Noise Voltage Reference the OP113 family can also be powered from the same supplies. Figure 8. +5 V Only 18-Bit Stereo DAC

only a slight penalty in speed in comparison to IC comparators. ac response is quite acceptable in many applications. Figure 11. Precision Comparator nient bias for the headphone output amplifiers. Figure 9. Headphone Output Amplifier for Multimedia a “phantom power” driver for the microphones.

17 MINL

Figure 10. Low Noise Stereo Microphone Amplifier for SoundPort is a registered trademark of Analog Device, Inc.

Figure 44. OP213 Simplified Schematic *Copyright 1992 by Analog Devices, Inc.

–16– REV. C C1805a–0–2/98PRINTED IN U.S.A. OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Plastic DIP (N-8) 0.430 (10.92) 0.348 (8.84) 0.280 (7.11) 0.240 (6.10) PIN 1 SEATING PLANE0.022 (0.558) 0.014 (0.356) 0.060 (1.52) 0.015 (0.38) 0.210 (5.33) MAX 0.130 (3.30) MIN 0.070 (1.77) 0.045 (1.15) 0.100 (2.54) BSC 0.160 (4.06) 0.115 (2.93) 0.325 (8.25) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 8-Lead Narrow-Body Plastic DIP (SO-8) 0.1968 (5.00) 0.1890 (4.80) 8 5 0.2440 (6.20) 0.2284 (5.80) PIN 1 0.1574 (4.00) 0.1497 (3.80) 0.0688 (1.75) 0.0532 (1.35) SEATING PLANE 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) BSC 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 0.0196 (0.50) 0.0099 (0.25)x 45° 14-Lead Plastic DIP (N-14) 0.795 (20.19) 0.725 (18.41) 0.280 (7.11) 0.240 (6.10) PIN 1 0.325 (8.25) 0.300 (7.62) 0.015 (0.38) 0.008 (0.20) 0.195 (4.95) 0.115 (2.93)SEATING PLANE 0.022 (0.558) 0.014 (0.36) 0.060 (1.52) 0.015 (0.38) 0.210 (5.33) MAX 0.130 (3.30) MIN 0.070 (1.77) 0.045 (1.15) 0.100 (2.54) BSC 0.160 (4.06) 0.115 (2.92) 16-Lead Wide Body SOIC (R-16) 0.2992 (7.60) 0.2914 (7.40) 16 9 0.4133 (10.50) 0.3977 (10.00) 0.4193 (10.65) 0.3937 (10.00) PIN 1 SEATING PLANE 0.0118 (0.30) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.1043 (2.65) 0.0926 (2.35) 0.0500 (1.27) BSC 0.0125 (0.32) 0.0091 (0.23) 0.0500 (1.27) 0.0157 (0.40) 0.0291 (0.74) 0.0098 (0.25) x 458