OP07DR

OP07D AD | Alldatasheet

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Technical content

150 μV Maximum Offset Voltage Op Amp OP07D Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.

FEATURES

Low offset voltage: 150 μV max Input offset drift: 1.5 μV/°C max Low noise: 0.25 μV p-p High gain CMRR and PSRR: 115 dB min Low supply current: 1.1 mA Wide supply voltage range: ±4 V to ±18 V operation

APPLICATIONS

Medical and industrial instrumentation Sensors and controls Thermocouple RTDs Strain bridges Shunt current measurements Precision filters GENERAL DESCRIPTION The OP07D is a precision, ultralow offset amplifier. It integrates low power (1.1 mA typical), low input bias current (±1 nA maximum), and high CMRR/PSRR (130 dB) in the small DIP package. Operation is fully specified from ±5 V to ±15 V supply. The OP07D provides higher accuracy than industry-standard OP07-type amplifiers due to Analog Devices’ iPolar™ process, which supports enhanced performance in a smaller footprint. These performance enhancements include wider output swing, lower power, and higher CMRR (common-mode rejection ratio) and PSRR (power supply rejection ratio). The OP07D maintains stability of offsets and gain virtually regardless of variations in time or temperature. Excellent linearity and gain accuracy can be maintained at high closed-loop gains. The OP07D is fully specified over the extended industrial tem- perature range of −40°C to +125°C. The OP07D amplifier is available in 8-lead DIP and the popular 8-lead, narrow SOIC lead-free packages. PIN CONFIGURATIONS 05867-001 OP07D TOP VIEW (Not to Scale) NC = NO CONNECT 1NULL 8 NULL 2–IN 7 V+ 3+IN 6 OUT 4V– 5 NC Figure 1. 8-Lead SOIC_N (R-8), 8-Lead DIP (N-8)

Rev. 0 | Page 2 of 16 TABLE OF CONTENTS

REVISION HISTORY

12/05—Revision 0: Initial Version

Rev. 0 | Page 3 of 16 SPECIFICATIONS VS = ±5.0 V , TA = 25°C, unless otherwise specified. Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage VOS 40 150 μV 0°C ≤ TA ≤ 70°C 250 μV −40°C ≤ TA ≤ +125°C 350 μV Input Bias Current IB 0.2 1 nA −40°C ≤ TA ≤ +125°C 1 nA Input Offset Current IOS 0.1 1 nA −40°C ≤ TA ≤ +125°C 1 nA Input Voltage Range −3.5 +3.5 V Common-Mode Rejection Ratio CMRR VCM = ±3 V 120 127 dB −40°C ≤ TA ≤ +125°C 120 dB Open-Loop Gain AVO RL = 2 kΩ to ground, VO = ±3 V 1000 10,000 V/mV −40°C ≤ TA ≤ +125°C 1000 V/mV Offset Voltage Drift ΔVOS/ΔT 0°C ≤ TA ≤ 70°C 0.5 1.8 μV/°C OUTPUT CHARACTERISTICS Output Voltage Swing VOUT RL = 10 kΩ to ground ±3.95 ±4.1 V RL = 2 kΩ to ground ±3.9 ±4 V Short-Circuit Current ISC 27 mA Output Current IO VO = 3.5 V 15 mA POWER SUPPLY Power Supply Rejection Ratio PSRR VS = ±4.0 V to ±18.0 V 115 130 dB 0°C ≤ TA ≤ 70°C 115 dB −40°C ≤ TA ≤ +125°C 110 dB Supply Current/Amplifier ISY VO = 0 V 1.1 1.25 mA 0°C ≤ TA ≤ 70°C 1.45 mA DYNAMIC PERFORMANCE Slew Rate SR RL = 10 kΩ 0.2 V/μs Gain Bandwidth Product GBP 0.6 MHz Phase Margin 80 Degrees NOISE PERFORMANCE Voltage Noise en p-p 0.1 Hz to 10 Hz 0.28 μV p-p Voltage Noise Density en f = 1 kHz 10 nV/√Hz Current Noise Density in f = 1 kHz 0.074 pA/√Hz

Rev. 0 | Page 4 of 16 VS = ±15 V , TA = 25°C, unless otherwise specified. Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage VOS 45 150 μV 0°C ≤ TA ≤ 70°C 250 μV −40°C ≤ TA ≤ +125°C 350 μV Input Bias Current IB 0.2 1 nA −40°C ≤ TA ≤ +125°C 1 nA Input Offset Current IOS 0.2 1 nA −40°C ≤ TA ≤ +125°C 1 nA Input Voltage Range −13.5 +13.5 V Common-Mode Rejection Ratio CMRR VCM = ±13.0 V 120 140 dB −40°C ≤ TA ≤ +125°C 120 dB Open-Loop Gain AVO RL = 2 kΩ to ground, VO = ±11 V 1000 10,000 V/mV −40°C ≤ TA ≤ +125°C 1000 V/mV Offset Voltage Drift ΔVOS/ΔT 0°C ≤ TA ≤ 70°C 0.5 2.5 μV/°C OUTPUT CHARACTERISTICS Output Voltage Swing VOUT RL = 10 kΩ to ground ±13.95 +14 V RL = 2 kΩ to ground ±13.75 +13.8 V Short-Circuit Current ISC 30 mA Output Current IO VO = 13.5 V 15 mA POWER SUPPLY Power Supply Rejection Ratio PSRR VS = ±4.0 V to ±18.0 V 115 130 dB 0°C ≤ TA ≤ 70°C 115 dB −40°C ≤ TA ≤ +125°C 110 dB Supply Current/Amplifier ISY VO = 0 V 1.1 1.3 mA 0°C ≤ TA ≤ 70°C 1.55 mA DYNAMIC PERFORMANCE Slew Rate SR RL = 10 kΩ 0.2 V/μs Gain Bandwidth Product GBP 0.6 MHz Phase Margin 80 Degrees NOISE PERFORMANCE Voltage Noise en p-p 0.1 Hz to 10 Hz 0.25 μV p-p Voltage Noise Density en f = 1 kHz 10 nV/√Hz Current Noise Density in f = 1 kHz 0.074 pA/√Hz

Rev. 0 | Page 5 of 16 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Supply Voltage ±18 V Input Voltage ±V supply Differential Input Voltage ±0.7 V Output Short-Circuit Duration to GND Indefinite Storage Temperature Range −65°C to +150°C Operating Temperature Range −40°C to +125°C Junction Temperature Range −65°C to +150°C Lead Temperature (Soldering, 10 sec) +300°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θJA is specified for worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 4. Package Type θJA θJC Unit 8-Lead DIP (N-8) 103 43 °C/W 8-Lead SOIC (R-8) 158 43 °C/W ESD CAUTION ESD (electrostatic discharge) sensitive device. Electros tatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge wi thout detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Rev. 0 | Page 14 of 16 ORDERING GUIDE Model Temperature Range Package Description Package Option OP07DN −40°C to +125°C 8-Lead PDIP N-8 OP07DNZ1 −40°C to +125°C 8-Lead PDIP N-8 OP07DR −40°C to +125°C 8-Lead SOIC_N R-8 OP07DR-REEL −40°C to +125°C 8-Lead SOIC_N R-8 OP07DR-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8 OP07DRZ1 −40°C to +125°C 8-Lead SOIC_N R-8 OP07DRZ-REEL1 −40°C to +125°C 8-Lead SOIC_N R-8 OP07DRZ-REEL71 −40°C to +125°C 8-Lead SOIC_N R-8 1 Z = Pb-free part.

Rev. 0 | Page 15 of 16 NOTES

OP07D Preliminary Technical Data Rev. 0 | Page 16 of 16 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05867–0–12/05(0)